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Vishay Semiconductors
Power MOSFET, 38 A
FEATURES
• Fully isolated package
• Easy to use and parallel
• Low on-resistance
• Dynamic dV/dt rating
• Fully avalanche rated
• Simple drive requirements
SOT-227
• Low drain to case capacitance
• Low internal inductance
• UL approved file E78996
• Designed for industrial level
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
PRODUCT SUMMARY
VDSS
500 V
RDS(on)
0.13
ID
38 A
Type
Modules - MOSFET
Package
SOT-227
Third Generation Power MOSFETs from Vishay
Semiconductors provide the designer with the best
combination of fast switching, ruggedized device design,
low on-resistance and cost-effectiveness.
The SOT-227 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 500 W. The low thermal resistance
of the SOT-227 contribute to its wide acceptance
throughout the industry.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Continuous drain current at VGS 10 V
Pulsed drain current
Power dissipation
SYMBOL
ID
IDM
TEST CONDITIONS
TC = 25 °C
38
TC = 100 °C
24
(1)
PD
UNITS
A
150
TC = 25 °C
Linear derating factor
Gate to source voltage
MAX.
500
W
4.0
W/°C
VGS
± 20
V
Single pulse avalanche energy
EAS (2)
580
mJ
Avalanche current
IAR (1)
38
A
Repetitive avalanche energy
EAR (1)
50
mJ
Peak diode recovery dV/dt
dV/dt (3)
10
V/ns
Operating junction and storage temperature range
TJ, TStg
- 55 to + 150
°C
Insulation withstand voltage (AC-RMS)
Mounting torque
VISO
M4 screw
2.5
kV
1.3
Nm
Notes
(1) Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
(2) Starting T = 25 °C, L = 0.80 mH, R = 25 , I
J
g
AS = 38 A (see fig. 12)
(3) I 38 A, dI/dt 410 A/μs, V
SD
DD V(BR)DSS, TJ 150 °C
Revision: 08-Aug-13
Document Number: 94547
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THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Junction and storage temperature range
SYMBOL
TEST CONDITIONS
TJ, TStg
Junction to case
RthJC
Case to heatsink
RthCS
MIN.
TYP.
MAX.
UNITS
- 55
-
150
°C
-
-
0.25
-
0.05
-
Weight
-
30
-
g
Mounting torque
-
-
1.3
Nm
MIN.
TYP.
MAX.
UNITS
500
-
-
V
Reference to 25 °C, ID = 1 mA
-
0.66
-
V/°C
VGS = 10 V, ID = 23 A
-
-
0.13
Flat, greased surface
Case style
°C/W
SOT-227
ELECTRICAL CHARACTERISTCS (TJ = 25 °C unless otherwise noted)
PARAMETER
Drain to source breakdown voltage
Breakdown voltage temperature
coefficient
Static drain to source on-resistance
SYMBOL
TEST CONDITIONS
VGS = 0 V, ID = 1.0 mA
V(BR)DSS
V(BR)DSS/TJ
RDS(on) (1)
Gate threshold voltage
VGS(th)
Forward transconductance
gfs
Drain to source leakage current
IDSS
Gate to source forward leakage
IGSS
Gate to source reverse leakage
Total gate charge
Qg
Gate to source charge
Qgs
Gate to drain ("Miller") charge
Qgd
Turn-on delay time
td(on)
Rise time
tr
Turn-off delay time
td(off)
Fall time
tf
Internal source inductance
LS
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
VDS = 25 V, ID = 23 A
22
-
-
S
VDS = 500 V, VGS = 0 V
-
-
50
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
500
VGS = 20 V
-
-
200
VGS = - 20 V
-
-
- 200
ID = 38 A
VDS = 400 V
VGS = 10 V; see fig. 6 and 13 (1)
-
280
420
-
37
55
-
150
220
VDD = 250 V
ID = 38 A
Rg = 10
RD = 8, see fig. 10 (1)
-
42
-
-
340
-
-
200
-
-
330
-
Between lead, and center of die
contact
-
5.0
-
VGS = 0 V
VDS = 25 V
f = 1.0 MHz, see fig. 5
-
6900
-
-
1600
-
-
580
-
MIN.
TYP.
MAX.
-
-
38
-
-
150
μA
nA
nC
ns
nH
pF
Note
(1) Pulse width 300 μs, duty cycle 2 %
SOURCE-DRAIN RATINGS AND CHARACTERISTICS
PARAMETER
Continuous source current
(body diode)
SYMBOL
IS
TEST CONDITIONS
D
Pulsed source current (body diode)
ISM (1)
MOSFET symbol
showing the integral reverse
p-n junction diode.
Diode forward voltage
VSD (2)
TJ = 25 °C, IS = 38 A, VGS = 0 V
Reverse recovery time
trr
Reverse recovery charge
Qrr
Forward turn-on time
ton
UNITS
A
G
S
TJ = 25 °C, IF = 38 A; dI/dt = 100 A/μs (2)
-
-
1.3
V
-
830
1300
ns
-
15
22
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS + LD)
Notes
Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
(2) Pulse width 300 μs, duty cycle 2 %
(1)
Revision: 08-Aug-13
Document Number: 94547
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3.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
ID , Drain-to-Source Current (A)
TOP
100
10
4.5V
20μs PULSE WIDTH
TC = 25°C
1
1
10
A
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000
Vishay Semiconductors
100
ID = 38A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VDS , Drain-to-Source Voltage (V)
16000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
60
80 100 120 140 160
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
14000
C, Capacitance (pF)
I D , Drain-to-Source Current (A)
40
Fig. 4 - Normalized On-Resistance vs. Temperature
TOP
100
12000
10000
Ciss
8000
6000
Coss
4000
Crss
4.5V
1
2000
20μs PULSE WIDTH
TJ = 150 °C
10
10
0
100
1
VDS, Drain-to-Source Voltage (V)
VGS , Gate-to-Source Voltage (V)
20
100
TJ = 150 ° C
TJ = 25 ° C
10
V DS = 50V
20μs PULSE WIDTH
4
5
6
7
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Revision: 08-Aug-13
100
Fig. 5 - Typical Capacitance vs.
Drain to Source Voltage
1000
1
10
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
I D , Drain-to-Source Current (A)
20
TJ , Junction Temperature ( °C)
Fig. 1 - Typical Output Characteristics
1000
VGS = 10V
0
ID = 38A
VDS = 400V
VDS = 250V
VDS = 100V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
8
0
80
160
240
320
400
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs.
Gate to Source Voltage
Document Number: 94547
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ISD , Reverse Drain Current (A)
1000
Current regulator
Same type as D.U.T.
100
50 KΩ
.2 µF
12 V
TJ = 150 ° C
.3 µF
10
D.U.T.
+
V
- DS
TJ = 25 ° C
1
VGS
3 mA
0.1
0.2
V GS = 0 V
0.4
0.6
0.8
1.0
1.2
1.4
IG
ID
Current sampling resistors
1.6
VSD ,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source Drain Diode Forward Voltage
Fig. 10 - Gate Charge Test Circuit
1000
ID , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
VDS
RD
100
10us
VGS
D.U.T.
RG
+
- VDD
100us
10
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
1ms
1
TC = 25 °C
TJ = 150 °C
Single Pulse
1
10
10ms
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
QG
Fig. 11 - Switching Time Test Circuit
VDS
90%
10V
QGS
QGD
VG
0%
GS
Charge
Fig. 9 - Basic Gate Charge Waveform
Revision: 08-Aug-13
td(on)
tr
t d(off)
tf
Fig. 12 - Switching Time Waveforms
Document Number: 94547
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Thermal Response (Z thJC )
1
0.50
0.1
0.20
0.10
0.05
0.01
PDM
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t1, Rectangular Pulse Duration (sec)
Fig. 13 - Maximum Effective Transient Thermal Impedance, Junction to Case
V(BR)DSS
15 V
L
VDS
tp
Driver
D.U.T
RG
+
- VDD
IAS
20 V
tp
A
I AS
0.01 Ω
Fig. 14 - Unclamped Inductive Test Circuit
Fig. 15 - Unclamped Inductive Waveforms
EAS , Single Pulse Avalanche Energy (mJ)
1200
TOP
1000
BOTTOM
ID
17A
24A
38A
800
600
400
200
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
Fig. 16 - Maximum Avalanche Energy vs. Drain Current
Revision: 08-Aug-13
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
3
+
2
-
-
4
+
1
RG
•
•
•
•
+
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - Device under test
-
VDD
Fig. 17 - Peak Diode Recovery dV/dt Test Circuit
Driver Gate Drive
D=
Period
P.W.
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig. 18 - For N-Channel Power MOSFETs
Revision: 08-Aug-13
Document Number: 94547
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not Available for New Designs, Use VS-FA40SA50LC
VS-FA38SA50LCP
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Vishay Semiconductors
ORDERING INFORMATION TABLE
Device code
VS-
F
A
38
S
A
50
LC
P
1
2
3
4
5
6
7
8
9
1
-
Vishay Semiconductors product
2
-
Power MOSFET
3
-
Generation 3, MOSFET silicon, DBC construction
4
-
Current rating (38 = 38 A)
5
-
Single switch (see Circuit Configuration table)
6
-
SOT-227
7
-
Voltage rating (50 = 500 V)
8
-
Low charge
9
-
P = Lead (Pb)-free
CIRCUIT CONFIGURATION
CIRCUIT
CIRCUIT
CONFIGURATION CODE
CIRCUIT DRAWING
D (3)
Lead assignment
S
Single switch no diode
S
G (2)
D
4
3
1
2
S (1-4)
S
G
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95036
Packaging information
www.vishay.com/doc?95037
Revision: 08-Aug-13
Document Number: 94547
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
Vishay Semiconductors
SOT-227
DIMENSIONS in millimeters (inches)
38.30 (1.508)
37.80 (1.488)
Chamfer
2.00 (0.079) x 45°
4 x M4 nuts
Ø 4.40 (0.173)
Ø 4.20 (0.165)
-A3
4
6.25 (0.246)
12.50 (0.492)
25.70 (1.012)
25.20 (0.992)
-B-
1
2
R full
7.50 (0.295)
15.00 (0.590)
30.20 (1.189)
29.80 (1.173)
8.10 (0.319)
4x
7.70 (0.303)
2.10 (0.082)
1.90 (0.075)
0.25 (0.010) M C A M B M
2.10 (0.082)
1.90 (0.075)
-C-
12.30 (0.484)
11.80 (0.464)
0.12 (0.005)
Notes
• Dimensioning and tolerancing per ANSI Y14.5M-1982
• Controlling dimension: millimeter
Document Number: 95036
Revision: 28-Aug-07
For technical questions, contact: indmodules@vishay.com
www.vishay.com
1
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Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
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Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
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Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1
Document Number: 91000
