VS-ST650C20L1

VS-ST650C..L Series www.vishay.com Vishay Semiconductors Phase Control Thyristors (Hockey PUK Version), 790 A FEATURES • Center amplifying gate • Metal case with ceramic insulator • International standard case B-PUK (TO-200AC) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 TYPICAL APPLICATIONS • DC motor control • Controlled DC power supplies B-PUK (TO-200AC) • AC controllers PRIMARY CHARACTERISTICS IT(AV) 790 A VDRM/VRRM 2000 V, 2200 V, 2400 V VTM 2.07 V IGT 100 mA TJ -40 °C to +125 °C Package B-PUK (TO-200AC) Circuit configuration Single SCR           MAJOR RATINGS AND CHARACTERISTICS PARAMETER TEST CONDITIONS IT(AV) Ths IT(RMS) Ths ITSM I2t VALUES UNITS 790 A 55 °C 1557 A 25 °C 50 Hz 10 100 60 Hz 10 700 50 Hz 510 60 Hz 475 VDRM/VRRM 2000 to 2400 tq Typical TJ A kA2s V 200 μs -40 to +125 °C IDRM/IRRM MAXIMUM AT TJ = TJ MAXIMUM mA ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS TYPE NUMBER VS-ST650C..L VOLTAGE CODE VDRM/VRRM, MAXIMUM REPETITIVE PEAK AND OFF-STATE VOLTAGE V VRSM, MAXIMUM NON-REPETITIVE PEAK VOLTAGE V 20 2000 2100 22 2200 2300 24 2400 2500 80 Revision: 21-Sep-17 Document Number: 93738 1 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-ST650C..L Series www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Maximum average on-state current  at heatsink temperature Maximum RMS on-state current TEST CONDITIONS 180° conduction, half sine wave Double side (single side) cooled IT(AV) IT(RMS) DC at 25 °C heatsink temperature double side cooled t = 10 ms Maximum peak, one-cycle  non-repetitive surge current t = 8.3 ms ITSM t = 10 ms t = 8.3 ms t = 10 ms Maximum I2t for fusing t = 8.3 ms I2t t = 10 ms t = 8.3 ms Maximum I2t I2t for fusing No voltage reapplied UNITS A 55 (85) °C 1857 10 100 No voltage reapplied 100 % VRRM reapplied VALUES 790 (324) 10 700 A 8600 Sinusoidal half wave, initial TJ = TJ maximum 100 % VRRM reapplied t = 0.1 to 10 ms, no voltage reapplied 9150 510 475 370 kA2s 347 5100 Low level value of threshold voltage VT(TO)1 (16.7 % x  x IT(AV) < I <  x IT(AV)), TJ = TJ maximum 1.04 High level value of threshold voltage VT(TO)2 (I >  x IT(AV)), TJ = TJ maximum 1.13 Low level value of on-state slope resistance rt1 (16.7 % x  x IT(AV) < I <  x IT(AV)), TJ = TJ maximum 0.61 High level value of on-state  slope resistance rt2 (I >  x IT(AV)), TJ = TJ maximum 0.35 Ipk = 1700 A, TJ = TJ maximum, tp = 10 ms sine pulse 2.07 kA2s V m Maximum on-state voltage VTM Maximum holding current IH Typical latching current IL TJ = 25 °C, anode supply 12 V resistive load 600 1000 V mA SWITCHING PARAMETER SYMBOL Maximum non-repetitive rate of rise of turned-on current dI/dt TEST CONDITIONS Gate drive 20 V, 20 , tr  1 μs TJ = TJ maximum, anode voltage  80 % VDRM VALUES UNITS 1000 A/μs Typical delay time td Gate current 1 A, dIg/dt = 1 A/μs Vd = 0.67 % VDRM, TJ = 25 °C 1.0 Maximum turn-off time tq ITM = 750 A, TJ = TJ maximum, dI/dt = 60 A/μs VR = 50, dV/dt = 20 V/μs, Gate 0 V 100 , tp = 500 μs 200 μs BLOCKING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum critical rate of rise of off-state voltage dV/dt TJ = TJ maximum linear to 80 % rated VDRM 500 V/μs Maximum peak reverse and off-state leakage current IRRM, IDRM TJ = TJ maximum, rated VDRM/VRRM applied 80 mA Revision: 21-Sep-17 Document Number: 93738 2 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-ST650C..L Series www.vishay.com Vishay Semiconductors TRIGGERING PARAMETER SYMBOL Maximum peak gate power PGM Maximum average gate power PG(AV) Maximum peak positive gate current IGM Maximum peak positive gate voltage + VGM Maximum peak negative gate voltage - VGM DC gate current required to trigger TYP. MAX. TJ = TJ maximum, tp  5 ms 10.0 TJ = TJ maximum, f = 50 Hz, d% = 50 2.0 200 - TJ = 25 °C 100 200 50 - Maximum required gate trigger/ current/voltage are the lowest value which will trigger all units 12 V anode to cathode applied TJ = 25 °C TJ = 125 °C IGD DC gate voltage not to trigger VGD V TJ = -40 °C TJ = -40 °C VGT DC gate current not to trigger A 20 5.0 TJ = 125 °C Maximum gate current/voltage not to trigger is the maximum value which will not trigger any unit with rated VDRM anode to cathode applied TJ = TJ maximum UNITS W 3.0 TJ = TJ maximum, tp  5 ms IGT DC gate voltage required to trigger VALUES TEST CONDITIONS 2.5 - 1.8 3.0 1.1 - mA V 10 mA 0.25 V VALUES UNITS THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL Maximum operating temperature range Maximum storage temperature range Maximum thermal resistance, junction to heatsink Maximum thermal resistance, case to heatsink TEST CONDITIONS TJ -40 to 125 TStg -40 to 150 RthJ-hs RthC-hs DC operation single side cooled 0.073 DC operation double side cooled 0.031 DC operation single side cooled 0.011 DC operation double side cooled K/W 0.006 Mounting force, ± 10 % Approximate weight Case style °C See dimensions - link at the end of datasheet 14 700 (1500) N (kg) 255 g B-PUK (TO-200AC) RthJ-hs CONDUCTION CONDUCTION ANGLE SINUSOIDAL CONDUCTION SINGLE SIDE DOUBLE SIDE RECTANGULAR CONDUCTION SINGLE SIDE DOUBLE SIDE 180° 0.009 0.009 0.006 0.006 120° 0.011 0.011 0.011 0.011 90° 0.014 0.014 0.015 0.015 60° 0.020 0.020 0.021 0.021 30° 0.036 0.036 0.036 0.036 TEST CONDITIONS UNITS TJ = TJ maximum K/W Note • The table above shows the increment of thermal resistance RthJ-hs when devices operate at different conduction angles than DC Revision: 21-Sep-17 Document Number: 93738 3 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-ST650C..L Series www.vishay.com Vishay Semiconductors 1 30 ST 6 5 0 C ..L Se rie s (Sin g le Sid e C o o le d ) R th J-hs (D C ) = 0 .0 7 3 K / W 1 20 1 10 1 00 C o nduc tion An g le 90 30° 80 60 ° 9 0° 70 1 2 0° 1 8 0° 60 0 50 1 00 1 50 20 0 2 5 0 3 0 0 35 0 4 00 M a x im u m A llo w a b le H e a tsin k Te m p e ra tu re (° C ) M a x im u m A llo w a b le H e a t sin k T e m p e ra t u re ( °C ) 1 30 S T 6 5 0 C ..L S e rie s (D o u b le S id e C o o le d ) R th J-hs (D C ) = 0 .0 3 1 K / W 1 20 1 10 1 00 90 80 Co nd uc tio n Pe rio d 70 60 50 9 0° 40 6 0° 30 0 10 0 90 C o nduc tion A ng le 70 1 8 0° 50 1 2 0° 90° 40 60 ° 30 30° 20 0 10 0 2 00 3 0 0 4 0 0 5 00 6 00 7 0 0 80 0 15 0 0 12 5 0 R M S Lim it 10 0 0 750 C o nd uc tio n A ng le 500 S T 6 5 0 C ..L S e rie s T J = 1 2 5°C 250 0 0 10 0 90 C o nduc tion A ng le 70 1 8 0° 50 1 2 0° 90° 40 60 ° 30 30° 20 0 10 0 2 00 3 0 0 4 0 0 5 00 6 00 7 0 0 80 0 A v e ra g e O n - sta t e C u rre n t (A ) Fig. 3 - Current Ratings Characteristics 2 40 0 M ax im u m A v e ra g e O n - st a t e P o w e r Lo ss (W ) M a xim u m A llo w a b le H e a t sin k T e m p e ra t u re (°C ) ST 6 5 0 C ..L Se rie s (D o u ble S id e C o o le d ) R thJ-h s (D C ) = 0 .0 3 1 K / W 60 1 0 0 2 00 3 0 0 4 0 0 50 0 6 0 0 70 0 8 00 Fig. 5 - On-State Power Loss Characteristics 13 0 80 80 0 10 0 0 1 2 00 1 40 0 A v e ra g e O n -st a t e C u rre n t (A ) Fig. 2 - Current Ratings Characteristics 11 0 60 0 1 8 0° 1 2 0° 90° 60° 30° 17 5 0 A v e ra g e O n - sta t e C u rre n t (A ) 12 0 4 00 20 0 0 M a xim u m A v e ra g e O n -st a te P o w e r Lo ss (W ) M a xim u m A llo w a b le H e a t sin k T e m p e ra t u re (°C ) ST 6 5 0 C ..L Se rie s (D o u ble S id e C o o le d ) R thJ-h s (D C ) = 0 .0 3 1 K / W 60 2 00 Fig. 4 - Current Ratings Characteristics 13 0 80 DC A v e ra g e O n -st a t e C u rre n t (A ) Fig. 1 - Current Ratings Characteristics 11 0 180 ° 20 A v e ra g e O n -s ta t e C u rre n t (A ) 12 0 1 2 0° 30° DC 1 8 0° 1 2 0° 90° 60° 30° 2 20 0 2 00 0 1 80 0 1 60 0 1 40 0 R M S Lim it 1 20 0 1 00 0 8 00 C o ndu ct io n P erio d 6 00 S T 6 5 0 C ..L S e rie s TJ = 1 2 5°C 4 00 2 00 0 0 20 0 4 00 600 80 0 10 0 0 1 20 0 1 4 00 A v e ra g e O n -st a te C urre n t (A ) Fig. 6 - On-State Power Loss Characteristics Revision: 21-Sep-17 Document Number: 93738 4 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-ST650C..L Series www.vishay.com 1 2 00 0 10 0 00 A t A ny R at e d L o a d C o nd itio n A n d W ith R at e d V RR M A p plie d Fo llo w in g Su rge . P e a k H a lf Sin e W a v e O n -st a t e C u rre n t (A ) P e a k H a lf Sin e W a v e O n -st a te C u rre n t (A ) Vishay Semiconductors In itia l TJ = 1 2 5°C @ 6 0 H z 0 .0 0 8 3 s @ 5 0 H z 0 .0 1 0 0 s 9 00 0 8 00 0 7 00 0 6 00 0 5 00 0 ST 6 5 0 C ..L S e r ie s 4 00 0 1 10 M a x im u m N o n R e p e t it iv e S u rg e C u rre n t V e rsu s P u lse T ra in D u ra tio n . C o n t ro l O f C o n d u c t io n M a y N o t B e M a in t a in e d . In it ia l TJ = 1 2 5 °C 1 0 00 0 N o V o lt a g e R e a p p lie d R a te d V R RM Re a p p lie d 90 0 0 1 1 00 0 10 0 80 0 0 70 0 0 60 0 0 S T6 5 0 C ..L S e rie s 50 0 0 40 0 0 0 .0 1 Nu m be r O f Equ al Am p litud e H alf C yc le C urren t Pulse s (N ) 0. 1 1 P u lse T ra in D u ra t io n (s) Fig. 7 - Maximum Non-Repetitive Surge Current Single and Double Side Cooled Fig. 8 - Maximum Non-Repetitive Surge Current Single and Double Side Cooled Instan tan eous On -stat e Current (A) 10000 TJ = 25°C 1000 T = 125°C J ST650C..L Series 100 0. 5 1 1.5 2 2.5 3 Instan tan eous O n -stat e V oltage (V ) Fig. 9 - On-State Voltage Drop Characteristics T ra n sie n t T h e rm a l Im pe d a nc e Z thJ- hs (K / W ) 0. 1 St e a d y St a te V a lu e R thJ-hs = 0 .0 7 3 K/ W (Sin gle Sid e C o o le d) R thJ-hs = 0 .0 3 1 K/ W ( D o u ble Sid e C o o le d ) 0 .0 1 ( D C O p e ra t io n ) ST 6 5 0 C ..L Se rie s 0 .0 0 1 0 .00 1 0.0 1 0 .1 1 10 S q ua re W a v e P u lse D u ra t io n ( s) Fig. 10 - Thermal Impedance ZthJ-hs Characteristics Revision: 21-Sep-17 Document Number: 93738 5 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-ST650C..L Series www.vishay.com Vishay Semiconductors Re c t a n g u la r g a t e p ulse a ) R e c o m m e n d e d lo a d lin e f o r ra t e d d i/ dt : 2 0 V , 1 0 o h m s; t r