VS-ST730CL Series
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Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 990 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case B-PUK (TO-200AC)
• Designed and qualified for industrial level
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
TYPICAL APPLICATIONS
• DC motor controls
B-PUK (TO-200AC)
• Controlled DC power supplies
PRIMARY CHARACTERISTICS
IT(AV)
990 A
VDRM/VRRM
800 V, 1200 V, 1400 V, 1600 V,
1800 V, 2000 V
VTM
1.62 V
IGT
100 mA
TJ
-40 °C to +125 °C
Package
B-PUK (TO-200AC)
Circuit configuration
Single SCR
• AC controllers
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
TEST CONDITIONS
IT(AV)
Ths
IT(RMS)
Ths
ITSM
I2t
VALUES
UNITS
990
A
55
°C
2000
A
25
°C
50 Hz
17 800
60 Hz
18 700
50 Hz
1591
60 Hz
1452
VDRM/VRRM
kA2s
800 to 2000
tq
Typical
TJ
A
V
150
μs
-40 to 125
°C
VOLTAGE RATINGS
TYPE
NUMBER
VS-ST730CL
VOLTAGE
CODE
VRSM, MAXIMUM
VDRM/VRRM, MAXIMUM REPETITIVE
PEAK AND OFF-STATE VOLTAGE NON-REPETITIVE PEAK VOLTAGE
V
V
08
800
900
12
1200
1300
14
1400
1500
16
1600
1700
18
1800
1900
20
2000
2100
IDRM/IRRM MAXIMUM AT
TJ = TJ MAXIMUM
mA
80
Revision: 28-Sep-17
Document Number: 94414
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VS-ST730CL Series
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
SYMBOL
IT(AV)
IT(RMS)
TEST CONDITIONS
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
Maximum peak, one-cycle
non-repetitive surge current
ITSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I2t for fusing
I2t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I2t for fusing
I2t
VALUES
A
55 (85)
°C
2000
No voltage
reapplied
17 800
100 % VRRM
reapplied
15 000
No voltage
reapplied
18 700
Sinusoidal half wave,
initial TJ = TJ maximum
100 % VRRM
reapplied
t = 0.1 to 10 ms, no voltage reapplied
1591
1452
1125
(16.7 % x x IT(AV) < I < x IT(AV)), TJ = TJ maximum
0.98
High level value of threshold voltage
VT(TO)2
(I > x IT(AV)), TJ = TJ maximum
1.12
Low level value of on-state slope resistance
rt1
(16.7 % x x IT(AV) < I < x IT(AV)), TJ = TJ maximum
0.32
High level value of on-state slope resistance
rt2
(I > x IT(AV)), TJ = TJ maximum
0.27
Ipk = 2000 A, TJ = TJ maximum, tp = 10 ms sine pulse
1.62
VTM
IH
Typical latching current
IL
TJ = 25 °C, anode supply 12 V resistive load
kA2s
1027
15 910
VT(TO)1
Maximum holding current
A
15 700
Low level value of threshold voltage
Maximum on-state voltage
UNITS
990 (375)
600
1000
kA2s
V
m
V
mA
SWITCHING
PARAMETER
Maximum non-repetitive rate of rise
of turned-on current
SYMBOL
dI/dt
TEST CONDITIONS
Gate drive 20 V, 20 , tr 1 μs
TJ = TJ maximum, anode voltage 80 % VDRM
VALUES
UNITS
1000
A/μs
Typical delay time
td
Gate current 1 A, dIg/dt = 1 A/μs
Vd = 0.67 % VDRM, TJ = 25 °C
1.0
Typical turn-off time
tq
ITM = 750 A, TJ = TJ maximum, dI/dt = 60 A/μs,
VR = 50 V, dV/dt = 20 V/μs, gate 0 V 100 , tp = 500 μs
150
SYMBOL
TEST CONDITIONS
VALUES
UNITS
μs
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
dV/dt
TJ = TJ maximum linear to 80 % rated VDRM
500
V/μs
Maximum peak reverse and
off-state leakage current
IRRM,
IDRM
TJ = TJ maximum, rated VDRM/VRRM applied
80
mA
Revision: 28-Sep-17
Document Number: 94414
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-ST730CL Series
www.vishay.com
Vishay Semiconductors
TRIGGERING
PARAMETER
SYMBOL
Maximum peak gate power
PGM
Maximum average gate power
PG(AV)
Maximum peak positive gate current
IGM
Maximum peak positive gate voltage
+ VGM
Maximum peak negative gate voltage
- VGM
DC gate current required to trigger
IGT
10.0
2.0
TJ = TJ maximum, tp 5 ms
3.0
V
TJ = -40 °C
200
-
TJ = 25 °C
100
200
TJ = 25 °C
IGD
TJ = TJ maximum
DC gate voltage not to trigger
A
5.0
Maximum required gate
trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
VGD
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated VDRM anode to
cathode applied
UNITS
W
20
TJ = TJ maximum, tp 5 ms
TJ = 125 °C
DC gate current not to trigger
Max.
TJ = TJ maximum, f = 50 Hz, d% = 50
TJ = -40 °C
VGT
Typ.
TJ = TJ maximum, tp 5 ms
TJ = 125 °C
DC gate voltage required to trigger
VALUES
TEST CONDITIONS
50
-
2.5
-
1.8
3.0
1.1
-
mA
V
10
mA
0.25
V
VALUES
UNITS
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
Maximum operating junction temperature range
Maximum storage temperature range
Maximum thermal resistance, junction to heatsink
Maximum thermal resistance, case to heatsink
TEST CONDITIONS
TJ
-40 to 125
TStg
-40 to 150
RthJ-hs
RthC-hs
DC operation single side cooled
0.073
DC operation double side cooled
0.031
DC operation single side cooled
0.011
DC operation double side cooled
K/W
0.006
Mounting force, ± 10 %
Approximate weight
Case style
°C
See dimensions - link at the end of datasheet
14 700
(1500)
N
(kg)
255
g
B-PUK (TO-200AC)
RthJ-hs CONDUCTION
SINUSOIDAL CONDUCTION
RECTANGULAR CONDUCTION
SINGLE SIDE
DOUBLE SIDE
SINGLE SIDE
DOUBLE SIDE
0.009
0.009
0.006
0.006
120°
0.011
0.011
0.010
0.011
90°
0.014
0.014
0.015
0.015
60°
0.020
0.020
0.021
0.021
30°
0.036
0.036
0.036
0.036
CONDUCTION ANGLE
180°
TEST CONDITIONS
UNITS
TJ = TJ maximum
K/W
Note
• The table above shows the increment of thermal resistance RthJ-hs when devices operate at different conduction angles than DC
Revision: 28-Sep-17
Document Number: 94414
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For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-ST730CL Series
130
Vishay Semiconductors
ST730C..L Series
(Single Side Cooled)
RthJ-hs (DC) = 0.073 K/ W
120
110
100
90
Conduction Angle
80
30°
70
60°
90°
60
120°
180°
50
40
0
100
200
300
400
500
600 700
Maximum Allowable Heatsink Temperat ure (°C)
Maximum Allowa ble Heatsink Temperature (°C)
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130
ST730C..L Series
(Double Side Cooled)
RthJ-hs (DC) = 0.031 K/ W
120
110
100
90
80
Conduction Period
70
30°
60
60°
50
90°
120°
40
30
DC
20
0
110
100
90
80
Conduc tion Period
70
60
30°
50
60°
90°
120°
40
30
180°
20
0
200
400
600
DC
800
1000 1200
Maximum Average On-state Power Loss (W)
Maximum Allowable Heatsink Temperature (°C)
120
180°
120°
90°
60°
30°
2000
120
110
100
90
Conduction Angle
80
70
60
50
30°
60°
40
30
90°
120°
180°
20
0
200
400
600
800 1000 1200 1400
RMS Limit
1500
1000
Conduc tion Angle
500
ST730C..L Series
TJ = 125°C
0
0
200
400
600
800 1000 1200 1400
Average On-state Current (A)
Fig. 5 - On-State Power Loss Characteristics
Maximum Average On-state Power Loss (W)
Maximum Allowable Heatsink Temperature (°C)
ST730C..L Series
(Double Side Cooled)
RthJ-hs (DC) = 0.031 K/ W
1200 1600 2000 2400
2500
Average On-state Current (A)
Fig. 2 - Current Ratings Characteristics
130
800
Fig. 4 - Current Ratings Characteristics
Fig. 1 - Current Ratings Characteristics
ST730C..L Series
(Single Side Cooled)
R thJ-hs (DC) = 0.073 K/ W
400
Average On-state Current (A)
Average On-state Current (A)
130
180°
3500
DC
180°
120°
90°
60°
30°
3000
2500
2000
RMS Limit
1500
Conduction Period
1000
ST730C..L Series
TJ = 125°C
500
0
0
400
800
1200 1600 2000 2400
Average On-state Current (A)
Fig. 3 - Current Ratings Characteristics
Fig. 6 - On-State Power Loss Characteristics
Revision: 28-Sep-17
Document Number: 94414
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For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-ST730CL Series
16000
Vishay Semiconductors
Peak Half Sine Wave On-state Current (A)
Peak Half Sine Wave On-state Current (A)
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At Any Rated Load Condition And With
Rated VRRM Applied Following Surge.
Initial TJ = 125°C
@60 Hz 0.0083 s
@50 Hz 0.0100 s
15000
14000
13000
12000
11000
10000
9000
ST730C..L Series
8000
7000
1
10
100
18000
Maximum Non Repetitive Surge Current
Versus Pulse Train Duration. Control
16000 Of Conduc tion May Not Be Maintained.
Initial TJ = 125°C
15000
No Voltage Reapplied
Rated VRRMReapplied
14000
17000
13000
12000
11000
10000
9000
8000
ST730C..L Series
7000
0.01
0.1
1
Pulse Train Duration (s)
Numb er Of Equal Amplitude Half Cycle Current Pulses (N)
Fig. 7 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Instantaneous On-state Current (A)
10000
TJ = 25°C
TJ = 125°C
1000
ST730C..L Series
100
0.5
1
1.5
2
2.5
3
3.5
Instantaneous On-state Voltage (V)
Transient Thermal Impedance ZthJ-hs (K/ W)
Fig. 9 - On-State Voltage Drop Characteristics
0.1
Steady State Value
R thJ-hs = 0.073 K/ W
(Single Side Cooled)
R thJ-hs = 0.031 K/ W
(Double Side Cooled)
0.01
(DC Operation)
ST730C..L Series
0.001
0.001
0.01
0.1
1
10
Square Wave Pulse Duration (s)
Fig. 10 - Thermal Impedance ZthJ-hs Characteristics
Revision: 28-Sep-17
Document Number: 94414
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For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-ST730CL Series
www.vishay.com
Vishay Semiconductors
Rec tangular gate pulse
a) Recommended load line for
rated di/ dt : 20V, 10ohms; tr
