XC6109C42ANR-G

XC6109 Series ETR0206_006 Voltage Detector with External Delay Type Capacitor ■GENERAL DESCRIPTION The XC6109 series is highly precise, low power consumption voltage detector, manufactured using CMOS and laser trimming technologies. With the built-in delay circuit, connecting the delay capacitance pin to the capacitor enables the IC to provide an arbitrary release delay time. Using a small package (SSOT-24), the series is suited for high density mounting. Both CMOS and N-channel open drain output configurations are available. ■APPLICATIONS ■FEATURES ●Microprocessor reset circuitry Highly Accurate : +2% (Setting Voltage Accuracy>1.5V) ●Charge voltage monitors : +30mV ●Memory battery back-up switch circuits ●Power failure detection circuits (Setting Voltage Accuracy VDF), therefore, the output voltage maintains the “High”(=VIN) level. ●Release Delay Time Chart Delay Capacitance [Cd] (μF) 0.01 0.022 0.047 0.1 0.22 0.47 1 Release Delay Time [tDR] (TYP.) (ms) 13.8 30.4 64.9 138 304 649 1380 Release Delay Time [tDR] (MIN. ~ MAX.) *1 (ms) 11.0 ~ 16.6 24.3 ~ 36.4 51.9 ~ 77.8 110 ~ 166 243~ 364 519 ~ 778 1100 ~ 1660 * The release delay time values above are calculated by using the formula (2). *1: The release delay time (tDR) is influenced by the delay capacitance Cd. 7/14 XC6109 Series ■OPERATIONAL EXPLANATION (Continued) Figure 1: Typical application circuit example The circuit which uses the delay Capacitance pin as power input. VIN M2 RSEN=R1+R2+R3 M4 R1 - VOUT Rdelay R2 + VIN Vref M5 R3 M3 M1 Cd VSS Delay Capacitor [Cd] N-ch transictor for the delay Capacitance discharge. Cd Figure 2: The timing chart of Figure 1 VIN Input Voltage: VIN Release Voltage: V VDF+VHYS DF+VHYS Detect Voltage: VDF Minimum Operating Voltage (0.7V) Delay Capacitance Pin Voltage:V VCD CD VTCD Delay Capacitance Pin Threshold Voltage: VTCD Output Pin Voltage: V VOUT OUT ① ③ ② 8/14 ④ ⑤ ⑦ ⑥ ⑧ XC6109 Series ■NOTES ON USE 1. Use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent damage to the device. 2. The input pin voltage drops by the resistance between power supply and the VIN pin, and by through current at operation of the IC. At this time, the operation may be wrong if the input pin voltage falls below the minimum operating voltage range. In CMOS output, for output current, drops in the input pin voltage similarly occur. Oscillation of the circuit may occur if the drops in voltage, which caused by through current at operation of the IC, exceed the hysteresis voltage. Note it especially when you use the IC with the VIN pin connected to a resistor. 3. Note that a rapid and high fluctuation of the input pin voltage may cause a wrong operation. 4. Power supply noise may cause operational function errors, Care must be taken to put the capacitor between VIN-GND and test on the board carefully. 5. When there is a possibility of which the input pin voltage falls rapidly (e.g.: 6.0V to 0V) at release operation with the delay capacitance pin (Cd) connected to a capacitor, use a schottky barrier diode connected between the VIN pin and the Cd pin as the Figure 3 shown below. 6. When N-ch open drain output is used, output voltages VOUT at voltage detection and release are determined by a pull-up resistor tied to the output pin. A resistance value of the pull-up resistor can be selected with referring to the followings. (Refer to Figure 4) During detection, the formula is given as VOUT=Vpull/(1+Rpull/RON) where Vpull is pull-up voltage and RON (*1) is ON resistance of N-ch driver M5 (RON=VDS/IOUT1 from the electrical characteristics table). For example, when VIN=2.0V (*2), RON = 0.5/0.8×10-3=625Ω(MIN.) and if you want to get VOUT less than 0.1V when Vpull=3.0V, Rpull can be calculated as follows; Rpull=(Vpull /VOUT-1)×RON=(3/0.1-1)×625≒18ｋΩ Therefore, pull-up resistance should be selected 18kΩ or higher. (*1) VIN is smaller, RON is bigger (*2) For the calculation, the lowest VIN should be used among of the VIN range During release, the formula is given as VOUT=Vpull/(1+Rpull/Roff) where Vpull is pull-up voltage Roff is OFF resistance of N-ch driver M5 (Roff=VOUT/ILEAK=15MΩ from the electrical characteristics table) For examples, if you want to get VOUT larger than 5.99V when Vpull is 6.0V, Rpull can be calculated as follows; Rpull=(Vpull/VOUT-1)×Roff=(6/5.99-1)×15×106≒25kΩ Therefore, pull-up resistance should be selected 25kΩ or below. (No resistor needed for CMOS output products) Figure 3: Circuit example with the delay capacitance pin (Cd) connected to a schottky barrier diode Note: Roff=VOUT/ILEAK Figure 4: Circuit example of XC6109N Series 9/14 XC6109 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (1) Supply Current vs. Input Voltage (2) Detect Voltage vs. Ambient Temperature XC6109x25A N XC6109x25A N 2.0 2.55 Detect Voltage: VDF (V) Supply Current: ISS (μA) Ta=85℃ 1.5 25℃ 1.0 -40℃ 0.5 0.0 2.50 2.45 0 1 2 3 4 5 6 -50 -25 Input V oltage: V IN (V ) 0 25 50 75 100 A mbient Temperature: Ta ( ℃ ) (3) Hysteresis Voltage vs. Ambient Temperature XC6109x25A N Hysteresis Voltage : VHYS (V) 0.20 0.15 0.10 0.05 -50 -25 0 25 50 75 100 A mbient Temperature: Ta ( ℃ ) (4) Output Voltage vs. Input Voltage XC6109C25A N No Pull-up 4.0 XC6109N25AN Output Voltage: VOUT (V) Pull-up=V IN R=100kΩ 4.0 Output Voltage: VOUT (V) 3.0 Ta=85℃ 25℃ -40℃ 2.0 1.0 0.0 -1.0 0 10/14 0.5 1 1.5 2 Input V oltage: V IN (V ) 2.5 3 3.0 Ta=85℃ 2.0 25℃ 1.0 -40℃ 0.0 -1.0 0 0.5 1 1.5 2 2.5 Supply Voltage: Input Voltage: VINVIN (V) (V) 3 XC6109 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (5) Output Current vs. Input Voltage XC6109C08A N XC6109x50A N VDS(N-ch)=0.5V Ta=-40℃ 3.0 25℃ 2.0 85℃ 1.0 VDS(P-ch)=0.5V 0.0 Output Current: IOUT (mA) Output Current: IOUT (mA) 4.0 Ta=85℃ -0.5 -1.0 25℃ -1.5 -2.0 0.0 0 1 2 3 4 5 0 6 1 Input Voltage: V IN (V ) (6) Cd Pin Sink Current vs. Input Voltage Delay Resistance: Rdelay (MΩ ) Cd Pin Sink Current: ICD (mA) 4 Ta=-40℃ 25℃ 1.5 1.0 85℃ 0.5 0.0 3.5 3 2.5 2 1.5 1 -50 0 1 2 3 4 Input V oltage: V IN (V ) 5 6 (8) Release Delay Time vs. Delay Capacitance -25 25 50 75 100 (9) Detect Delay Time vs. Delay Capacitance XC6109xxxA N VIN(MIN.)=0.7V,VIN(MAX.)=6.0V VIN(MIN.)=0.7V, VIN(MAX.)=6.0V 100 10 1 0.001 0.01 0.1 Delay Capacitance: Cd (μF) 1 Tf=5μs, Ta=25℃ 100000 Detect Delay Time: TDF (μs) Tr=5μs, Ta=25℃ 1000 0.1 0.0001 0 Ambient Temperature: Ta (℃ ) XC6109xxxA N 10000 6 V CD=0.0V VIN=6.0V VDS=0.5V 2.0 5 XC6109xxxAN 3.0 2.5 2 3 4 Input V oltage: V IN (V ) (7) Delay Resistance vs. Ambient Temperature XC6109x50A N Release Delay Time: TDR (ms) -40℃ 10000 1000 100 10 1 0.0001 0.001 0.01 0.1 1 Delay Capacitance: Cd (μF) 11/14 XC6109 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (10) Leak Current vs. Ambient Temperature (11) Leak Current vs. Output Voltage XC6109N25AN XC6109N25AN VIN=6.0V 0.25 0.25 Leak Current: ILEAK (μA) Leak Carrent: ILEAK ( μ A) V IN=6.0V V OUT=6.0V 0.20 0.15 0.10 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃ ) 12/14 100 0.20 0.15 0.10 0 1 2 3 4 5 Output Voltage: VOUT (V) 6 XC6109 Series ■PACKAGING INFORMATION ●SSOT-24 ■MARKING RULE ●SSOT-24 4 3 ① Represents output configuration and integer number of detect voltage CMOS output (XC6109C Series) N-ch Open Drain output (XC6109N Series) MARK VOLTAGE (V) ① 1 ② ④ 2 SSOT-24 (TOP VIEW) A B C D E F 0.x 1.x 2.x 3.x 4.x 5.x PRODUCT SERIES MARK VOLTAGE (V) XC6109C0xxNx XC6109C1xxNx XC6109C2xxNx XC6109C3xxNx XC6109C4xxNx XC6109C5xxNx K L M N P R 0.x 1.x 2.x 3.x 4.x 5.x PRODUCT SERIES XC6109N0xxNx XC6109N1xxNx XC6109N2xxNx XC6109N3xxNx XC6109N4xxNx XC6109N5xxNx ②Represents decimal number of detect voltage MARK VOLTAGE (V) PRODUCT SERIES N P R S T U V X Y Z x.0 x.1 x.2 x.3 x.4 x.5 x.6 x.7 x.8 x.9 XC6109xx0xNx XC6109xx1xNx XC6109xx2xNx XC6109xx3xNx XC6109xx4xNx XC6109xx5xNx XC6109xx6xNx XC6109xx7xNx XC6109xx8xNx XC6109xx9xNx ④Represents production lot number 0 to 9, A to Z or inverted characters of 0 to 9, A to Z repeated/ (G, I, J, O, Q, W excluded) 13/14 XC6109 Series 1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this datasheet is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this datasheet. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this datasheet. 4. The products in this datasheet are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this datasheet within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this datasheet may be copied or reproduced without the prior permission of TOREX SEMICONDUCTOR LTD. 14/14