XC6119N15A7R-G

XC6119 Series ETR02016-005 Voltage Detector with Delay Time Adjustable ■GENERAL DESCRIPTION The XC6119 series is a highly precise, low power consumption voltage detector, manufactured using CMOS and laser trimming technologies. The device includes the built-in delay circuit. A release delay time can be set freely by connecting an external delay capacitor to the Cd pin. The device using an ultra small package (USPN-4) is suited for high density mounting applications. Both CMOS and N-channel open drain output configurations are available. ■APPLICATIONS ■FEATURES ● Microprocessor reset circuitry High Accuracy : ±2% (Detection Voltage >1.5V) ● Charge voltage monitors ±30mV ● Memory battery back-up switch circuits ● Power failure detection circuits (Detection Voltage VDF), the output voltage (VOUT) keeps the “High” level (=VIN). ② When the input pin voltage keeps dropping and becomes equal to the detect voltage (VIN = VDF), an N-ch transistor for the delay capacitance discharge is turned ON, and starts to discharge the delay capacitance. For the internal circuit, which uses the delay capacitance pin as power input, the reference voltage operates as a comparator of VIN, and the output voltage changes into the “Low” level (≦VIN×0.1). The detect delay time (tDF) is defined as time which ranges from VIN =VDF to the VOUT of “Low” level (especially, when the Cd pin is not connected: tDF0). 8/17 XC6119 Series ■OPERATIONAL EXPLANATION (Continued) ③ While the input pin voltage keeps below the detect voltage, and 0.7V or more, the delay capacitance is discharged to the ground voltage (=VSS) level. Then, the output voltage (VOUT) maintains the “Low” level. ④ While the input pin voltage drops to less than 0.7V and it increases again to 0.7V or more, the output voltage may not be able to maintain the “Low” level. Such an operation is called “Unspecified Operation”, and voltage which occurs at the output pin voltage is defined as unstable operating voltage (VUNS). ⑤ While the input pin voltage increases more than 0.7V and it reaches to the release voltage level (VIN＜VDF +VHYS), the output voltage (VOUT) maintains the “Low” level. ⑥ When the input pin voltage continues to increase more than 0.7V up to the release voltage level (= VDF + VHYS), the N-ch transistor for the delay capacitance discharge will be turned OFF, and the delay capacitance will be started discharging via a delay resistor (RDELAY). The internal circuit, which uses the delay capacitance pin as power input, will operate as a hysteresis comparator (Rise Logic Threshold: VTLH=VTCD, Fall Logic Threshold: VTHL=VSS) while the input pin voltage keeps higher than the detect voltage (VIN > VDF). ⑦ While the input pin voltage becomes equal to the release voltage or higher and keeps the detect voltage or higher, the delay capacitance (Cd) will be charged up to the input pin voltage. When the delay capacitance pin voltage (VCD) reaches to the delay capacitance pin threshold voltage (VTCD), the output voltage changes into the “High” (=VIN) level. tDR is defined as time which ranges from VIN =VDF+VHYS to the VOUT of “High” level (especially when the Cd pin is not connected: tDR0). tDR can be given by the formula (1). tDR = - RDELAY×Cd×In (1 - VTCD / VIN) +tDR0 …(1) * In = a natural logarithm The release delay time can also be briefly calculated with the formula (2) because the delay resistance is 2.0MΩ(TYP.) and the delay capacitance pin threshold voltage is VIN /2 (TYP.) tDR=RDELAY×Cd×0.69 …(2) * RDELAY is 2.0MΩ(TYP.) As an example, presuming that the delay capacitance is 0.68μF, tDR is : 2.0×106×0.68×10-6×0.69=938(ms) * Note that the release delay time may remarkably be short when the delay capacitance is not discharged to the ground (=VSS) level because time described in ③ is short. ⑧ While the input pin voltage is higher than the detect voltage (VIN > VDF), therefore, the output voltage maintains the “High”(=VIN) level. ●Release Delay Time Chart Delay Capacitance [Cd] (μF) Release Delay Time [tDR] (TYP.) (ms) Release Delay Time [tDR] (MIN. ~ MAX.) *1 (ms) 0.01 13.8 11.0 ~ 16.6 0.022 30.4 24.3 ~ 36.4 0.047 64.9 51.9 ~ 77.8 0.1 138 110 ~ 166 0.22 304 243 ~ 364 0.47 649 519 ~ 778 1 1380 1100 ~ 1660 * The release delay time values above are calculate by using formula (2). The release delay time (tDR) is influenced by the release capacitance (Cd). (*1) 9/17 XC6119 Series ■NOTES ON USE 1. Please use this IC within the stated maximum ratings. For temporary, transitional voltage drop or voltage rising phenomenon, the IC is liable to malfunction should the ratings be exceeded. 2. The input pin voltage drops by the resistance between power supply and the VIN pin, and by through current at operation of the IC. At this time, the operation may be wrong if the input pin voltage falls below the minimum operating voltage range. In CMOS output, for output current, drops in the input pin voltage similarly occur. Oscillation of the circuit may occur if the drops in voltage, which caused by through current at operation of the IC, exceed the hysteresis voltage. Note it especially when you use the IC with the VIN pin connected to a resistor. 3. Note that a rapid and high fluctuation of the input pin voltage may cause a wrong operation. 4. Power supply noise may cause an operational function error. Care must be taken to put an external capacitor between VINGND and test on the board carefully. 5. If the VIN pin voltage drops sharply (example: 6.0V to 0V) during the release operation with a Cd (delay capacitance) connected to the Cd pin, an overcurrent will flow through the diode between the Cd and VIN pin. If the fluctuation range of the VIN pin during the release operation is less than 1.0V, no special measures are required, but if the Cd is 0.1μF or more and the power supply voltage fluctuation is 0.01V/μs or more, please take either one of the following measures. ・ To place a Schottky diode between the VIN pin and the Cd pin. (See Figure 3) ・ To place a resistance (RCd) of 500Ω to 1kΩ between the Cd and Cd pin. (See Figure 4) * Please note if the RCd is connected between the Cd and Cd pin, the Cd discharge time will be longer. When connecting the RCd, please confirm in advance that there is no problem in actual operation. VIN VIN Rpull SBD VOUT Cd VIN Cd Rpull RCd VOUT Cd VOUT VIN VSS VSS Cd Figure 3: Circuit example with a Schottky diode connected to the Cd pin 10/17 Figure 4: Circuit example with a resistor connected to the Cd pin VOUT XC6119 Series ■NOTES ON USE 6. When N-channel open drain output is used, output voltages VOUT at voltage detection and release are determined by a pullup resistor tied to the output pin. A resistance value of the pull-up resistor can be selected with referring to the followings. (Refer to Figure 5) During detection, the formula is given as VOUT=VPULL/(1+RPULL/RON) where VPULL is pull-up voltage and RON (*1) is ON resistance of N-channel driver M5 (RON=VDS/IOUT1 from the electrical characteristics table). For example, when VIN=2.0V (*2), RON = 0.5/0.8×10-3=625Ω(MIN.) and if you want to get VOUT less than 0.1V when VPULL=3.0V, RPULL can be calculated as follows; RPULL=(VPULL /VOUT-1)×RON=(3/0.1-1)×625≒18kΩ Therefore, pull-up resistance should be selected 18kΩ or higher. (*1) VIN is smaller, RON is bigger (*2) For the calculation, the lowest VIN should be used among of the VIN range During release, the formula is given as VOUT=VPULL/(1+RPULL/ROFF) where VPULL is pull-up voltage ROFF is OFF resistance of N-channel driver M5 (ROFF=VOUT/ILEAK=15MΩ from the electrical characteristics table) For examples, if you want to get VOUT larger than 5.99V when VPULL is 6.0V, RPULL can be calculated as follows; RPULL=(VPULL/VOUT-1)×ROFF=(6/5.99-1)×15×106≒25kΩ Therefore, pull-up resistance should be selected 25kΩ or below. VPULL VIN RSEN=R1+R2+R3 M2 RPULL R1 - VIN R2 ILEAK RDELAY + M5 VOUT Vref R3 M1 M3 Cd VSS Figure 5: Circuit example of XC6119N 7. Torex places an importance on improving our products and their reliability. We request that users incorporate fail-safe designs and post-aging protection treatment when using Torex products in their systems. 11/17 XC6119 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (1) Supply Current vs. Input Voltage (2) Detect Voltage vs. Ambient Temperature XC6119x25Ax 2.55 2.0 Detect Voltage: VDF (V) Supply Current: ISS (μA) XC6119x25Ax Ta=85℃ 25℃ 1.5 1.0 -40℃ 0.5 2.50 2.45 0.0 1 0 2 3 4 5 75 50 25 0 -25 -50 6 100 Ambient Temperature: Ta (℃) Input Voltage: VIN (V) (3) Hysteresis Voltage vs. Ambient Temperature Hysteresis Voltage: VHYS (V) XC6119x25Ax 0.20 0.15 0.10 0.05 -50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃) (4) Output Voltage vs. Input Voltage XC6119N25Ax No Pull-up 4.0 Output Voltage: VOUT (V) Output Voltage: VOUT (V) XC6119C25Ax 3.0 2.0 Ta=85℃ 25℃ -40℃ 1.0 0.0 -1.0 0 0.5 1 1.5 2 Input Voltage: VIN (V) 12/17 2.5 3 Pull-up=VIN R=100kΩ 4.0 3.0 Ta=85℃ 2.0 25℃ 1.0 -40℃ 0.0 -1.0 0 0.5 1 1.5 2 Input Voltage: VIN (V) 2.5 3 XC6119 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (5) Output Current vs. Input Voltage XC6119x50Ax XC6119C08Ax VDS(pch)=0.5V Output Current: IOUT (mA) Output Current: IOUT (mA) VDS(nch)=0.5V 4.0 Ta=-40℃ 3.0 25℃ 2.0 85℃ 1.0 0.0 0 1 2 3 4 5 6 0.0 -0.5 Ta=85℃ -1.0 25℃ -1.5 -2.0 0 1 Input Voltage: VIN (V) Delay Resistance: Rdelay (MΩ) Cd PIN Current: ICD (mA) VDS=0.5V Ta=-40℃ 25℃ 1.5 1.0 85℃ 0.5 0.0 1 2 3 4 5 6 3.5 3 2.5 2 1.5 1 -50 -25 Detect Delay Time: t DF (μs) Release Delay Time: t DR (ms) 1000 100 10 tDR=Cd×2.0×106 ×0.69 0.01 0.1 Delay Capacitance: Cd (μF) 25 50 75 100 XC6119xxxAx VIN(min)=0.7V VIN(max)=6.0V tr=5μs Ta=25℃ 0.001 0 (9) Detect Delay Time vs. Delay Capacitance XC6119xxxAx 0.1 0.0001 6 Ambient Temperature: Ta (℃) (8) Release Delay Time vs. Delay Capacitance 1 5 VCD=0.0V VIN=6.0V 4 Input Voltage: VIN (V) 10000 4 XC6119xxxAx 3.0 0 3 (7) Delay Resistance vs. Ambient Temperature XC6119x50Ax 2.0 2 Input Voltage: VIN (V) (6) Cd Pin Sink Current vs. Input Voltage 2.5 -40℃ 1 VIN(min)=0.7V VIN(max)=6.0V tf=5μs Ta=25℃ 100000 10000 1000 100 10 1 0.0001 0.001 0.01 0.1 1 Delay Capacitance: Cd (μF) 13/17 XC6119 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (10) Leak Current vs. Ambient Temperature (11) Leak Current vs. Supply Voltage XC6119N25Ax VIN=6.0V VOUT=6.0V 0.25 Leak Current: ILEAK (μA) Leak Current: ILEAK (μA) XC6119N25Ax 0.20 0.15 0.10 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 14/17 100 VIN=6.0V 0.25 0.20 0.15 0.10 0 1 2 3 4 5 Output Voltage: VOUT (V) 6 XC6119 Series ■PACKAGING INFORMATION For the latest package information go to, www.torexsemi.com/technical-support/packages PACKAGE OUTLINE / LAND PATTERN THERMAL CHARACTERISTICS SSOT-24 SSOT-24 PKG SSOT-24 Power Dissipation USPN-4 USPN-4 PKG USPN-4 Power Dissipation 15/17 XC6119 Series ■MARKING RULE 3 ② ④ ③ ① represents output configuration and integer number of detect voltage ① 4 ●SSOT-24 CMOS Output (XC6119C Series) MARK A B C D E F VOLTAGE (V) 0.X 1.X 2.X 3.X 4.X 5.X PRODUCT SERIES XC6119C0**N* XC6119C1**N* XC6119C2**N* XC6119C3**N* XC6119C4**N* XC6119C5**N* N-channel Open Drain Output (XC6119N Series) MARK H K L M N P VOLTAGE (V) 0.X 1.X 2.X 3.X 4.X 5.X PRODUCT SERIES XC6119N0**N* XC6119N1**N* XC6119N2**N* XC6119N3**N* XC6119N4**N* XC6119N5**N* ② represents decimal number of detect voltage MARK VOLTAGE (V) PRODUCT SERIES N P R S T U V X Y Z X.0 X.1 X.2 X.3 X.4 X.5 X.6 X.7 X.8 X.9 XC6119**0*N* XC6119**1*N* XC6119**2*N* XC6119**3*N* XC6119**4*N* XC6119**5*N* XC6119**6*N* XC6119**7*N* XC6119**8*N* XC6119**9*N* ③④ represents production lot number 01 to 09, 0A to 0Z,11 to 9Z, A1 to A9,AA to Z9,ZA to ZZ repeated (G, I, J, O, Q, W excluded). Note: No character inversion used. 16/17 1 2 SSOT-24 (TOP VIEW) XC6119 Series ■ MARKING RULE (Continued) ●USPN-4 ① represents product series. MARK B 1 PRODUCT SERIES XC6119******-G 2 ② represents output configuration and integer number of detect voltage VOLTAGE (V) 0.X 1.X 2.X 3.X 4.X 5.X ② 4 ④ ⑤ 3 USPN-4 (TOP VIEW) CMOS Output (XC6119C Series) MARK A B C D E F ③ ① PRODUCT SERIES XC6119C0**7*-G XC6119C1**7*-G XC6119C2**7*-G XC6119C3**7*-G XC6119C4**7*-G XC6119C5**7*-G N-channel Open Drain Output (XC6119N Series) MARK H K L M N P VOLTAGE (V) 0.X 1.X 2.X 3.X 4.X 5.X PRODUCT SERIES XC6119N0**7*-G XC6119N1**7*-G XC6119N2**7*-G XC6119N3**7*-G XC6119N4**7*-G XC6119N5**7*-G ③ represents decimal number of detect voltage MARK VOLTAGE (V) PRODUCT SERIES N P R S T U V X Y Z X.0 X.1 X.2 X.3 X.4 X.5 X.6 X.7 X.8 X.9 XC6119**0*7*-G XC6119**1*7*-G XC6119**2*7*-G XC6119**3*7*-G XC6119**4*7*-G XC6119**5*7*-G XC6119**6*7*-G XC6119**7*7*-G XC6119**8*7*-G XC6119**9*7*-G ④⑤ represents production lot number 01 to 09, 0A to 0Z,11 to 9Z, A1 to A9,AA to Z9,ZA to ZZ repeated (G, I, J, O, Q, W excluded). Note: No character inversion used. 17/17 XC6119 Series 1. The product and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this datasheet is up to date. 2. The information in this datasheet is intended to illustrate the operation and characteristics of our products. We neither make warranties or representations with respect to the accuracy or completeness of the information contained in this datasheet nor grant any license to any intellectual property rights of ours or any third party concerning with the information in this datasheet. 3. Applicable export control laws and regulations should be complied and the procedures required by such laws and regulations should also be followed, when the product or any information contained in this datasheet is exported. 4. The product is neither intended nor warranted for use in equipment of systems which require extremely high levels of quality and/or reliability and/or a malfunction or failure which may cause loss of human life, bodily injury, serious property damage including but not limited to devices or equipment used in 1) nuclear facilities, 2) aerospace industry, 3) medical facilities, 4) automobile industry and other transportation industry and 5) safety devices and safety equipment to control combustions and explosions. Do not use the product for the above use unless agreed by us in writing in advance. 5. Although we make continuous efforts to improve the quality and reliability of our products; nevertheless Semiconductors are likely to fail with a certain probability. So in order to prevent personal injury and/or property damage resulting from such failure, customers are required to incorporate adequate safety measures in their designs, such as system fail safes, redundancy and fire prevention features. 6. Our products are not designed to be Radiation-resistant. 7. Please use the product listed in this datasheet within the specified ranges. 8. We assume no responsibility for damage or loss due to abnormal use. 9. All rights reserved. No part of this datasheet may be copied or reproduced unless agreed by Torex Semiconductor Ltd in writing in advance. TOREX SEMICONDUCTOR LTD. 17/17