XC612 Series
2-Channel Voltage Detectors
ETR0204_001
■GENERAL DESCRIPTION
The XC612 series consist of 2 voltage detectors, in 1 mini-molded, SOT-25 package. The series provides accuracy and low power consumption through CMOS processing and laser trimming and consists of a highly accurate voltage reference source, 2 comparators, hysteresis and output driver circuits. The input (VIN1) for voltage detector 1 (VD1) dually functions as the power supply pin for both detector 1 (VD1) and detector 2 (VD2).
■APPLICATIONS
●Microprocessor reset circuitry ●Memory battery back-up circuits ●Power-on reset circuits ●Power failure detection ●System battery life and charge voltage monitors ●Delay circuitry
■FEATURES
Highly Accurate Low Power Consumption
: Setting voltage accuracy ±2% : 2.0μA(TYP.) (VIN1=VIN2=2.0V, Static state) Detect Voltage : 1.5V ~ 5.0V programmable in 100mV steps. Detector’s voltages can be set-up independently Conditionaly; XC612N : VDET1>VDET2 XC612D, XC612E : VDET1>VDET2, VDET1 VIN2 (Input voltage of XC612D and XC612E series : please ensure that VIN1 > VIN2, VIN1 < VIN2.) *5 : VIN1 pin serve both ISS and power supply pin so that VIN2 operates VIN1 as a power supply source. For normal operation of VIN2, operating voltage higher than the minimum is needed to be applied to power supply pin VIN1. *6 : For CMOS output products, high level output voltage which is generated when the transient response is released becomes input voltage of VIN.
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■OPERATONAL EXPLANATION
●Timing Chart (Pull up voltage =Input voltage VIN1)
●Operational Notes (N-ch Open drain) Timing Chart A (VIN1=voltages above release voltage, VIN2=sweep voltage)
Because a voltage higher than the minimum operating voltage is applied to the voltage input pin (VIN), ground voltage will be output at the output pin (VDET) during stage 3. (Stages 1, 2, 4, 5 are the same as in B below).
Timing Chart B (VIN1=VIN2)
① When a voltage greater than the release voltage (VDR) is applied to the voltage input pin (VIN1, VIN2), input voltage (VIN1, VIN2) will gradually fall. When a voltage greater than the detect voltage (VDF) is applied to the voltage input pin (VIN1, VIN2), a state of high impedance will exist at the output pin (VDET1, VDET2), so should the pin be pulled up, voltage will be equal to pull up voltage. ② When input voltage (VIN1, VIN2) falls below detect voltage (VDF), output voltage (VDET1, VDET2) will be equal to ground level (VSS). ③ Should input voltage (VIN1, VIN2) fall below the minimum operational voltage (VMIN), output will become unstable. Should VIN2 fall below VMIN, voltage at the output pin (VDET2) will be equal to ground level (VSS) if the power supply (VIN1) is within the operating voltage range. *In general the output pin is pulled up so output will be equal to pull up voltage. ④ Should input voltage (VIN1, VIN2) rise above ground voltage (VSS), output voltage (VDET1, VDET2) will equal ground level until the release voltage level (VDR) is reached. ⑤ When input voltage (VIN1, VIN2) rises above release voltage, the output pin's (VDET1, VDET2) voltage will be equal to the voltage dependent on pull up. Note : The difference between release voltage (VDR) and detect voltage (VDF) is the Hysteresis Range ⑥.
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■NOTES ON USE
1. Please use this IC within the specified maximum absolute ratings. 2. Please ensure that input voltage VIN2 is less than VIN1 + 0.3V. (refer to N.B. 1 below) 3. With a resistor connected between the VIN1 pin and the input, oscillation is liable to occur as a result of through current at the time of release. (refer to N.B. 2 below) 4. With a resistor connected between the VIN1 pin and the input, detect and release voltage will rise as a result of the IC's supply current flowing through the VIN1 pin. 5. In order to stabilize the IC's operations, please ensure that the VIN1 pin's input frequency's rise and fall times are more than 5 msec/V. 6. Should the power supply voltage VIN1 exceed 6V, voltage detector 2's detect voltage (VDF2) and the release voltage (VDR2) will shift somewhat. 7. For CMOS output products, high level output voltage which is generated when the transient response is released becomes input voltage of VIN.
●N.B.
1. Voltage detector 2's input voltage (VIN2) An input protect diode is connected from input detector 2's input (VIN2) to input detector 1's input. Therefore, should the voltage applied to VIN2 exceed VIN1, current will flow through VIN1 via the diode. (refer to diagram1) 2. Oscillation as a result of through current Since the XC612 series are CMOS ICs, through current will flow when the IC's internal circuit switching operates (during release and detect operations). Consequently, oscillation is liable to occur as a result of drops in voltage at the through current's resistor (RIN) during release voltage operations. (refer to diagram 2) Since hysteresis exists during detect operations, oscillation is unlikely to occur.
Diagram 1. Voltage detector 2's input voltage VIN2
Diagram 2. Through current oscillation
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■TEST CIRCUITS
Circuit 1
* A resistor is not needed for CMOS output type.
Circuit 2
Circuit 3
XC612N Series
XC612D Series
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■TEST CIRCUITS (Continued)
Circuit 3 (Continued)
XC612E Series
Circuit 4
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■TYPICAL PERFORMANCE CHARACTERISTICS
Ambient Temperature Topr (℃)
Ambient Temperature Topr (℃)
Note: Unless otherwise stated, pull up resistance = 100kΩwith N-ch open drain output type.
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■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
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■APPLICATION CIRCUITS EXAMPLE *Example covers N-channel open drain product's circuits
●Window comparator circuit
●Detect voltages above respective established voltages circuit
On resistors R1 and R2 equation (1) and (2) Detect voltage = { (R1 + R2) ÷ R2} × VDF2 N.B. VDF2 = detect voltage VD2 Hysteresis (VHYS2) = { (R1 + R2) ÷R2 } × VHYS2
(1) (2)
Note: Please ensure that input voltage 2 (VIN2) is less than VIN1 + 0.3V
●Detect voltage circuit with delay built-in
Note: Delay operates at both times of release and detect operations.
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■PACKAGING INFORMATION
●SOT-25
■MARKING RULE
●SOT-25
①Represents output configuration MARK
5 4
①②③④
N D E
CONFIGURATION VDET1 VDET2 N-ch Open Drain N-ch Open Drain N-ch Open Drain CMOS CMOS N-ch Open Drain
PRODUCT SERIES XC612NxxxxMx XC612DxxxxMx XC612ExxxxMx
1
2
3
②, ③Represents sequence number
④Represents production lot number 0 to 9, A to Z repeated. (G, I, J, O, Q, W excepted.)
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1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this catalog is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this catalog. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. The products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this catalog within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this catalog may be copied or reproduced without the prior permission of Torex Semiconductor Ltd.
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