XC9101_1

XC9101 Series PWM Controlled Step-Up DC/DC Controllers ETR0403_003 ■GENERAL DESCRIPTION The XC9101 series are step-up multiple current and voltage feedback DC/DC controller ICs. Current sense, clock frequencies and amp feedback gain can all be externally regulated. A stable power supply is possible with output currents of up to 1.5A. With output voltage fixed internally, VOUT is selectable in 100mV increments within a 2.5V ~ 16.0V range (±2.5%). For output voltages outside this range, we recommend the FB version, which has a 0.9V internal reference voltage. Using this version, the required output voltage can be set-up using 2 external resistors. Switching frequencies can also be set-up externally within a range of 100 ~ 600kHz and therefore frequencies suited to your particular application can be selected. With the current sense function, peak currents (which flow through the driver transistor and the coil) can be controlled. Soft-start time can be adjusted using external resistor and capacitor. During shutdown (CE pin=L), consumption current can be reduced to as little as 0.5μA (TYP.) or less. ■APPLICATIONS ●Mobile, Cordless phones ●Palm top computers, PDAs ●Portable games ●Cameras, Digital cameras ●Note book PCs ■FEATURES Stable Operations via Current & Voltage Multiple Feedback Unlimited Options for Peripheral Selection Current Protection Circuit Ceramic Capacitor Compatible Input Voltage Range : 2.5V ~ 20V (Fixed Voltage Type) : 30V + (Adjustable Type) Oscillation Frequency Range : 100kHz ~ 600kHz Output Current Package : Up to 1.5A : MSOP-8A, SOP-8 Output Voltage Range : 2.5V ~ 16V ■TYPICAL APPLICATION CIRCUIT ■TYPICAL PERFORMANCE CHARACTERISTICS VOUT: 5.0V, FOSC: 180KHz 1/22 XC9101 Series ■PIN CONFIGURATION MSOP-8A (TOP VIEW) SOP-8 (TOP VIEW) ■PIN ASSIGNMENT PIN NUMBER MSOP-8A SOP-8 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 PIN NAME EXT Isen VIN CE/SS CLK CC/GAIN VOUT/FB VSS FUNCTION Driver Current Sense Power Input CE/Soft Start Clock Input Phase Compensation Voltage Sense Ground ■PRODUCT CLASSIFICATION ●Ordering Information XC9101①②③④⑤⑥ DESIGNATOR ① DESCRIPTION Type of DC/DC Controllers SYMBOL C D Integer ②③ Output Voltage A~H ④ ⑤ ⑥ Oscillation Frequency Package Device Orientation A K S R L DESCRIPTION : VOUT (Fixed voltage type), Soft-start externally set-up : FB voltage, Soft-start externally set-up : e.g. VOUT=2.3V→②=2, ③=3 FB products→②=0, ③=9 fixed : Voltages above 10V →10=A, 11=B, 12=C, 13=D, 14=E, 15=F, 16=H e.g. VOUT=13.5V → ②=D, ③=5 : Adjustable : MSOP-8A : SOP-8 : Embossed tape, standard feed : Embossed tape, reverse feed The standard output voltages of the XC9101C series are 2.5V, 3.3V, and 5.0V. Voltages other than those listed are semi-custom. 2/22 XC9101 Series ■BLOCK DIAGRAM ■ABSOLUTE MAXIMUM RATINGS PARAMETER EXT Pin Voltage Isen Pin Voltage VIN Pin Voltage CE/SS Pin Voltage CLK Pin Voltage CC/GAIN Pin Voltage VOUT/FB Pin Voltage EXT Pin Current MSOP-8A Power Dissipation SOP-8 Operating Temperature Range Storage Temperature Range SYMBOL VEXT VIsen VIN VCE VCLK VCC VOUT/FB IEXT Pd Topr Tstg RATINGS -0.3～VIN＋0.3 -0.3～＋22 -0.3～＋22 -0.3～＋22 -0.3～VIN＋0.3 -0.3～VIN＋0.3 -0.3～＋22 ±100 150 300 -40～＋85 -55～＋125 Ta = 25℃ UNITS V V V V V V V mA mW ℃ ℃ 3/22 XC9101 Series ■ELECTRICAL CHARACTERISTICS XC9101C33AKR PARAMETER Output Voltage Maximum Operating Voltage Minimum Operating Voltage Supply Current 1 Supply Current 2 Stand-by Current CLK Oscillation Frequency Frequency Line Regulation Frequency Temperature Fluctuation Maximum Duty Cycle Minimum Duty Cycle Current Limit Voltage ISEN Current CE "High" Current CE "Low" Current CE "High" Voltage CE "Low" Voltage EXT "High" ON Resistance EXT "Low" ON Resistance Efficiency (*1) Soft-Start Time CC/GAIN Pin Output Impedance Ta=25℃ SYMBOL VOUT VINmax VINmin IDD1 IDD2 ISTB FOSC ΔFOSC ΔVIN･FOSC ΔFOSC ΔTopr･FOSC CONDITIONS IOUT=300mA MIN. 3.218 20 － TYP. 3.300 － － 150 90 0.5 MAX. 3.382 － 2.5 255 176 2.0 380 － － 89 0 220 13 0.1 0.1 － 0.2 58 45 － 20 － UNITS V V V μA μA μA kHz % % % % mV μA μA μA V V Ω Ω % ms kΩ CIRCUITS ① ① ① ② ② ② ③ ③ ③ ④ ④ ⑥ ⑥ ⑤ ⑤ ⑤ ⑤ ④ ④ ① ① ⑦ VIN=2.5V, VOUT=CE= Setting Output Voltage×0.95V VIN=2.5V, CE=VIN VOUT=Setting Output Voltage×1.05V VIN=2.5V, CE=VOUT=VSS RT=10.0kΩ, CT=220pF VIN=2.5V ~ 20V VIN=2.5V Topr=-40 ~ +85℃ VOUT=Set Voltage×0.95V VOUT=Set Voltage×1.05V VIN pin voltage－ISEN pin voltage VIN=2.5V, ISEN=2.5V CE=VIN=2.5V, VOUT=0V CE=0V, VIN=2.5V, VOUT=0V CLK Oscillation Starts, VOUT=0V, CE: Voltage applied CLK Oscillation Stops, VOUT=0V, CE: Voltage applied EXT=VIN－0.4V, CE=VIN=2.5V VOUT=Setting voltage×0.95V EXT=0.4V, CE=VIN=2.5V VOUT=Setting voltage×1.05 Connect CSS and RSS, CE : 0V→2.5V － － 280 － － 79 － 90 4.5 -0.1 -0.1 0.6 － － － － 5 － 330 ±5 ±5 85 － 150 7 0 0 － － 31 27 88 10 400 MAXDTY MINDTY ILIM IISEN ICEH ICEL VCEH VCEL REXTH REXTL EFFI TSS RCCGAIN Unless otherwise stated, VIN = 2.5V NOTE: *1: EFFI = {[(output voltage) × (output current)] ÷ [(input voltage) × (input current)]} × 100 *2: The capacity range of the capacitor used to set the external CLK frequency is 150 ~ 220pF 4/22 XC9101 Series ■ELECTRICAL CHARACTERISTICS (Continued) XC9101C50AKR PARAMETER Output Voltage Maximum Operating Voltage Minimum Operating Voltage Supply Current 1 Supply Current 2 Stand-by Current CLK Oscillation Frequency Frequency Line Regulation Frequency Temperature Fluctuation Maximum Duty Cycle Minimum Duty Cycle Current Limit Voltage ISEN Current CE "High" Current CE "Low" Current CE "High" Voltage CE "Low" Voltage EXT "High" ON Resistance EXT "Low" ON Resistance Efficiency *1 Soft-Start Time CC/GAIN Pin Output Impedance SYMBOL VOUT VINmax VINmin IDD1 IDD2 ISTB FOSC ΔFOSC ΔVIN･FOSC ΔFOSC ΔTopr･FOSC Ta=25℃ CONDITIONS IOUT=300mA MIN. 4.875 20 － VIN=3.0V, VOUT=CE= Setting Output Voltage×0.95V VIN=3.0V, CE=VIN VOUT=Setting Output Voltage×1.05V VIN=3.0V, CE=VOUT=VSS RT=10.0kΩ, CT=220pF VIN=2.5V～20V VIN=2.5V Topr=-40～+85℃ VOUT=Setting Voltage×0.95V VOUT=Setting Voltage×1.05V VIN pin voltage－ISEN pin voltage VIN=3.0V, ISEN=3.0V CE=VIN=3.0V, VOUT=0V CE=0V, VIN=3.0V, VOUT=0V CLK Oscillation Starts, VOUT=0V, CE: Voltage applied CLK Oscillation Stops, VOUT=0V, CE: Voltage applied EXT=VIN－0.4V, CE=VIN=3.0V VOUT=Setting voltage×0.95V EXT=0.4V, CE=VIN=3.0V VOUT=Setting voltage×1.05V Connect CSS and RSS, CE: 0V→3.0V － － － 280 － － 79 － 90 4.5 -0.1 -0.1 0.6 － － － － － － TYP. 5.000 － － 160 90 0.5 330 ±5 ±5 85 － 150 7 0 0 － － 27 25 87 5 400 MAX. 5.125 － 2.5 270 176 2.0 380 － － 89 0 220 13 0.1 0.1 － 0.2 51 37 － － － UNITS V V V μA μA μA kHz % % % % mV μA μA μA V V Ω Ω % ms kΩ CIRCUITS ① ① ① ② ② ② ③ ③ ③ ④ ④ ⑥ ⑥ ⑤ ⑤ ⑤ ⑤ ④ ④ ① ① ⑦ MAXDTY MINDTY ILIM IISEN ICEH ICEL VCEH VCEL REXTH REXTL EFFI TSS RCCGAIN NOTE: Unless otherwise stated, VIN = 3.0V. *1: EFFI = {[(output voltage) × (output current)] ÷ [(input voltage) × (input current)]} × 100 *2: The capacity range of the capacitor used to set the external CLK frequency is 150 ~ 220pF 5/22 XC9101 Series ■ELECTRICAL CHARACTERISTICS (Continued) XC9101D09AKR PARAMETER Output Voltage Maximum Operating Voltage Minimum Operating Voltage Supply Current 1 Supply Current 2 Stand-by Current CLK Oscillation Frequency Frequency Line Regulation Frequency Temperature Fluctuation Maximum Duty Cycle Minimum Duty Cycle Current Limiter Voltage ISEN Current CE "High" Current CE "Low" Current CE "High" Voltage CE "Low" Voltage EXT "High" ON Resistance EXT "Low" ON Resistance Efficiency *1 Soft-Start Time CC/GAIN Pin Output Impedance SYMBOL VOUT VINmax VINmin IDD1 IDD2 ISTB FOSC ΔFOSC ΔVIN･FOSC ΔFOSC ΔTopr･FOSC Ta=25℃ CONDITIONS IOUT=300mA MIN. 0.8775 20 － VIN=2.5V, VIN=CE, FB=0.9×0.95V VIN=2.5V, CE=VIN, VOUT=0.9×1.05V VIN=2.5V, CE=FB=VSS RT=10.0kΩ, CT=220pF VIN=2.5V～20V VIN=2.5V Topr=-40～+85℃ VOUT=0.9×0.95V VOUT=0.9×1.05V VIN pin voltage－ISEN pin voltage VIN=2.5V, ISEN=2.5V CE=VIN=2.5V, FB=0V CE=0V, VIN=2.5V, FB=0V CLK Oscillation Start, FB=0V, CE: Voltage applied CLK Oscillation Stop, FB=0V, CE: Voltage applied EXT=VIN－0.4V, CE=VIN VOUT=Setting voltage×0.95V EXT=0.4V, CE=VIN VOUT=Setting voltage×1.05V Connect CSS and RSS, CE : 0V→2.5V － － － 280 － － 79 90 4.5 -0.1 -0.1 0.6 － － － － 5 － TYP. 0.9 － － 150 90 0.5 330 ±5 ±5 85 150 7 0 0 － － 31 27 88 10 400 MAX. 0.9225 － 2.5 255 176 2.0 380 － － 89 0 220 13 0.1 0.1 － 0.2 58 45 － 20 － UNITS CIRCUITS V V V μA μA μA kHz % % % % mV μA μA μA V V Ω Ω % ms kΩ ① ① ① ② ② ② ③ ③ ③ ④ ④ ⑥ ⑥ ⑤ ⑤ ⑤ ⑤ ④ ④ ① ① ⑦ MAXDTY MINDTY ILIM IISEN ICEH ICEL VCEH VCEL REXTH REXTL EFFI TSS RCCGAIN NOTE: Unless otherwise stated, VIN = 2.5V External Components: RFB1=200kΩ, RFB2=100kΩ, CFB=82pF *1: EFFI = {[(output voltage) × (output current)] ÷ [(input voltage) × (input current)]} × 100 *2: The capacity range of the capacitor used to set the external CLK frequency is 150 ~ 220pF. 6/22 XC9101 Series ■TYPICAL APPLICATION CIRCUITS XC9101C33AKR NMOS Coil Resistor Capacitors SD : XP161A1355PR : 22μH (CR105 SUMIDA) : 20mΩ for ISEN (NPR1 KOA), 33kΩ(trimmer) for CLK, 100kΩ for SS : 180pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.1μF (ceramic) for SS,1μF (ceramic) for Bypass 47μF (OS)+220μF (any) for CL, 220μF (any) for CIN : U3FWJ44N (TOSHIBA) XC9101C50AKR NMOS Coil Resistor Capacitors SD : XP161A1355PR : 22μH (CR105 SUMIDA) : 20mΩ for ISEN (NPR1 KOA), 33kΩ(trimmer) for CLK, 100kΩ for SS : 180pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.1μF (ceramic) for SS,1μF (ceramic) for Bypass 47μF (OS)+220μF (any) for CL, 220μF(any) for CIN : U3FWJ44N (TOSHIBA) 7/22 XC9101 Series ■TYPICAL APPLICATION CIRCUITS (Continued) XC9101D09AKR NMOS Coil Resistor Capacitors SD VOUT RFB1 RFB2 CFB VOUT RFB1 RFB2 CFB : XP161A11A1PR : 22μH (CDRH127 SUMIDA) : 10mΩ for ISEN (NPR1 KOA), 33kΩ(trimmer) for CLK, 150kΩ for SS : 180pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.1μF (ceramic) for SS, 1μF (ceramic) for Bypass 47μF (OS)+220μF (any) for CL, 220μF (any) for CIN : U5FWJ44N (TOSHIBA) : 16V : 560kΩ : 33kΩ : 27pF : 20V : 470kΩ : 22kΩ : 33pF 8/22 XC9101 Series ■OPERATIONAL EXPLANATION Step-up DC/DC converter controllers of the XC9101 series carry out pulse width modulation (PWM) according to the multiple feedback signals of the output voltage and coil current. The internal circuits consist of different blocks that operate at VIN or the stabilized power (2.0 V) of the internal regulator. The fixed output voltage of the C type and the FB pin voltage (Vref = 0.9 V) of type D controller have been adjusted and set by laser-trimming. With regard to clock pulses, a capacitor and resistor connected to the CLK pin generate ramp waveforms whose top and bottom are 0.7V and 0.15V, respectively. The frequency can be set within a range of 100kHz to 600kHz externally (refer to the "Functional Settings" section for further information). The clock pulses are processed to generate a signal used for synchronizing internal sequence circuits. The Verr amplifier is designed to monitor the output voltage. A fraction of the voltage applied to internal resistors R1, R2 in the case of a type C controller, and the voltage at the FB pin in the case of a type D controller, are fed back and compared with the reference voltage. In response to feedback of a voltage lower than the reference voltage, the output voltage of the Verr amplifier increases. The output of the Verr amplifier enters the mixer via resistor (RVerr). This signal works as a pulse width control signal during PWM operations. By connecting an external capacitor and resistor through the CE/GAIN pin, it is possible to set the gain and frequency characteristics of Verr amplifier signals (refer to the "Functional Settings" section for further information). The Ierr amplifier monitors the coil current. The potential difference between the VIN and Isen pins is sampled at each switching operation. Then the potential difference is amplified or held, as necessary, and input to the mixer. The Ierr amplifier outputs a signal ensuring that the greater the potential difference between the VIN and ISEN pins, the smaller the switching current. The gain and frequency characteristics of this amplifier are fixed internally. The mixer modulates the signal sent from Verr by the signal from Ierr. The modulated signal enters the PWM comparator for comparison with the sawtooth pulses generated at the CLK pin. If the signal is greater than the sawtooth waveforms, a signal is sent to the output circuit to turn on the external switch. The current flowing through the coil is monitored by the limiter comparator via the VIN and ISEN pins. The limiter comparator outputs a signal when the potential difference between the VIN and ISEN pins reaches about 150 mV or more. This signal is converted to a logic signal and handled as a DFF reset signal for the internal limiter circuit. When a reset signal is input, a signal is output immediately at the EXT pin to turn off the MOS switch. When the limiter comparator sends a signal to enable data acceptance, a signal to turn on the MOS switch is output at the next clock pulse. If at this time the potential difference between the VIN and ISEN pins is large, operation is repeated to turn off the MOS switch again. DFF operates in synchronization with the clock signal of the CLK pin. Limiter signal /RESET PWM/PFM switching signal D CLK Q Output signal to EXT pin CLK synchronous signal PWM/PFM switching signal The soft start function is made available by attaching a capacitor and resistor to the CE/SS pin. The Vref voltage applied to the Verr amplifier is restricted by the start-up voltage of the CE/SS pin. This ensures that the Verr amplifier operates with its two inputs in balance, thereby preventing the ON-TIME signal from becoming stronger than necessary. Consequently, soft start time needs to be set sufficiently longer than the time set to CLK. The start-up time of the CE/SS pin equals the time set for soft start (refer to the "Functional Settings" section for further information). The soft start function operates when the voltage at the CE/SS pin is between 0V to 1.55V. If the voltage at the CE/SS pin doesn't start from 0V but from a mid level voltage when the power is switched on, the soft start function will become ineffective and the possibilities of large rush currents and ripple voltages occuring will be increased. 9/22 XC9101 Series ■OPERATIONAL EXPLANATION (Continued) ●Functional Settings 1. Soft Start CE and soft start (SS) functions are commonly assigned to the CE/SS pin. The soft start function is effective until the voltage at the CE pin reaches approximately 1.55 V rising from 0 V. Soft start time is approximated by the equation below according to values of Vcont, RSS, and CSS. T = - CSS × RSS × ln ((Vcont - 1.55) / Vcont) Example: When CSS = 0.1 μF, RSS = 470 kΩ, and Vcont = 5 V, -6 3 T = -0.1 x 10 × 470 x 10 × ln ((5 - 1.55) / 5) = 17.44 ms. CE/SS pin Rss Vcont Css CE, UVLO Vref circuit To Verr amplifier Set the soft start time to a value sufficiently longer than the period of a clock pulse. > Circuit example 1: N-ch open drain Vcont Rss CE/SS pin ON/OFF signal Css > Circuit example 2: CMOS logic (low supply current) Vcont Rss ON/OFF signal Css CE/SS pin > Circuit example 3: CMOS logic (low supply current), quick off Vcont Rss CE/SS pin Css ON/OFF signal 10/22 XC9101 Series ■OPERATIONAL EXPLANATION (Continued) ●Functional Settings (Continued) 2. Oscillation Frequency The oscillation frequency of the internal clock generator is approximated by the following equation according to the values of the capacitor and resistor attached to the CLK pin. To stabilize the IC's operation, set the oscillation frequency within a range of 100kHz to 600kHz. Select a value for Cclk within a range of 150pF to 220pF and fix the frequency based on the value for Rclk. f = 1/(-Cclk × Rclk × ln0.26) Example: When Cclk = 220 pF and Rclk = 10 kΩ, f = 1 / (-220 x 10 ×10 x 10 ×ln(0.26)) = 337.43 kHz. -12 3 CLK pin Rclk Cclk CLK Generator 3. Gain and Frequency Characteristics of the Verr Amplifier The gain at output and frequency characteristics of the Verr amplifier are adjusted by the values of the capacitor and resistor attached to the CC/GAIN pin. It is generally recommended to attach a CC of 220 to 1,000pF without RGAIN. The greater the CC value, the more stable the phase and the slower the transient response. When using the IC with RGAIN connected, it should be noted that if the RGAIN resistance value is too high, abnormal oscillation may occur during transient response time. The size of RGAIN should be carefully evaluated before connection. CC/GAIN pin Verr CC RGAIN RVerr VOUT/FB Vref 4. Current Limit The current limit value is approximated by the following equation according to resistor RSEN inserted between the VIN and ISEN pins. Double function, current FB input and current limiting, is assigned to the ISEN pin. The current limiting value is approximated by the following equation according to the value for RSEN. ILpeak_limit = 0.15/RSEN Example: When RSEN = 100 mΩ, ILpeak_limit = 0.15/0.1 = 1.5 A Isen pin Rsen Comparator with 150ｍV offset Limiter signal VIN pin The inside error amplifier sends feedback signal when the voltage occurs at RSEN resisitors because of the flow of coil current in order to phase compensate. The more the RSEN value becomes larger, the more the error signal becomes bigger, and it could lead to an intermittent oscillation. Please be careful if there is a problem with the application. When the regular operation, the voltage which occurs between RSEN resistors because of coil peak should be set lower than the current limit voltage of 90mV (MIN.). For more details, please refer the notes on the external components. 11/22 XC9101 Series ■OPERATIONAL EXPLANATION (Continued) ●Functional Settings (Continued) 5. FB Voltage and CFB With regard to the XC9101D series, the output voltage is set by attaching externally divided resistors. The output voltage is determined by the equation shown below according to the values of RFB1 and RFB2. In general, the sum of RFB1 and RFB2 should be 1 MΩ or less. VOUT = 0.9 × (RFB1 + RFB2)/ RFB2 The value of CFB (phase compensation capacitor) is approximated by the following equation according to the values of RFB1 and fzfb. The value of fzfb should be 10 kHz, as a general rule. CFB = 1/(2 × π × RFB1 × fzfb) Example: When RFB1 = 455 kΩ and RFB2 = 100 kΩ : VOUT = 0.9 × (455 k ＋ 100 k)/100 k = 4.995 V : CFB = 1/(2 × π × 455 k × 10 k) = 34.98 pF Output voltage Cfb Rfb1 Rfb2 0.9V FB pin Verr Verr amplifier ■NOTES ON USE ●Application Notes 1. The XC9101 series are designed for use with an output ceramic capacitor. If, however, the potential difference ● between input and output is too large, a ceramic capacitor may fail to absorb the resulting high switching energy and oscillation could occur on the output side. If the input-output potential difference is large, connect an electrolytic capacitor in parallel to compensate for insufficient capacitance. 2. The EXT pin of the XC9101 series is designed to minimize the through current that occurs in the internal circuitry. However, the gate drive of external PMOS has a low impedance for the sake of speed. Therefore, if the input voltage is high and the bypass capacitor is attached away from the IC, the charge/discharge current to the external PMOS may lead to unstable operations due to switching operation of the EXT pin. As a solution to this problem, place the bypass capacitor as close to the IC as possible, so that voltage variations at the VIN and VSS pins caused by switching are minimized. If this is not effective, insert a resistor of several to several tens of ohms between the EXT pin and PMOS gate. Remember that the insertion of a resistor slows down the switching speed and may result in reduced efficiency. 3. A NPN transistor can be used in place of PMOS. If using a PNP transistor, insert a resistor (RB) and capacitor (CB) between the EXT pin and the base of the NPN transistor in order to limit the base current without slowing the switching speed. Adjust RB in a range of 500Ω to 1 kΩ according to the load and hFE of the transistor. Use a ceramic capacitor for CB, complying with CB < 1/(2×π× RB ×FOSC× 0.7), as a rule. EXT pin Rb VIN Cb 4. Although the C_CLK connection capacitance range is from 150 ~ 220pF, the most suitable value for maximum stability is around 180pF. 12/22 XC9101 Series ■NOTES ON USE (Continued) ●Instruction on Pattern Layout ① In order to stablize VDD's voltage level, we recommend that a by-pass capacitor (CDD) be connected as close as possible to the VIN & VSS pins. ② In order to stablize the GND voltage level which can fluctuate as a result of switching, we suggest that C_CLK's, R_CLK's & C_GAIN's GND be separated from Power GND and connected as close as possible to the VSS pin (by-pass capacitor, CDD). Please use a multi layer board and check the wiring carefully. < XC9101D Series Pattern Layout Examples> 2 Layer Evaluation Board L SD CDD CFB N-MOS RFB1 VDD Line CL 1 2 RSEN 5 8 6 7 7 6 8 5 R_CLK C_GAIN RFB2 IC GND Power GND 3 R_SS VIN CIN 4 C_SS C_CLK Through Hole 1 2 3 4 5 8 6 7 7 6 8 5 R_CLK, C_CLK, C_GAIN, RFB2　 GND Through Hole 13/22 XC9101 Series ■NOTES ON USE (Continued) ●Instruction on Pattern Layout (Continued) 1 Layer Evaluation Board L SD CDD CFB N-MOS RFB1 VDD Line CL 1 2 RSEN 5 8 6 7 7 6 8 5 R_CLK C_GAIN RFB2 IC GND Power GND 3 VIN CIN R_SS 4 C_SS C_CLK ●Notes 1. Ensure that the absolute maximum ratings of the external components and the XC9101 DC/DC IC itself are not exceeded. 2. We recommend that sufficient counter measures are put in place to eliminate the heat that may be generated by the external N-ch MOSFET as a result of switching losses. 3. Try to use a N-ch MOSFET with as small a gate capacitance as possible in order to avoid overly large output spike voltages that may occur (such spikes occur in proportion to gate capacitance). 4. The performance of the XC9101 DC/DC converter is greatly influenced by not only its own characteristics, but also by those of the external components it is used with. We recommend that you refer to the specifications of each component to be used and take sufficient care when selecting components. 5. Wire external components as close to the IC as possible and use thick, short connecting wires to reduce wiring impedance. In particular, minimize the distance between the by-pass capacitor and the IC. 6. Make sure that the GND wiring is as strong as possible as variations in ground potential caused by ground current at the time of switching may result in unstable operation of the IC. pin. Specifically, strengthen the ground wiring in the proximity of the VSS 14/22 XC9101 Series ■TEST CIRCUITS ・Circuit ① (VOUT Type) 22μH NMOS 1 EXT 100m Ω 2 Isen Vss 8 VOUT 7 GAIN 6 RL SD ・Circuit ① (FB Type) 22μH NMOS 1 EXT 100mΩ 2 Isen R_SS 3 VIN Vss 8 FB 7 GAIN 6 RFB2 RL SD CFB RFB1 R_SS 220μF0.1μF 1μF 3 VIN V V 4 CE/SS CLK 5 10KΩ 220pF 470pF 20μF 220μF0.1μF 4 CE/SS CLK 5 1μF 10KΩ 220pF 470pF 20μF XC9101C33A 　 R_SS：104kΩ C-SS：0.1μF XC9101C50A R_SS：138kΩ C-SS：0.1μF ・Circuit ② ・Circuit ③ 1 EXT Vss 8 1 EXT Vss 8 2 Isen VOUT/FB 7 3 VIN GAIN 6 220pF VOUT/FB 7 2 Isen 3 VIN GAIN 6 A 0.1μF 4 CE/SS CLK 5 10KΩ 4 CE/SS CLK 5 0.1μF 10KΩ OSC 220pF ・Circuit ④ ・Circuit ⑤ 1 EXT OSC Vss 8 1 EXT Vss 8 2 Isen VOUT/FB 7 3 VIN GAIN 6 0.1μF V A 2 Isen VOUT/FB 7 3 VIN GAIN 6 4 CE/SS CLK 5 0.1μF 10KΩ 220pF 4 CE/SS CLK 5 10KΩ 220pF V ・Circuit ⑥ ・Circuit ⑦ 1 EXT Vss 8 1 EXT Vss 8 2 IsenVOUT/FB 7 2 Isen VOUT/FB 7 3 VIN GAIN 6 1MΩ V A 0.1μF 3 VIN GAIN 6 4 CE/SS CLK 5 10KΩ 0.1μF 220pF 4 CE/SS CLK 5 V 15/22 XC9101 Series ■TYPICAL PERFORMANCE CHARACTERISTICS XC9101D09AKR (1) Output Voltage vs. Output Current 16/22 XC9101 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) XC9101D09AKR (2) Efficiency vs. Output Current V V 17/22 XC9101 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) XC9101D09AKR (3) Ripple Voltage vs. Output Current Note : If the difference between the input and output voltage is large or small, switching ON/OFF time will be shortened. As such, the external components used and their values (inductance value of the coil, resistor connected to CLK, capacitor etc. ) may have a critical influence on the actual operation of the IC. 18/22 XC9101 Series ■PACKAGING INFORMATION ●MSOP-8A ●SOP-8 19/22 XC9101 Series ■ MARKING RULE ● MSOP-8A ①Represents product series MARK 4 ②Represents type of DC/DC controller MARK C D TYPE VOUT, CE PIN FB, CE PIN PRODUCT SERIES XC9101CxxAKx XC9101D09AKx PRODUCT SERIES XC9101xxxAKx ③Represents integral number of output voltage, or FB type MARK 2 3 4 5 6 7 8 9 0 A B C D E F H VOLTAGE (V) 2.x 3.x 4.x 5.x 6.x 7.x 8.x 9.x FB products 10.x 11.x 12.x 13.x 14.x 15.x 16.x PRODUCT SERIES XC9101C2xAKx XC9101C3xAKx XC9101C4xAKx XC9101C5xAKx XC9101C6xAKx XC9101C7xAKx XC9101C8xAKx XC9101C9xAKx XC9101D09AKx XC9101CAxAKx XC9101CBxAKx XC9101CCxAKx XC9101CDxAKx XC9101CExAKx XC9101CFxAKx XC9101CHxAKx MSOP-8A (TOP VIEW) ④Represents decimal number of output voltage, FB products (ex.) MARK 0 3 9 VOLTAGE (V) x.0 x.3 FB products PRODUCT SERIES XC9101Cx0AKx XC9101C3xAKx XC9101D09AKx ⑤Represents control type of oscillation frequency MARK A TYPE Adjustable Frequency PRODUCT SERIES XC9101xxxAKx ⑥Represents production lot number 0 to 9, A to Z repeated (G, I, J, O, Q, W excepted). Note: No character inversion used. 20/22 XC9101 Series ■ MARKING RULE (Continued) ●SOP-8 ①②Represents product series MARK ① 0 ② 1 XC9101xxxASx PRODUCT SERIES ③Represents type of DC/DC controller MARK C D SOP-8 (TOP VIEW) TYPE VOUT, CE pin FB, CE pin PRODUCT SERIES XC9101CxxAKx XC9101D09AKx ④Represents integral number of output voltage, or FB type MARK 2 3 4 5 6 7 8 9 0 VOLTAGE (V) 2.x 3.x 4.x 5.x 6.x 7.x 8.x 9.x FB products PRODUCT SERIES XC9101C2xAKx XC9101C3xAKx XC9101C4xAKx XC9101C5xAKx XC9101C6xAKx XC9101C7xAKx XC9101C8xAKx XC9101C9xAKx XC9101C09AKx MARK A B C D E F H VOLTAGE (V) 10.x 11.x 12.x 13.x 14.x 15.x 16.x PRODUCT SERIES XC9101CAxAKx XC9101CBxAKx XC9101CCxAKx XC9101CDxAKx XC9101CExAKx XC9101CFxAKx XC9101CHxAKx ⑤Represents decimal number of output voltage, FB type (ex.) MARK 0 3 9 VOLTAGE (V) x.0 x.3 FB products PRODUCT SERIES XC9101Cx0AKx XC9101C3xAKx XC9101D09AKx ⑥Represents control type of oscillation frequency MARK A TYPE Variable by external C and R PRODUCT SERIES XC9101xxxAKx ⑦Represents the last digit of production year MARK 0 6 ⑧⑨Represents production lot number (ex.) 0 to 9, A to Z repeated (G, I, J, O, Q, W excepted). Note: No character inversion used. MARK ⑧ 0 0 ⑨ 3 A PRODUCTION LOT NUMBER 03 1A YEAR 2000 2006 21/22 XC9101 Series 1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this catalog is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this catalog. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. The products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this catalog within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this catalog may be copied or reproduced without the prior permission of Torex Semiconductor Ltd. 22/22