74HC259D
CMOS Digital Integrated Circuits
Silicon Monolithic
74HC259D
1. Functional Description
•
8-Bit Addressable Latch
2. General
The 74HC259D is a high speed CMOS ADDRESSABLE LATCH fabricated with silicon gate C2MOS technology.
It achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The respective bits are controlled by address inputs A, B, and C. When CLEAR input is held high and enable
input G is held low, the data is written into the bit selected by address inputs, the other bit hold their previous
conditions.
When both CLEAR and G held high, writing of all bits is inhibited regardless of adress inputs, and their previous
condition are held. When CLEAR is held low and G is held high, all bits are resent to low regardless of the other
inputs. When both of CLEAR and G held low, all bits which isn't selected by adress inputs are resent to low.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1)
High speed: tpd = 15 ns (typ.) at VCC = 5 V
(2)
Low power dissipation: ICC = 4.0 µA (max) at Ta = 25
(3)
Balanced propagation delays: tPLH ≈ tPHL
(4)
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
4. Packaging
SOIC16
Start of commercial production
©2016 Toshiba Corporation
1
2016-05
2016-08-04
Rev.3.0
74HC259D
5. Pin Assignment
6. Marking
7. IEC Logic Symbol
©2016 Toshiba Corporation
2
2016-08-04
Rev.3.0
74HC259D
8. Truth Table
D:
The level at the data input
QiO: The level before the indicared steady-state input conditions were established (i = 0, 1, ..... 7)
9. System Diagram
©2016 Toshiba Corporation
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2016-08-04
Rev.3.0
74HC259D
10. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
VCC
-0.5 to 7.0
V
Input voltage
VIN
-0.5 to VCC + 0.5
V
VOUT
-0.5 to VCC + 0.5
V
IIK
±20
mA
Output diode current
IOK
±20
mA
Output current
IOUT
±25
mA
VCC/ground current
ICC
Power dissipation
PD
Storage temperature
Tstg
Output voltage
Input diode current
(Note 1)
±50
mA
500
mW
-65 to 150
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: PD derates linearly with -8 mW/ above 85
11. Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Symbol
Test Condition
Rating
Unit
VCC
2.0 to 6.0
V
VIN
0 to VCC
V
Output voltage
VOUT
0 to VCC
V
Operating temperature
Topr
-40 to 125
Input rise and fall times
tr,tf
0 to 50
µs
Note:
The operating ranges are required to ensure the normal operation of the device. Unused inputs must be tied
to either VCC or GND.
©2016 Toshiba Corporation
4
2016-08-04
Rev.3.0
74HC259D
12. Electrical Characteristics
12.1. DC Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Symbol
Test Condition
VCC (V)
Min
Typ.
Max
Unit
VIH
2.0
1.50
V
4.5
3.15
6.0
4.20
2.0
0.50
4.5
1.35
VIL
VOH
VOL
VIN = VIH or VIL
VIN = VIH or VIL
6.0
1.80
2.0
1.9
2.0
4.5
4.4
4.5
6.0
5.9
6.0
IOH = -4 mA
4.5
4.18
4.31
IOH = -5.2 mA
6.0
5.68
5.80
IOL = 20 µA
2.0
0.0
0.1
4.5
0.0
0.1
IOH = -20 µA
6.0
0.0
0.1
IOL = 4 mA
4.5
0.17
0.26
IOL = 5.2 mA
V
V
V
6.0
0.18
0.26
Input leakage current
IIN
VIN = VCC or GND
6.0
±0.1
µA
Quiescent supply current
ICC
VIN = VCC or GND
6.0
4.0
µA
12.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Symbol
Test Condition
VCC (V)
Min
Max
Unit
VIH
2.0
1.50
V
4.5
3.15
6.0
4.20
2.0
0.50
4.5
1.35
6.0
1.80
2.0
1.9
4.5
4.4
VIL
VOH
VOL
VIN = VIH or VIL
VIN = VIH or VIL
IOH = -20 µA
6.0
5.9
IOH = -4 mA
4.5
4.13
IOH = -5.2 mA
6.0
5.63
IOL = 20 µA
2.0
0.1
4.5
0.1
6.0
0.1
IOL = 4 mA
4.5
0.33
IOL = 5.2 mA
6.0
0.33
V
V
V
Input leakage current
IIN
VIN = VCC or GND
6.0
±1.0
µA
Quiescent supply current
ICC
VIN = VCC or GND
6.0
40.0
µA
©2016 Toshiba Corporation
5
2016-08-04
Rev.3.0
74HC259D
12.3. DC Characteristics (Unless otherwise specified, Ta = -40 to 125 )
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Symbol
VIH
VIL
VOH
VOL
Test Condition
VIN = VIH or VIL
VIN = VIH or VIL
IOH = -20 µA
VCC (V)
Min
Max
Unit
2.0
1.50
V
4.5
3.15
6.0
4.20
2.0
0.50
4.5
1.35
6.0
1.30
2.0
1.9
4.5
4.4
V
V
6.0
5.9
IOH = -4 mA
4.5
3.7
IOH = -5.2 mA
6.0
5.2
IOL = 20 µA
2.0
0.1
4.5
0.1
6.0
0.1
IOL = 4 mA
4.5
0.4
IOL = 5.2 mA
6.0
0.4
V
V
Input leakage current
IIN
VIN = VCC or GND
6.0
±1.0
µA
Quiescent supply current
ICC
VIN = VCC or GND
6.0
160.0
µA
13. Timing Requirements
(Unless otherwise specified, Ta = 25 , Input: tr = tf = 6 ns)
Characteristics
Symbol
Test Condition
VCC (V)
Limit
Unit
Minimum pulse width
(G)
tw(L)
2.0
75
ns
4.5
15
6.0
13
Minimum pulse width
(CLEAR)
tw(L)
2.0
75
4.5
15
6.0
13
2.0
50
4.5
10
Minimum setup time
(DATA IN)
tS
Minimum setup time
(A, B, C)
tS
Minimum hold time
(DATA IN)
th
Minimum hold time
(A, B, C)
th
©2016 Toshiba Corporation
6
6.0
9
2.0
25
4.5
5
6.0
5
2.0
25
4.5
5
6.0
5
2.0
0
4.5
0
6.0
0
ns
ns
ns
ns
ns
2016-08-04
Rev.3.0
74HC259D
13.1. Timing Requirements
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 6 ns)
Characteristics
Symbol
Test Condition
VCC (V)
Limit
Unit
Minimum pulse width
(G)
tw(L)
2.0
95
ns
4.5
19
6.0
16
Minimum pulse width
(CLEAR)
tw(L)
2.0
95
4.5
19
6.0
16
2.0
60
4.5
12
6.0
11
2.0
30
4.5
6
6.0
5
2.0
30
4.5
6
6.0
5
2.0
0
4.5
0
6.0
0
Minimum setup time
(DATA IN)
tS
Minimum setup time
(A, B, C)
tS
Minimum hold time
(DATA IN)
th
Minimum hold time
(A, B, C)
th
ns
ns
ns
ns
ns
13.2. Timing Requirements
(Unless otherwise specified, Ta = -40 to 125 , Input: tr = tf = 6 ns)
Characteristics
Symbol
Test Condition
VCC (V)
Limit
Unit
Minimum pulse width
(G)
tw(L)
2.0
115
ns
4.5
23
Minimum pulse width
(CLEAR)
tw(L)
Minimum setup time
(DATA IN)
tS
Minimum setup time
(A, B, C)
tS
Minimum hold time
(DATA IN)
th
Minimum hold time
(A, B, C)
th
©2016 Toshiba Corporation
7
6.0
20
2.0
115
4.5
23
6.0
20
2.0
75
4.5
15
6.0
13
2.0
40
4.5
8
6.0
7
2.0
40
4.5
8
6.0
7
2.0
0
4.5
0
6.0
0
ns
ns
ns
ns
ns
2016-08-04
Rev.3.0
74HC259D
14. AC Characteristics
(Unless otherwise specified, CL = 15 pF, VCC = 5 V, Ta = 25 , Input: tr = tf = 6 ns)
Characteristics
Symbol
Test Condition
Min
Output transition time
tTLH,tTHL
Propagation delay time
(DATA IN - Q)
tPLH,tPHL
Propagation delay time
(A, B, C - Q)
tPLH,tPHL
Propagation delay time
(G - Q)
tPLH,tPHL
Propagation delay time
(CLEAR - Q)
tPHL
Typ.
Max
Unit
4
8
ns
15
22
ns
21
32
ns
16
28
ns
13
23
ns
14.1. AC Characteristics
(Unless otherwise specified, CL = 50pF, Ta = 25 , Input: tr = tf = 6 ns)
Characteristics
Output transition time
Propagation delay time
(DATA IN - Q)
Symbol
Note
tTLH,tTHL
tPLH,tPHL
Propagation delay time
(A, B, C - Q)
tPLH,tPHL
Propagation delay time
(G - Q)
tPLH,tPHL
Propagation delay time
(CLEAR - Q)
tPHL
Input capacitance
CIN
Power dissipation capacitance
CPD
(Note 1)
VCC (V)
Min
Typ.
Max
Unit
2.0
30
75
ns
4.5
8
15
6.0
7
13
2.0
56
130
4.5
18
26
6.0
15
22
2.0
83
185
4.5
25
37
6.0
21
31
2.0
67
165
4.5
20
33
6.0
17
28
2.0
52
135
4.5
16
27
6.0
14
23
3
pF
8
pF
ns
ns
ns
ns
Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC
©2016 Toshiba Corporation
8
2016-08-04
Rev.3.0
74HC259D
14.2. AC Characteristics
(Unless otherwise specified, CL = 50 pF, Ta = -40 to 85 , Input: tr = tf = 6 ns)
Characteristics
Output transition time
Propagation delay time
(DATA IN - Q)
Symbol
VCC (V)
Min
Max
Unit
tTLH,tTHL
2.0
95
ns
4.5
19
6.0
16
2.0
165
4.5
33
6.0
28
2.0
230
4.5
46
6.0
39
2.0
205
4.5
41
6.0
35
2.0
170
4.5
34
6.0
29
tPLH,tPHL
Propagation delay time
(A, B, C - Q)
tPLH,tPHL
Propagation delay time
(G - Q)
tPLH,tPHL
Propagation delay time
(CLEAR - Q)
tPHL
ns
ns
ns
ns
14.3. AC Characteristics
(Unless otherwise specified, CL = 50 pF, Ta = -40 to 125 , Input: tr = tf = 6 ns)
Characteristics
Output transition time
Symbol
VCC (V)
Min
Max
Unit
tTLH,tTHL
2.0
115
ns
4.5
23
6.0
20
2.0
195
4.5
39
6.0
33
2.0
280
4.5
56
6.0
48
2.0
235
4.5
47
6.0
40
2.0
205
4.5
41
6.0
35
Propagation delay time
(DATA IN - Q)
tPLH,tPHL
Propagation delay time
(A, B, C - Q)
tPLH,tPHL
Propagation delay time
(G - Q)
tPLH,tPHL
Propagation delay time
(CLEAR - Q)
tPHL
©2016 Toshiba Corporation
9
ns
ns
ns
ns
2016-08-04
Rev.3.0
74HC259D
Package Dimensions
Unit: mm
Weight: 0.15 g (typ.)
Package Name(s)
Nickname: SOIC16
©2016 Toshiba Corporation
10
2016-08-04
Rev.3.0
74HC259D
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's
written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible
for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating
and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample
application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications.
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AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
©2016 Toshiba Corporation
11
2016-08-04
Rev.3.0