74HC4051D(BJ)

74HC4051D,74HC4052D CMOS Digital Integrated Circuits Silicon Monolithic 74HC4051D,74HC4052D 1. Functional Description 74HC4051D:8-Channel Analog Multiplexer/Demultiplexer 74HC4052D:Dual 4-Channel Analog Multiplexer/Demultiplexer 2. General The 74HC4051D, 74HC4052D are high speed CMOS ANALOG MULTIPLEXER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The 74HC4051D has an 8 channel configuration and the 74HC4052D has a 4 channel× 2 configuration. The digital signal to the control terminal turns "ON" the corresponding switch of each channel a large amplitude signal (VCC - VEE) can then be switched by the small logical amplitude (VCC - GND) control signal. For example, in the case of VCC = 5 V, GND = 0 V, VEE = -5 V, signals between -5 V and +5 V can be switched from the logical circuit with a single power supply of 5 V. As the ON-resistance of each switch is low, they can be connected to circuits with low input impedance. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. Features (1) Low power dissipation: ICC = 4.0 µA (max) (VCC = 6.0 V, VEE = GND, Ta = 25 ) (2) Low ON-resistance: RON = 130 Ω (typ. VIN = VEE), 75 Ω (typ. VIN = VCC) at VCC - VEE = 9 V (3) High noise immunity: THD = 0.02 % (typ.) at VCC - VEE = 9 V 4. Packaging SOIC16 Start of commercial production ©2016 Toshiba Corporation 1 2016-04 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 5. Pin Assignment 74HC4051D 74HC4052D 6. IEC Logic Symbol 74HC4051D 74HC4052D 7. Marking 74HC4051D ©2016 Toshiba Corporation 74HC4052D 2 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 8. System Diagram 74HC4051D 74HC4052D ©2016 Toshiba Corporation 3 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 9. Truth Table Input Inhibit Input C* Input B L L L L L L L L L H L H L H L H H X X: *: Input A ON Channel 74HC4051D ON Channel 74HC4052D L L 0 0X, 0Y L H 1 1X, 1Y H L 2 2X, 2Y H H 3 3X, 3Y L L 4  L H 5  H L 6  H H 7  X X None None Don't care Except 74HC4052D 10. Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit Supply voltage VCC -0.5 to 7.0 V Supply voltage VEE -7.0 to 0 V Supply voltage VCC-VEE -0.5 to 13.0 V Input voltage VIN -0.5 to VCC + 0.5 V Switch I/O voltage VI/O VEE - 0.5 to VCC + 0.5 V Input diode current IIK ±20 mA II/OK ±20 mA IT ±25 mA I/O diode current Switch through current VCC/ground current ICC ±50 mA Power dissipation PD 500 mW Storage temperature Tstg -65 to 150  Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 11. Operating Ranges (Note) Characteristics Supply voltage Symbol Rating Unit VCC 2.0 to 6.0 V Supply voltage VEE -6.0 to 0 V Supply voltage VCC-VEE 2.0 to 12.0 V Input voltage VIN 0 to VCC V Switch I/O voltage VI/O VEE to VCC V Operating temperature Topr -40 to 85  Input rise and fall times tr,tf 0 to 50 µs Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. ©2016 Toshiba Corporation 4 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 12. Electrical Characteristics 12.1. DC Characteristics (Unless otherwise specified, Ta = 25 ) Characteristics High-level input voltage Low-level input voltage ON-resistance Difference of ON-resistance between switches Symbol Test Condition VIH  VIL RON ∆RON Input/Output leakage current (Switch OFF) IOFF Input/Output leakage current (Switch ON) II/O VEE (V)  VCC (V) Min Typ. Max Unit 2.0 1.50   V 4.5 3.15   6.0 4.20   2.0   0.50 4.5   1.35 6.0   1.80 VIN = VIH or VIL VI/O = VCC to VEE II/O ≤ 2 mA GND 2.0    GND 4.5  180 240 -4.5 4.5  140 190 -6.0 6.0  135 180 VIN = VIH or VIL VI/O = VEE II/O ≤ 2 mA GND 2.0  210  GND 4.5  150 200 -4.5 4.5  130 170 -6.0 6.0  125 170 VIN = VIH or VIL VI/O = VCC II/O ≤ 2 mA GND 2.0  220  GND 4.5  95 130 -4.5 4.5  75 100 -6.0 6.0  70 100 VIN = VIH or VIL VI/O = VCC to VEE II/O ≤ 2 mA GND 4.5  4 5 -4.5 4.5  3 4 -6.0 6.0  3 4 VOS = VCC or GND VIS = GND or VCC VIN = VIH or VIL GND 6.0   ±0.06 -6.0 6.0   ±0.1 VOS = VCC or GND VIN = VIH or VIL GND 6.0   ±0.06 -6.0 6.0   ±0.1 V Ω Ω µA µA Control input leakage current IIN VIN = VCC or GND GND 6.0   ±0.1 µA Quiescent supply current ICC VIN = VCC or GND GND 6.0   4.0 µA -6.0 6.0   8.0 ©2016 Toshiba Corporation 5 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 12.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 ) Characteristics High-level input voltage Low-level input voltage ON-resistance Symbol Test Condition VIH  VIL RON VCC (V) Min Max Unit 2.0 1.50  V 4.5 3.15  6.0 4.20  2.0  0.50 4.5  1.35 6.0  1.80 GND 2.0   GND 4.5  300 -4.5 4.5  240 -6.0 6.0  225 GND 2.0   GND 4.5  250 -4.5 4.5  215 -6.0 6.0  215 GND 2.0   GND 4.5  165 -4.5 4.5  125 -6.0 6.0  125 VIN = VIH or VIL VI/O = VCC to VEE II/O ≤ 2 mA GND 4.5   -4.5 4.5   -6.0 6.0   VOS = VCC or GND VIS = GND or VCC VIN = VIH or VIL GND 6.0  ±0.6 -6.0 6.0  ±1.0 VOS = VCC or GND VIN = VIH or VIL GND 6.0  ±0.6 -6.0 6.0  ±1.0  VIN = VIH or VIL VI/O = VCC to VEE II/O ≤ 2 mA VIN = VIH or VIL VI/O = VEE II/O ≤ 2 mA VIN = VIH or VIL VI/O = VCC II/O ≤ 2 mA Difference of ON-resistance between switches ∆RON Input/Output leakage current (Switch OFF) IOFF Input/Output leakage current (Switch ON) II/O VEE (V) V Ω Ω µA µA Control input leakage current IIN VIN = VCC or GND GND 6.0  ±1.0 µA Quiescent supply current ICC VIN = VCC or GND GND 6.0  40.0 µA -6.0 6.0  80.0 ©2016 Toshiba Corporation 6 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 12.3. AC Characteristics (Unless otherwise specified, CL = 50 pF, Ta = 25 , Input: tr = tf = 6 ns) Characteristics Part Number Phase difference between input to output Output enable time Symbol ϕI/O 74HC4051D 74HC4051D RL = 1 kΩ Figure 1 tPLZ,tPHZ RL = 1 kΩ Figure 1 74HC4052D Control input capacitance Common terminal capacitance 74HC4051D Switch terminal capacitance 74HC4051D Feedthrough capacitance 74HC4051D Power dissipation capacitance 74HC4051D All types tPZL,tPZH RL = 1 kΩ Figure 1 74HC4052D Output disable time Test Condition RL = 1 kΩ Figure 1 VEE (V) VCC (V) Min Typ. Max Unit GND 2.0  18 25 ns GND 4.5  7 12 GND 6.0  6 10 -4.5 4.5  5 8 GND 2.0  90 145 GND 4.5  30 45 GND 6.0  25 35 -4.5 4.5  24 34 GND 2.0  90 145 GND 4.5  30 45 GND 6.0  25 35 -4.5 4.5  24 34 GND 2.0  56 85 GND 4.5  26 35 GND 6.0  25 33 -4.5 4.5  24 32 GND 2.0  56 85 GND 4.5  26 35 GND 6.0  25 33 -4.5 4.5  24 32 ns CIN All types    5 10 pF CIS Figure 2 -5.0 5.0  36 70 pF  19 40  7 15  7 15  0.95 2  0.85 2  70   71  74HC4052D COS Figure 2 -5.0 5.0 74HC4052D CIOS Figure 2 -5.0 5.0 74HC4052D 74HC4052D ns CPD Figure 2 (Note 1) -5.0 5.0 pF pF pF Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation. ICC(opr) = CPD × VCC × fIN + ICC ©2016 Toshiba Corporation 7 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 12.4. AC Characteristics (Unless otherwise specified, CL = 50 pF, Ta = -40 to 85 , Input: tr = tf = 6 ns) Characteristics Phase difference between input to output Output enable time Part Number Symbol 74HC4051D ϕI/O 74HC4051D 74HC4051D RL = 1 kΩ Figure 1 tPLZ,tPHZ RL = 1 kΩ Figure 1 74HC4052D Control input capacitance Common terminal capacitance 74HC4051D Switch terminal capacitance 74HC4051D All types tPZL,tPZH RL = 1 kΩ Figure 1 74HC4052D Output disable time Test Condition RL = 1 kΩ Figure 1 VEE (V) VCC (V) Min Max Unit GND 2.0  30 ns GND 4.5  15 GND 6.0  13 -4.5 4.5  10 GND 2.0  150 GND 4.5  55 GND 6.0  42 -4.5 4.5  41 GND 2.0  150 GND 4.5  55 GND 6.0  42 -4.5 4.5  41 GND 2.0  90 GND 4.5  45 GND 6.0  40 -4.5 4.5  39 GND 2.0  90 GND 4.5  45 GND 6.0  40 -4.5 4.5  39 All types    10 pF CIS Figure 2 -5.0 5.0  70 pF  40 COS Figure 2 -5.0 5.0  15  15 CIOS Figure 2 -5.0 5.0  2  2 74HC4052D 74HC4051D 74HC4052D ©2016 Toshiba Corporation ns CIN 74HC4052D Feedthrough capacitance ns 8 pF pF 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 12.5. Analog Switch Characteristics (Ta = 25 ) (Note) Characteristics Part Number Symbol Sine Wave Distortion Maximum frequency response THD Test Condition RL = 10 kΩ, CL = 50 pF fIN = 1 kHz fMAX(I/O) Adjust fIN voltage to obtain 0 dBm at VOS 74HC4051D Increase fIN frequency until 74HC4052D dB meter reads -3 dB RL = 50 Ω, CL = 10 pF fIN = 1 MHz, sine wave 74HC4051D Figure 3 74HC4052D VEE (V) VCC (V) % -2.25 2.25 0.025 VIN = 8.0 Vp-p -4.5 4.5 0.020 VIN = 11.0 Vp-p -6.0 6.0 0.018 (Note 1) -2.25 2.25 120 (Note 2) MHz 45 70 (Note 1) -4.5 4.5 (Note 2) 190 70 110 -6.0 6.0 (Note 2) 200 85 74HC4052D Feed through attenuation (switch OFF) Unit VIN = 4.0 Vp-p (Note 1) 74HC4051D Typ. 140 FTH Crosstalk (control input to signal output) Xtalk Crosstalk (between any switches) Xtalk VIN is centered at (VCC/2). Adjust input for 0 dBm. RL = 600 Ω, CL = 50 pF, fIN = 1 MHz, sine wave Figure 4 -2.25 2.25 -50 -4.5 4.5 -50 -6.0 6.0 -50 RL = 600 Ω, CL = 50 pF, fIN = 1 MHz, square wave (tr = tf = 6 ns) Figure 5 -2.25 2.25 60 -4.5 4.5 140 -6.0 6.0 200 Adjust VIN to obtain 0 dBm at input. RL = 600 Ω, CL = 50 pF, fIN = 1 MHz, sine wave Figure 6 -2.25 2.25 -50 -4.5 4.5 -50 -6.0 6.0 -50 dB mV dB Note: These characteristics are determined by design of devices. Note 1: Input COMMON terminal, and measured at SWITCH terminal. Note 2: Input SWITCH terminal, and measured at COMMON terminal. ©2016 Toshiba Corporation 9 2016-09-12 Rev.3.0 74HC4051D,74HC4052D 13. AC Test Circuit Figure 1 tPLZ, tPHZ, tPZL, tPZH Figure 2 CIOS, CIS, COS Figure 3 Frequency Response Figure 4 Feedthrough Attenuation ©2016 Toshiba Corporation 10 2016-09-12 Rev.3.0 74HC4051D,74HC4052D Figure 5 Cross Talk (control input to output signal) Figure 6 Cross Talk (between any two switches) ©2016 Toshiba Corporation 11 2016-09-12 Rev.3.0 74HC4051D,74HC4052D Package Dimensions Unit: mm Weight: 0.15 g (typ.) Package Name(s) Nickname: SOIC16 ©2016 Toshiba Corporation 12 2016-09-12 Rev.3.0 74HC4051D,74HC4052D RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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