74HCT4051D,74HCT4052D
CMOS Digital Integrated Circuits
Silicon Monolithic
74HCT4051D,74HCT4052D
1. Functional Description
74HCT4051D:8-Channel Analog Multiplexer/Demultiplexer
74HCT4052D:Dual 4-Channel Analog Multiplexer/Demultiplexer
2. General
The 74HCT4051D/74HCT4052D are high speed CMOS ANALOG MULTIPLEXER/DEMULTIPLEXER
fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. This inputs
are compatible with TTL, NMOS and CMOS output voltage levels.
The 74HCT4051D has an 8 channel configuration and the 74HCT4052D has a 4 channel × 2 configuration.
The digital signal to the control terminal turns "ON" the corresponding switch of each channel a large amplitude
signal (VCC - VEE) can then be switched by the small logical amplitude (VCC - GND) control signal.
For example, in the case of VCC = 5 V, GND = 0 V, VEE = -5 V, signals between -5 V and +5 V can be switched
from the logical circuit with a single power supply of 5 V. As the ON-resistance of each switch is low, they can be
connected to circuits with low input impedance.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1)
Low power dissipation: ICC = 4.0 µA (max) (VCC = 5.5 V, VEE = GND, Ta = 25 )
(2)
Compatible with TTL output: VIH = 2.0 V (min), VIL = 0.8 V (max)
(3)
Wide interfacing ability: LSTTL, NMOS, CMOS
(4)
Low ON-resistance: RON = 135 Ω (typ. VIN = VEE), 75 Ω (typ. VIN = VCC) at VCC - VEE = 9 V
(5)
High noise immunity: THD = 0.020 % (typ.) at VCC - VEE = 9 V
4. Packaging
SOIC16
Start of commercial production
©2016 Toshiba Corporation
1
2016-04
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
5. Pin Assignment
74HCT4051D
74HCT4052D
6. IEC Logic Symbol
74HCT4051D
74HCT4052D
7. Marking
74HCT4051D
©2016 Toshiba Corporation
74HCT4052D
2
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
8. System Diagram
74HCT4051D
74HCT4052D
©2016 Toshiba Corporation
3
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
9. Truth Table
Input
Inhibit
Input
C*
Input
B
L
L
L
L
L
L
L
L
L
H
L
H
L
H
L
H
H
X
X:
*:
Input
A
ON Channel
74HC4051D
ON Channel
74HC4052D
L
L
0
0X, 0Y
L
H
1
1X, 1Y
H
L
2
2X, 2Y
H
H
3
3X, 3Y
L
L
4
L
H
5
H
L
6
H
H
7
X
X
None
None
Don't care
Except 74HC4052D
10. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Rating
Unit
Supply voltage
VCC
-0.5 to 7.0
V
Supply voltage
VEE
-7.0 to 0
V
Supply voltage
VCC-VEE
-0.5 to 13.0
V
Input voltage
VIN
-0.5 to VCC + 0.5
V
Switch I/O voltage
VI/O
VEE - 0.5 to VCC + 0.5
V
Input diode current
IIK
±20
mA
II/OK
±20
mA
IT
±25
mA
I/O diode current
Switch through current
VCC/ground current
ICC
±50
mA
Power dissipation
PD
500
mW
Storage temperature
Tstg
-65 to 150
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
11. Operating Ranges (Note)
Characteristics
Supply voltage
Symbol
Rating
Unit
VCC
4.5 to 5.5
V
Supply voltage
VEE
-6.0 to 0
V
Supply voltage
VCC-VEE
4.5 to 11.0
V
Input voltage
VIN
0 to VCC
V
Switch I/O voltage
VI/O
VEE to VCC
V
Operating temperature
Topr
-40 to 85
Input rise and fall times
tr,tf
0 to 50
µs
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
©2016 Toshiba Corporation
4
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
12. Electrical Characteristics
12.1. DC Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
High-level input voltage
Symbol
Test Condition
VIH
Low-level input voltage
VIL
ON-resistance
RON
ON-resistance
ON-resistance
VEE (V)
VCC (V)
Min
Typ.
Max
Unit
4.5 to 5.5
2.0
V
4.5 to 5.5
0.8
V
VIN = VIH or VIL
VI/O = VCC to VEE
II/O ≤ 2 mA
GND
4.5
180
240
Ω
-4.5
4.5
140
190
-5.5
5.5
135
180
VIN = VIH or VIL
VI/O = VEE
II/O ≤ 2 mA
GND
4.5
150
200
-4.5
4.5
135
170
-5.5
5.5
125
170
VIN = VIH or VIL
VI/O = VCC
II/O ≤ 2 mA
GND
4.5
95
130
-4.5
4.5
75
100
-5.5
5.5
70
100
VIN = VIH or VIL
VI/O = VCC to VEE
II/O ≤ 2 mA
GND
4.5
4
5
-4.5
4.5
3
4
-5.5
5.5
3
4
VOS = VCC or GND
VIS = GND or VCC
VIN = VIH or VIL
GND
5.5
±0.06
-5.5
5.5
±0.1
Difference of ON-resistance
between switches
∆RON
Ω
Input/Output leakage current
(Switch OFF)
IOFF
Input/Output leakage current
(Switch ON)
II/O
VOS = VCC or GND
VIN = VIH or VIL
GND
5.5
±0.06
-5.5
5.5
±0.1
Control input leakage current
IIN
VIN = VCC or GND
GND
5.5
±0.1
µA
Quiescent supply current
ICC
VIN = VCC or GND
GND
5.5
4.0
µA
-5.5
5.5
8.0
µA
µA
12.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
Symbol
Test Condition
High-level input voltage
VIH
Low-level input voltage
VIL
ON-resistance
RON
ON-resistance
ON-resistance
Difference of ON-resistance
between switches
∆RON
VEE (V)
VCC (V)
Min
Max
Unit
4.5 to 5.5
4.5 to 5.5
2.0
V
0.8
V
Ω
VIN = VIH or VIL
VI/O = VCC to VEE
II/O ≤ 2 mA
GND
4.5
300
-4.5
4.5
240
-5.5
5.5
225
VIN = VIH or VIL
VI/O = VEE
II/O ≤ 2 mA
GND
4.5
250
-4.5
4.5
215
-5.5
5.5
215
VIN = VIH or VIL
VI/O = VCC
II/O ≤ 2 mA
GND
4.5
165
-4.5
4.5
125
-5.5
5.5
125
VIN = VIH or VIL
VI/O = VCC to VEE
II/O ≤ 2 mA
GND
4.5
-4.5
4.5
-5.5
5.5
VOS = VCC or GND
VIS = GND or VCC
VIN = VIH or VIL
GND
5.5
±0.6
-5.5
5.5
±1.0
Ω
Input/Output leakage current
(Switch OFF)
IOFF
Input/Output leakage current
(Switch ON)
II/O
VOS = VCC or GND
VIN = VIH or VIL
GND
5.5
±0.6
-5.5
5.5
±1.0
Control input leakage current
IIN
VIN = VCC or GND
GND
5.5
±1.0
µA
Quiescent supply current
ICC
VIN = VCC or GND
GND
5.5
40.0
µA
-5.5
5.5
80.0
©2016 Toshiba Corporation
5
µA
µA
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
12.3. AC Characteristics
(Unless otherwise specified, CL = 50 pF, Ta = 25 , Input: tr = tf = 6 ns)
Characteristics
Part Number
Phase difference
between input to output
Output enable time
74HCT4051D
Symbol
Test
Condition
VEE (V)
VCC (V)
Min
Typ.
Max
Unit
ϕI/O
GND
4.5
7
12
ns
GND
5.5
6
10
-4.5
4.5
5
GND
4.5
30
45
GND
5.5
26
35
-4.5
4.5
25
35
RL = 1 kΩ
Figure 1
GND
4.5
30
45
GND
5.5
26
35
-4.5
4.5
25
35
tPLZ,tPHZ RL = 1 kΩ
Figure 1
GND
4.5
22
30
GND
5.5
21
28
-4.5
4.5
21
28
GND
4.5
22
30
GND
5.5
21
28
-4.5
4.5
21
28
5
10
pF
36
70
pF
19
40
7
15
7
15
0.75
2
0.75
2
70
71
tPZL,tPZH RL = 1 kΩ
Figure 1
74HCT4052D
Output disable time
74HCT4051D
74HCT4052D
Control input
capacitance
Common terminal
capacitance
74HCT4051D
Switch terminal
capacitance
74HCT4051D
Feedthrough
capacitance
74HCT4051D
Power dissipation
capacitance
74HCT4051D
RL = 1 kΩ
Figure 1
CIN
CIS
Figure 2
-5.0
5.0
COS
Figure 2
-5.0
5.0
CIOS
Figure 2
-5.0
5.0
CPD
Figure 2
(Note 1)
GND
5.0
74HCT4052D
74HCT4052D
74HCT4052D
74HCT4052D
ns
ns
ns
ns
pF
pF
pF
Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC
©2016 Toshiba Corporation
6
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
12.4. AC Characteristics (Unless otherwise specified, CL = 50 pF, Ta = -40 to 85 ,
Input: tr = tf = 6 ns)
Part Number
Symbol
Test
Condition
VEE (V)
VCC (V)
Min
Max
Unit
Phase difference between
input to output
74HCT4051D
ϕI/O
GND
4.5
15
ns
GND
5.5
13
Output enable time
74HCT4051D
Characteristics
-4.5
4.5
GND
4.5
55
GND
5.5
42
-4.5
4.5
41
RL = 1 kΩ
Figure 1
GND
4.5
55
GND
5.5
42
-4.5
4.5
41
tPLZ,tPHZ RL = 1 kΩ
Figure 1
GND
4.5
37
GND
5.5
34
-4.5
4.5
34
GND
4.5
37
GND
5.5
34
-4.5
4.5
34
10
pF
-5.0
5.0
70
pF
40
15
15
2
2
tPZL,tPZH RL = 1 kΩ
Figure 1
74HCT4052D
Output disable time
74HCT4051D
74HCT4052D
Control input capacitance
Common terminal
capacitance
74HCT4051D
Switch terminal capacitance
74HCT4051D
RL = 1 kΩ
Figure 1
CIN
CIS
Figure 2
74HCT4052D
COS
Figure 2
-5.0
5.0
74HCT4052D
Feedthrough capacitance
74HCT4051D
CIOS
Figure 2
74HCT4052D
©2016 Toshiba Corporation
7
-5.0
5.0
ns
ns
ns
ns
pF
pF
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
12.5. Analog Switch Characteristics (Ta = 25 ) (Note)
Characteristics
Part Number Symbol
Sine Wave Distortion
Maximum frequency
response
THD
Test Condition
RL = 10 kΩ, CL = 50 pF
fIN = 1 kHz
fMAX(I/O) Adjust fIN voltage to obtain
0 dBm at VOS
Increase fIN frequency until
74HCT4052D
dB meter reads -3 dB
RL = 50 Ω, CL = 10 pF
fIN = 1 MHz, sine wave
74HCT4051D
Figure 3
74HCT4052D
74HCT4051D
Feed through
attenuation (switch OFF)
Crosstalk (control input
to signal output)
Crosstalk (between any
switches)
FTH
Xtalk
Xtalk
VEE (V) VCC (V)
Typ.
Unit
%
VIN = 8.0 Vp-p
-4.5
4.5
0.020
VIN = 11.0 Vp-p
-5.5
5.5
0.019
(Note 1)
-4.5
4.5
190
(Note 2)
MHz
70
110
(Note 1)
-5.5
5.5
(Note 2)
200
80
135
VIN is centered at (VCC/2).
Adjust input for 0 dBm.
RL = 600 Ω, CL = 50 pF,
fIN = 1 MHz, sine wave
Figure 4
-4.5
4.5
-50
-5.5
5.5
-50
RL = 600 Ω, CL = 50 pF,
fIN = 1 MHz,
square wave (tr = tf = 6 ns)
Figure 5
-4.5
4.5
140
-5.5
5.5
180
Adjust VIN to obtain 0 dBm
at input.
RL = 600 Ω, CL = 50 pF,
fIN = 1 MHz, sine wave
Figure 6
-4.5
4.5
-50
-5.5
5.5
-50
RL = 50 Ω, CL = 15 pF,
fIN = 100 kHz, VSWITCH = 1
VRMS
-4.5
4.5
-90
dB
mV
dB
Note: These characteristics are determined by design of devices.
Note 1: Input COMMON terminal, and measured at SWITCH terminal.
Note 2: Input SWITCH terminal, and measured at COMMON terminal.
©2016 Toshiba Corporation
8
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
13. AC Test Circuit
Figure 1 tPLZ, tPHZ, tPZL, tPZH
Figure 2 CIOS, CIS, COS
Figure 3 Frequency Response
Figure 4 Feedthrough Attenuation
©2016 Toshiba Corporation
9
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
Figure 5 Cross Talk (control input to output signal)
Figure 6 Cross Talk (between any two switches)
©2016 Toshiba Corporation
10
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
Package Dimensions
Unit: mm
Weight: 0.15 g (typ.)
Package Name(s)
Nickname: SOIC16
©2016 Toshiba Corporation
11
2016-09-12
Rev.3.0
74HCT4051D,74HCT4052D
RESTRICTIONS ON PRODUCT USE
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for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
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©2016 Toshiba Corporation
12
2016-09-12
Rev.3.0