74VHCT574AFT
CMOS Digital Integrated Circuits
Silicon Monolithic
74VHCT574AFT
1. Functional Description
•
Octal D-Type Flip Flop with 3-State Outputs
2. General
The 74VHCT574AFT is an advanced high speed CMOS OCTAL FLIP-FLOP with 3-STATE OUTPUT fabricated
with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
This 8-bit D-type flip-flop is controlled by a clock input (CK) and an output enable input (OE).
When the OE input is high, the eight outputs are in a high impedance state.
The input voltage is compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.3 V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output
(Note)
pins
without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and
input/output voltages such as battery back up, hot board insertion, etc.
Note: Output in off-state
3. Features
(1)
AEC-Q100 (Rev. H) (Note 1)
(2)
Wide operating temperature range: Topr = -40 to 125
(3)
High speed: fMAX = 140MHz (typ.) at VCC = 5.0 V
(4)
Low power dissipation: ICC = 4.0 µA (max) at Ta = 25
(5)
Compatible with TTL inputs: VIL = 0.8V (max)
(6)
Power-down protection is provided on all inputs and outputs.
(7)
Balanced propagation delays: tPLH ≈ tPHL
(8)
Low noise: VOLP = 1.5 V (max)
VIH = 2.0V (min)
(9) Pin and function compatible with the 74 series (74ACT/HCT/AHCT etc.) 574 type.
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
Start of commercial production
©2016 Toshiba Corporation
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74VHCT574AFT
4. Packaging
TSSOP20B
5. Pin Assignment
6. Marking
©2016 Toshiba Corporation
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7. IEC Logic Symbol
8. Truth Table
X:
Z:
Qn:
Don't care
High impedance
No change
9. System Diagram
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10. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
VCC
-0.5 to 7.0
V
Input voltage
VIN
-0.5 to 7.0
V
(Note 1)
-0.5 to 7.0
V
(Note 2)
-0.5 to VCC + 0.5
-20
mA
(Note 3)
±20
mA
Output voltage
VOUT
Input diode current
IIK
Output diode current
IOK
Output current
IOUT
±25
mA
VCC/ground current
ICC
±75
mA
180
mW
-65 to 150
Power dissipation
PD
Storage temperature
Tstg
(Note 4)
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: Output in off-state.
Note 2: High (H) or Low (L) state. IOUT absolute maximum rating must be observed.
Note 3: VOUT < GND, VOUT > VCC
Note 4: 180 mW in the range of Ta = -40 to 85 . From Ta = 85 to 125 a derating factor of -3.25 mW/ shall be
applied until 50 mW.
11. Operating Ranges (Note)
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
VCC
4.5 to 5.5
V
Input voltage
VIN
0 to 5.5
V
(Note 1)
0 to 5.5
V
(Note 2)
0 to VCC
Output voltage
VOUT
Operating temperature
Topr
-40 to 125
Input rise and fall times
dt/dv
0 to 20
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Note 1: Output in Off-state.
Note 2: High (H) or Low (L) state.
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12. Electrical Characteristics
12.1. DC Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
High-level input voltage
Symbol
Test Condition
VIH
Low-level input voltage
VIL
High-level output voltage
VOH
VIN = VIH or VIL
Low-level output voltage
VOL
VIN = VIH or VIL
3-state output OFF-state
leakage current
IOZ
VIN = VIH or VIL
VOUT = VCC or GND
Input leakage current
IIN
Quiescent supply current
ICC
Output leakage current
(Power-OFF)
VCC (V)
Min
Typ.
Max
Unit
4.5 to 5.5
2.0
V
4.5 to 5.5
0.8
V
IOH = -50 µA
4.5
4.40
4.50
V
IOH = -8 mA
4.5
3.94
IOL = 50 µA
4.5
0.0
0.10
IOL = 8 mA
4.5
0.36
5.5
±0.25
µA
VIN = 5.5 V or GND
0 to 5.5
±0.1
µA
VIN = VCC or GND
5.5
4.0
µA
ICCT
Per input: VIN = 3.4 V
Other input: VCC or GND
5.5
1.35
mA
IOPD
VOUT = 5.5 V
0
0.5
µA
V
12.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
High-level input voltage
Symbol
VIH
Test Condition
Low-level input voltage
VIL
High-level output voltage
VOH
VIN = VIH or VIL
Low-level output voltage
VOL
VIN = VIH or VIL
3-state output OFF-state
leakage current
IOZ
VIN = VIH or VIL
VOUT = VCC or GND
Input leakage current
IIN
Quiescent supply current
Output leakage current
(Power-OFF)
VCC (V)
Min
Max
Unit
4.5 to 5.5
2.0
V
4.5 to 5.5
0.8
V
IOH = -50 µA
4.5
4.40
V
IOH = -8 mA
4.5
3.80
IOL = 50 µA
4.5
0.10
IOL = 8 mA
4.5
0.44
5.5
±2.50
µA
VIN = 5.5 V or GND
0 to 5.5
±1.0
µA
V
ICC
VIN = VCC or GND
5.5
40.0
µA
ICCT
Per input: VIN = 3.4 V
Other input: VCC or GND
5.5
1.50
mA
IOPD
VOUT = 5.5 V
0
5.0
µA
Max
Unit
12.3. DC Characteristics (Unless otherwise specified, Ta = -40 to 125 )
Characteristics
Symbol
Test Condition
VCC (V)
Min
High-level input voltage
VIH
4.5 to 5.5
2.0
V
Low-level input voltage
VIL
4.5 to 5.5
0.8
V
High-level output voltage
VOH
VIN = VIH or VIL
IOH = -50 µA
4.5
4.40
V
IOH = -8 mA
4.5
3.70
IOL = 50 µA
4.5
0.10
IOL = 8 mA
4.5
0.55
±10.0
µA
Low-level output voltage
3-state output OFF-state
leakage current
VOL
VIN = VIH or VIL
V
IOZ
VIN = VIH or VIL
VOUT = VCC or GND
5.5
Input leakage current
IIN
VIN = 5.5 V or GND
0 to 5.5
±2.0
µA
Quiescent supply current
ICC
VIN = VCC or GND
5.5
80.0
µA
ICCT
Per input: VIN = 3.4 V
Other input: VCC or GND
5.5
1.50
mA
IOPD
VOUT = 5.5 V
0
20.0
µA
Output leakage current
(Power-OFF)
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, Input: tr = tf = 3 ns)
12.4. Timing Requirements (Unless otherwise specified, Ta = 25
25
Characteristics
Minimum pulse width (CK)
Symbol
VCC (V)
Typ.
Limit
Unit
tw(L),tw(H)
5.0 ± 0.5
6.5
ns
Minimum setup time
tS
5.0 ± 0.5
2.5
ns
Minimum hold time
th
5.0 ± 0.5
2.5
ns
12.5. Timing Requirements
(Unless otherwise specified, Ta = -40 to 85
, Input: tr = tf = 3 ns)
85
Characteristics
Symbol
VCC (V)
Limit
Unit
tw(L),tw(H)
5.0 ± 0.5
8.5
ns
Minimum setup time
tS
5.0 ± 0.5
2.5
ns
Minimum hold time
th
5.0 ± 0.5
2.5
ns
Minimum pulse width (CK)
12.6. Timing Requirements
(Unless otherwise specified, Ta = -40 to 125 , Input: tr = tf = 3 ns)
Characteristics
Symbol
VCC (V)
Limit
Unit
tw(L),tw(H)
5.0 ± 0.5
8.5
ns
Minimum setup time
tS
5.0 ± 0.5
3.0
ns
Minimum hold time
th
5.0 ± 0.5
2.5
ns
Minimum pulse width (CK)
12.7. AC Characteristics (Unless otherwise specified, Ta = 25 , Input: tr = tf = 3 ns)
Characteristics
Symbol
Note
Test Condition
VCC (V)
CL (pF)
Min
Typ.
Max
Unit
5.0 ± 0.5
15
4.1
9.4
ns
50
5.6
10.4
15
6.5
10.2
Propagation delay time
(CK-Q)
tPLH,tPHL
3-state output enable time
tPZL,tPZH
RL = 1 kΩ
5.0 ± 0.5
50
7.3
11.2
3-state output disable time
tPLZ,tPHZ
RL = 1 kΩ
5.0 ± 0.5
50
7.0
11.2
ns
Maximum clock frequency
fMAX
5.0 ± 0.5
15
90
140
MHz
50
85
130
50
Output skew
Input capacitance
tosLH,tosHL (Note 1)
CIN
Output capacitance
COUT
Power dissipation capacitance
CPD
(Note 2)
5.0 ± 0.5
ns
1.0
ns
4
10
pF
9
pF
25
pF
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC/8 (per F/F)
And the total CPD when n pcs of F/F operate can be gained by the following equation.
CPD (total) = 14 + 11 × n
©2016 Toshiba Corporation
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74VHCT574AFT
12.8. AC Characteristics
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 3 ns)
Characteristics
Symbol
Propagation delay time
(CK-Q)
tPLH,tPHL
3-state output enable time
tPZL,tPZH
3-state output disable time
tPLZ,tPHZ
Maximum clock frequency
fMAX
Output skew
Note
Test Condition
VCC (V)
CL (pF)
Min
Max
Unit
5.0 ± 0.5
15
1.0
10.5
ns
50
1.0
11.5
15
1.0
11.5
50
1.0
12.5
RL = 1 kΩ
RL = 1 kΩ
tosLH,tosHL (Note 1)
Input capacitance
5.0 ± 0.5
CIN
ns
5.0 ± 0.5
50
1.0
12.0
ns
5.0 ± 0.5
15
80
MHz
50
75
5.0 ± 0.5
50
1.0
ns
10
pF
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
12.9. AC Characteristics
(Unless otherwise specified, Ta = -40 to 125 , Input: tr = tf = 3 ns)
Characteristics
Symbol
Note
Test Condition
VCC (V)
CL (pF)
Min
Max
Unit
5.0 ± 0.5
15
1.0
12.0
ns
50
1.0
13.0
15
1.0
13.0
Propagation delay time
(CK-Q)
tPLH,tPHL
3-state output enable time
tPZL,tPZH
RL = 1 kΩ
5.0 ± 0.5
50
1.0
14.0
3-state output disable time
tPLZ,tPHZ
RL = 1 kΩ
5.0 ± 0.5
50
1.0
14.0
ns
Maximum clock frequency
fMAX
5.0 ± 0.5
15
70
MHz
5.0 ± 0.5
50
65
5.0 ± 0.5
50
1.0
ns
10
pF
Output skew
tosLH,tosHL (Note 1)
Input capacitance
CIN
ns
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
, Input: tr = tf = 3 ns)
25
12.10. Noise Characteristics (Unless otherwise specified, Ta = 25
Characteristics
Symbol
Test Condition
VCC (V)
Typ.
Limit
Unit
Quiet output maximum dynamic VOL
VOLP
CL = 50 pF
5.0
1.1
1.5
V
Quiet output minimum dynamic VOL
VOLV
CL = 50 pF
5.0
-1.1
-1.5
V
Minimum high-level dynamic input voltage
VIHD
CL = 50 pF
5.0
2.0
V
Maximum low-level dynamic input voltage
VILD
CL = 50 pF
5.0
0.8
V
©2016 Toshiba Corporation
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2016-08-04
Rev.3.0
74VHCT574AFT
Package Dimensions
Unit: mm
Weight: 0.071 g (typ.)
Package Name(s)
Nickname: TSSOP20B
©2016 Toshiba Corporation
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2016-08-04
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74VHCT574AFT
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for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
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©2016 Toshiba Corporation
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2016-08-04
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