SSM3J135TU,LF

SSM3J135TU TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSⅥ) SSM3J135TU ○ Power Management Switch Applications • • 1.5 V drive Low ON-resistance: RDS(ON) = 260 mΩ (max) (@VGS = -1.5 V) RDS(ON) = 180 mΩ (max) (@VGS = -1.8 V) RDS(ON) = 132 mΩ (max) (@VGS = -2.5 V) RDS(ON) = 103 mΩ (max) (@VGS = -4.5 V) Unit: mm Absolute Maximum Ratings (Ta = 25°C) Characteristic Symbol Rating Drain-Source voltage VDSS -20 V Gate-Source voltage VGSS ±8 V DC ID (Note 1) -3.0 Pulse IDP (Note 1) -6.0 PD (Note 2) 500 Drain current Power dissipation t < 1s Unit A mW 1000 Channel temperature Tch 150 °C 1: Gate Storage temperature range Tstg −55 to 150 °C 2: Source 3: Drain Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: The channel temperature should not exceed 150°C during use. Note 2: Mounted on FR4 board. 2 (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm ) Marking UFM JEDEC ― JEITA ― TOSHIBA 2-2U1A Weight: 6.6mg (typ.) Equivalent Circuit (top view) 3 3 JJN 1 2 1 2 Start of commercial production 2011-02 1 2014-03-01 SSM3J135TU Electrical Characteristics (Ta = 25°C) Characteristic Drain-source breakdown voltage Symbol Test Conditions V (BR) DSS ID = -1 mA, VGS = 0 V V (BR) DSX ID = -1 mA, VGS = 5 V .(Note 4) Typ. Max Unit -20 ⎯ ⎯ V -15 ⎯ ⎯ V ⎯ ⎯ -1 μA Drain cut-off current IDSS Gate leakage current IGSS VGS = ±8 V, VDS = 0 V ⎯ ⎯ ±1 μA Vth VDS = -3 V, ID = -1 mA -0.3 ⎯ -1.0 V S Gate threshold voltage ⏐Yfs⏐ Forward transfer admittance Drain–source ON-resistance RDS (ON) Input capacitance Ciss Output capacitance Coss VDS = -3 V, ID = -1.0 A (Note 3) 2.2 4.4 ⎯ ID = -1.0 A, VGS = -4.5 V (Note 3) ⎯ 79 103 ID = -0.6 A, VGS = -2.5 V (Note 3) ⎯ 98 132 ID = -0.4 A, VGS = -1.8 V (Note 3) ⎯ 117 180 ID = -0.2 A, VGS = -1.5 V (Note 3) ⎯ 137 260 ⎯ 270 ⎯ ⎯ 40 ⎯ VDS = -10 V, VGS = 0 V f = 1 MHz ⎯ 32 ⎯ Turn-on time ton VDD = -10 V, ID = -1.0 A ⎯ 17 ⎯ Turn-off time toff VGS = 0 to -2.5 V, RG = 4.7 Ω ⎯ 43 ⎯ ⎯ 4.6 ⎯ ⎯ 0.4 ⎯ Reverse transfer capacitance Switching time VDS = -20 V, VGS = 0 V Min Crss Total gate charge Qg Gate-source charge Qgs1 Gate-drain charge Qgd Drain-source forward voltage VDSF VDD = -10 V, ID = -2.0 A, VGS = -4.5V ID = 3.0 A, VGS = 0 V (Note 3) mΩ pF ns nC ⎯ 0.9 ⎯ ⎯ 0.91 1.2 V Note 3: Pulse test Note 4: If a forward bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drain-source breakdown voltage is lowered in this mode. Switching Time Test Circuit (a) Test Circuit 0V (b) VIN 90% OUT 0 IN 10% −2.5 V RG −2.5V 10 μs RL VDD (c) VOUT VDD = －10 V RG = 4.7 Ω Duty ≤ 1% VIN: tr, tf < 5 ns Common Source Ta = 25°C VDS (ON) 90% 10% VDD tr ton tf toff Notice on Usage Vth can be expressed as the voltage between gate and source when the low operating current value is ID = -1 mA for this product. For normal switching operation, VGS (on) requires a higher voltage than Vth and VGS (off) requires a lower voltage than Vth. (The relationship can be established as follows: VGS (off) < Vth < VGS (on).) Take this into consideration when using the device. Handling Precaution When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. Thermal resistance Rth (ch-a) and power dissipation PD vary depending on board material, board area, board thickness and pad area. When using this device, please take heat dissipation into consideration. 2 2014-03-01 SSM3J135TU ID – VGS ID – VDS -6 -10 -4.5 V -2.5 V -5 (A) Pulse test -4 I VGS = -1.5 V -3 -2 -1 0 -0.1 Drain current Drain current -1 ID ID (A) -1.8 V Common Source VDS = -3 V -0.2 -0.4 -0.6 Drain–source voltage -0.8 VDS -25 °C 25 °C -0.001 Common Source Ta = 25 °C Pulse test 0 Ta = 100 °C -0.01 -0.0001 0 -1 -1.0 Gate–source voltage (V) ID = -1.0A Common Source 300 200 25 °C Ta = 100 °C 100 -25 °C 0 -2 -4 -6 Gate–source voltage 400 VGS -1.8V -2.5 V 100 VGS = -4.5 V 0 -2.0 -4.0 Drain current ID -0.6 A / -2.5 V -0.4 A / -1.8 V -0.2 A / -1.5 V 100 ID = -1.0 A / VGS = -4.5 V 50 Ambient temperature (A) Common Source VDS = -3 V ID = -1 mA Vth (V) Gate threshold voltage 300 0 -6.0 Vth – Ta -1.0 Common Source 0 −50 -1.5 V 200 (V) Pulse test Drain–source ON-resistance RDS (ON) (mΩ) Common Source Ta = 25°C 300 0 -8 RDS (ON) – Ta 200 (V) Pulse test Drain–source ON-resistance RDS (ON) (mΩ) Drain–source ON-resistance RDS (ON) (mΩ) 400 Pulse test 0 VGS RDS (ON) – ID RDS (ON) – VGS 400 -2.0 100 Ta -0.5 0 −50 150 (°C) 0 50 Ambient temperature 3 100 Ta 150 (°C) 2014-03-01 SSM3J135TU 10 (A) Common Source VDS = -3 V Ta = 25°C (S) ⎪Yfs⎪ IDR – VDS |Yfs| – ID 10 Pulse test IDR Drain reverse current Forward transfer admittance 3 1 0.3 0.1 -0.01 -1 -0.1 Drain current ID 1 -25 °C Common Source 0.1 Ta =100 °C Pulse test D 25 °C 0.01 S 0.5 (A) 1.0 Drain–source voltage C – VDS 1000 (ns) (V) tf 100 Switching time Capacitance t C (pF) Ciss VDS Common Source VDD = -10 V VGS = 0 to -2.5 V Ta = 25 °C RG = 4.7Ω toff 1000 1.5 t – ID 10000 300 IDR G 0.001 0 -10 VGS = 0 V Coss 30 Common Source Crss Ta = 25 °C f = 1 MHz VGS = 0 V 100 10 ton tr 10 -0.1 -1 -10 Drain-source voltage VDS 1 -0.001 -100 (V) -0.01 -0.1 Drain current -1 ID -10 (A) Dynamic Input Characteristic -8 Gate–source voltage VGS (V) Common Source ID = -2.0 A Ta = 25°C -6 -4 VDD = - 10 V VDD = - 16 V -2 0 0 2 4 Total Gate Charge 6 8 Qg 10 (nC) 4 2014-03-01 SSM3J135TU Rth – tw PD – Ta 1000 b Power dissipation PD (mW) Transient thermal impedance Rth (°C/W) 600 a 100 10 1 0.001 Single pulse a: Mounted on FR4 board (25.4mm × 25.4mm × 1.6mm , Cu Pad : 645 mm2) b: Mounted on FR4 Board (25.4mm × 25.4mm × 1.6mm , Cu Pad : 0.36 mm2×3) 0.01 0.1 1 Pulse Width 10 100 800 600 400 200 0 -40 600 tw (s) Mounted on FR4 board (25.4mm × 25.4mm × 1.6mm , Cu Pad : 645 mm2) -20 0 20 40 60 80 Ambient temperature 5 100 120 140 Ta (°C) 160 2014-03-01 SSM3J135TU RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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