SSM3J16FU(TE85L,F)

SSM3J16FU TOSHIBA Field Effect Transistor Silicon P Channel MOS Type(π-MOSVI) SSM3J16FU High Speed Switching Applications Analog Switch Applications Unit: mm • Small package • Low on-resistance : RDS(ON) = 8 Ω (max) (@VGS = −4 V) : RDS(ON) = 12 Ω (max) (@VGS = −2.5 V) : RDS(ON) = 45 Ω (max) (@VGS = −1.5 V) Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-Source voltage VDS −20 V Gate-Source voltage VGSS ±10 V DC ID −100 Pulse IDP −200 PD(Note1) 150 mW Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C Drain current Power dissipation mA Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). JEDEC ― JEITA SC-70 TOSHIBA 2-2E1E Weight: 6.0 mg (typ.) Note 1: Mounted on FR4 board 2 (25.4 mm × 25.4 mm × 1.6mm, Cu Pad: 0.6 mm × 3) 0.6 mm 1.0 mm Marking Equivalent Circuit (top view) 3 3 DT 1 2 1 2 Handling Precaution When handling individual devices (which are not yet mounted on a circuit board), ensure that the environment is protected against static electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. Start of commercial production 2002-01 1 2014-03-01 SSM3J16FU Electrical Characteristics (Ta = 25°C) Characteristic Symbol MAX. UNIT ⎯ ⎯ ±1 μA V (BR) DSS ID = −0.1 mA, VGS = 0 −20 ⎯ ⎯ V IDSS VDS = −20 V, VGS = 0 ⎯ ⎯ −1 μA Gate threshold voltage Forward transfer admittance Vth VDS = −3 V, ID = −0.1 mA −0.6 ⎯ −1.1 V ⎪Yfs⎪ VDS = −3 V, ID = −10 mA (Note2) 25 ⎯ ⎯ mS ID = −10 mA, VGS = −4 V (Note2) ⎯ 6 8 ID = −10 mA, VGS = −2.5 V (Note2) ⎯ 8 12 ID = −1 mA, VGS = −1.5 V ⎯ 18 45 ⎯ 11 ⎯ pF ⎯ 3.7 ⎯ pF ⎯ 10 ⎯ pF RDS (ON) Input capacitance Ciss Reverse transfer capacitance Crss Output capacitance Coss Switching time TYP. VGS = ±10 V, VDS = 0 Drain cut-off current Drain-Source on-resistance MIN. IGSS Gate leakage current Drain-Source breakdown voltage Test Condition Turn-on time Turn-off time (Note2) VDS = −3 V, VGS = 0, f = 1 MHz ton VDD = −3 V, ID = − 10 mA, ⎯ 130 ⎯ toff VGS = 0 to −2.5 V ⎯ 190 ⎯ Ω ns Note2: Pulse test Switching Time Test Circuit (a) Test circuit 0 OUT (b) VIN 0V 90% IN 50 Ω −2.5V 10 μs VDD 10% −2.5 V RL (c) VOUT VDD = −3 V Duty ≤ 1% VIN: tr, tf < 5 ns (Zout = 50 Ω) Common Source Ta = 25°C VDS (ON) 90% 10% VDD tr ton tf toff Precaution Vth can be expressed as the voltage between the gate and source when the low operating current value is ID = - 0.1 mA for this product. For normal switching operation, VGS (on) requires a higher voltage than Vth and VGS (off) requires a lower voltage than Vth. (The relationship can be established as follows: VGS (off) < Vth < VGS (on).) Be sure to take this into consideration when using the device. 2 2014-03-01 SSM3J16FU ID – VDS ID – VGS -3 -150 -2.7 (mA) -4 -2.5 ID -10 -200 -1000 Common Source Ta = 25°C Pulse test Drain current Drain current ID (mA) -250 -2.3 -100 -2.1 -1.9 -50 -1.7 Common Source VDS = -3 V Pulse test -100 Ta = 100°C -10 25°C −25°C -1 -0.1 VGS = -1.5 V 0 0 -0.5 -1 -1.5 Drain - Source voltage VDS -0.01 0 -2 (V) Drain – Source on-resistance RDS (ON) (Ω) Drain – Source on-resistance RDS (ON) (Ω) 15 -2.5 V -4 V -100 Drain current 16 14 12 10 8 Ta=100℃ 4 ID 0 -1000 -25℃ 0 -2 -4 Vth (V) 30 25 Gate threshold voltage Drain – Source on-resistance RDS (ON) (Ω) 35 VGS =−1.5 V, ID=-1mA 15 -2.5 V, -10mA 10 5 0 −25 -4V, -10mA 0 25 50 75 -10 -8 VGS (V) Vth – Ta -2.0 Common Source Pulse test 20 -6 Gate – Source voltage (mA) RDS (ON) – Ta 40 25℃ 6 2 -10 VGS (V) Common Source ID = -1 mA Pulse test 18 20 0 -1 -4 RDS (ON) – VGS VGS = -1.5 V 5 -3 20 Common Source Ta = 25°C Pulse test 10 -2 Gate - Source voltage RDS (ON) – ID 30 25 -1 100 Ambient temperature Ta 125 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0 −25 150 (°C) Common Source ID = -0.1 mA VDS = -3 V 0 25 50 75 100 Ambient temperature Ta 3 125 150 (°C) 2014-03-01 SSM3J16FU ⎪Yfs⎪ – ID IDR – VDS 250 300 (mA) Common Source VDS =−3 V Ta = 25°C Pulse test Drain reverse current 100 Forward transfer admittance 200 IDR ⎪Yfs⎪ (mS) 1000 30 10 3 1 -1 -10 -100 Drain current ID Common Source VGS = 0 V Ta = 25°C Pulse test D 150 S 100 50 0 0 -1000 IDR G 0.2 (mA) 0.4 0.6 Drain - Source VDS 1.2 1.4 (V) 10000 Common Source VGS = 0 V f = 1 MHz Ta = 25°C Common Source VDD = -3 V VGS = 0~-2.5 V Ta = 25°C (ns) 3000 toff 1000 t 100 10 Switching time C (pF) 1.0 t – ID C – VDS 1000 Capacitance 0.8 Ciss Coss tf 300 100 ton tr 30 Crss 1 -0.1 -1 -10 10 -0.1 -100 Drain – Source voltage VDS (V) -1 Drain current ID -10 -100 (mA) PD – Ta Mounted on FR4 board (25.4mmX25.4mmX1.6mm Cu Pad:0.6mm2X3 200 Power dissipation PD (mW) 250 150 100 50 0 0 20 40 60 80 100 Ambient temperature Ta 120 140 160 (°C) 4 2014-03-01 SSM3J16FU RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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