SSM6J212FE,LF

SSM6J212FE TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSⅥ) SSM6J212FE ○ Power Management Switch Applications • • Unit: mm 1.5-V drive Low ON-resistance: RDS(ON) = 94.0 mΩ (max) (@VGS = -1.5 V) RDS(ON) = 65.4 mΩ (max) (@VGS = -1.8 V) RDS(ON) = 49.0 mΩ (max) (@VGS = -2.5 V) RDS(ON) = 40.7 mΩ (max) (@VGS = -4.5 V) Absolute Maximum Ratings (Ta = 25°C) Characteristic Symbol Rating Unit Drain-source voltage VDSS -20 V Gate-source voltage VGSS ±8 V DC ID (Note 1) -4.0 Pulse IDP (Note 1) -8.0 Drain current Power dissipation PD (Note 2) 500 t = 10s 700 A 1,2,5,6 ： Drain mW Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C ES6 JEDEC 3 ： Gate 4 ： Source ― JEITA ― Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in TOSHIBA 2-2N1J temperature, etc.) may cause this product to decrease in the Weight : 3mg ( typ. ) reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: The channel temperature should not exceed 150°C during use. Note 2: Mounted on a FR4 board. (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2) Marking (Top View) 6 5 Equivalent Circuit 4 6 5 4 3 1 2 3 PQ 1 2 Start of commercial production 2009-12 1 2014-03-01 SSM6J212FE Electrical Characteristics (Ta = 25°C) Characteristic Drain-source breakdown voltage Symbol Test Conditions V (BR) DSS ID = -1 mA, VGS = 0 V V (BR) DSX ID = -1 mA, VGS = 5 V (Note 4) Typ. Max Unit -20 ⎯ ⎯ V -15 ⎯ ⎯ V ⎯ ⎯ -1 μA Drain cut-off current IDSS Gate leakage current IGSS VGS = ±8 V, VDS = 0 V ⎯ ⎯ ±1 μA Vth VDS = -3 V, ID = -1 mA -0.3 ⎯ -1.0 V S Gate threshold voltage ⏐Yfs⏐ Forward transfer admittance Drain–source ON-resistance RDS (ON) Input capacitance Ciss Output capacitance Coss Reverse transfer capacitance Switching time Crss Turn-on time ton Turn-off time toff Total gate charge Qg Gate-source charge Qgs1 Gate-drain charge Qgd Drain-source forward voltage VDSF VDS = -20 V, VGS = 0 V Min VDS = -3 V, ID = -1.0 A (Note 3) 4.7 9.4 ⎯ ID = -3.0 A, VGS = -4.5 V (Note 3) ⎯ 35.3 40.7 ID = -2.0 A, VGS = -2.5 V (Note 3) ⎯ 41.3 49.0 ID = -1.0 A, VGS = -1.8 V (Note 3) ⎯ 48.6 65.4 ID = -0.5 A, VGS = -1.5 V (Note 3) ⎯ 56.7 94.0 VDS = -10 V, VGS = 0 V f = 1 MHz VDD = -10 V, ID = -2.0 A VGS = 0 to -2.5 V, RG = 4.7 Ω VDD = -10 V, IDD = -4.0 A, VGS = -4.5 V ID = 4.0 A, VGS = 0 V (Note 3) ⎯ 970 ⎯ ⎯ 127 ⎯ ⎯ 109 ⎯ ⎯ 47 ⎯ ⎯ 143 ⎯ ⎯ 14.1 ⎯ ⎯ 1.7 ⎯ mΩ pF ns nC ⎯ 2.4 ⎯ ⎯ 0.87 1.2 V Note3: Pulse test Note4: If a forward bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drain-source breakdown voltage is lowered in this mode. Switching Time Test Circuit (a) Test Circuit OUT 0 (b) VIN 0V 90% IN RG −2.5V 10 μs VDD 10% −2.5 V RL (c) VOUT VDD = -10 V RG = 4.7 Ω Duty ≤ 1% VIN: tr, tf < 5 ns Common Source Ta = 25°C VDS (ON) 90% 10% VDD tr ton tf toff Notice on Usage Vth can be expressed as the voltage between gate and source when the low operating current value is ID = -1 mA for this product. For normal switching operation, VGS (on) requires a higher voltage than Vth and VGS (off) requires a lower voltage than Vth. (The relationship can be established as follows: VGS (off) < Vth < VGS (on).) Take this into consideration when using the device. Handling Precaution When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. Thermal resistance Rth (ch-a) and drain power dissipation PD vary depending on board material, board area, board thickness and pad area. When using this device, please take heat dissipation into consideration. 2 2014-03-01 SSM6J212FE ID – VDS ID – VGS -8.0 -10 -4.5 V -1.8 V VDS = -3 V (A) -2.5 V Drain current ID ID -4.0 -2.0 Common Source Pulse test -1 (A) -6.0 Drain current Common Source VGS=-1.5 V Ta = 100 °C -0.1 -0.01 − 25 °C -0.001 25 °C Ta = 25 °C 0 Pulse test 0 -0.2 -0.4 -0.6 -0.8 Drain–source voltage VDS -0.0001 0 -1 -1.0 (V) Gate–source voltage Common Source 100 80 60 Ta = 100 °C 25 °C 40 20 0 − 25 °C 0 -4 -2 -6 Gate–source voltage VGS Ta = 25°C 100 -1.5 V 80 -1.8 V 60 -2.5 V 40 -4.5 V 20 0 -8 Pulse test 0 (V) -2.0 -1.0 A / -1.8 V -0.5 A / -1.5 V -2.0 A / -2.5 V 40 ID = -3.0 A / VGS = -4.5 V 20 0 −50 0 50 Ambient temperature (A) Common Source Vth (V) Pulse test 100 60 ID Vth – Ta Common Source 80 -8.0 -6.0 -1.0 Gate threshold voltage Drain–source ON-resistance RDS (ON) (mΩ) 120 -4.0 Drain current RDS (ON) – Ta 140 (V) Common Source 120 Pulse test Drain–source ON-resistance RDS (ON) (mΩ) Drain–source ON-resistance RDS (ON) (mΩ) 140 ID =-2.0A 120 VGS RDS (ON) – ID RDS (ON) – VGS 140 -3.0 -2.0 100 Ta VDS = -3 V ID = -1 mA -0.5 0 −50 150 (°C) 0 50 Ambient temperature 3 100 Ta 150 (°C) 2014-03-01 IDR – VDS |Yfs| – ID 100 10 Common Source 10 Ta = 25°C IDR Pulse test Common Source VGS = 0 V (A) ⎪Yfs⎪ VDS = -3 V 30 Forward transfer admittance 1 Pulse test D IDR G Drain reverse current (S) SSM6J212FE 3 1 0.3 0.1 -0.01 -1 -0.1 Drain current ID Ta =100 °C −25 °C 0.01 25 °C 0.001 0 -10 0.4 0.2 (A) 0.6 Drain–source voltage C – VDS 10000 S 0.1 0.8 VDS (pF) C 1000 Capacitance 500 (V) Common Source VDD = -10 V VGS = 0 to -2.5 V Ta = 25 °C RG = 4.7Ω 5000 tf (ns) 1000 1.2 t – ID 10000 toff 3000 1.0 t Ciss Switching time 300 Coss 100 Crss 50 30 10 -0.1 Common Source Ta = 25°C f = 1 MHz VGS = 0 V -1 -10 Drain–source voltage VDS 100 ton 10 tr 1 -0.001 -100 (V) -0.01 -0.1 Drain current -1 ID -10 (A) Dynamic Input Characteristic -8 Gate–source voltage VGS (V) Common Source ID = -4.0 A Ta = 25°C -6 -4 VDD = - 10 V VDD = - 16 V 10 20 -2 0 0 Total Gate Charge Qg 30 (nC) 4 2014-03-01 SSM6J212FE PD – Ta 600 Power dissipation PD (mW) Transient thermal impedance Rth (°C/W) Rth – tw 1000 100 10 Single pulse Mounted on FR4 board (25.4mm × 25.4mm × 1.6mm , Cu Pad : 645 mm2) 500 400 300 200 100 Mounted on FR4 board 2 (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm ) 1 0.001 0.01 0.1 1 Pulse Width 10 100 0 0 1000 tw (s) 50 Ambient temperature 5 100 Ta 150 (°C) 2014-03-01 SSM6J212FE RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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