TA2131FLG

TA2131FLG TOSHIBA Bipolar Linear IC Silicon Monolithic TA2131FLG Low Current Consumption Headphone Amplifier for Portable MD Player (With Bass Boost Function) The TA2131FLG is a low current consumption headphone amplifier developed for portable digital audio. It is particularly well suited to portable MD players that are driven by a single dry cell. It also features a built-in bass boost function with AGC, and is capable of bass amplification of DAC output and analog signals such as tuner. An ultra-compact QON package is utilized, enabling sets to be compacted. Features • • • • • • • • • Low current consumption: ICCQ (VCC1) = 0.55 mA (typ.) ICCQ (VCC2) = 0.20 mA (typ.) Output power: Po = 8 mW (typ.) (VCC1 = 2.8 V, VCC2 = 1.2 V, f = 1 kHz, THD = 10%, RL = 16 Ω) Low noise: Vno = −102dBV (typ.) Built-in low-pass boost (with AGC) I/O pin for beep sound Outstanding ripple rejection ratio Built-in power mute Built-in power ON/OFF switch Operating supply voltage range (Ta = 25°C): VCC1 = 1.8~4.5 V VCC2 = 0.9~4.5 V Weight: 0.05 g (typ.) Actual product display name: 2131 1 2006-04-19 TA2131FLG Block Diagram VCC1 VCC1 BEEP OFF ON PW SW OFF ON MT SW OFF ON BST SW BEEP IN 15 BEEP GND Vref IN 13 Vref Vref 18 MT TC 19 VCC1 VCC (2.8 V) 20 PW SW 17 16 14 MUTE SW BOOST SW 12 LPF1 11 ADD BST NF1 10 Vref INB 21 DAC OUT Vref BST1 Vref LPF2 22 INA BEEP OUTB BEEP OUTA BST2 PW A PW B 9 BST NF2 8 BST OUT Vref 23 Vref 24 BST AGC 1 VCC2 16 OUTA 3 PWR GND 4 OUTB 5 DET 6 AGC IN 7 +B (1.2 V) RL RL 2 2006-04-19 TA2131FLG Terminal Explanation (Terminal voltage: Typical terminal voltage at no signal with test circuit, VCC1 = 2.8 V, VCC2 = 1.2 V, Ta = 25°C) Terminal No. 1 VCC2 Terminal Explanation VCC (+B) at power amplifier output stage InternaL Circuit ⎯ Terminal Voltage (V) 1.2 20 kΩ 2 OUTA Power amplifier output 22 20 kΩ ADD PWA 0.61 2 20 kΩ 4 OUTB 21 INB 10 kΩ 10 kΩ BST1 OUT BST2 10 kΩ 15 kΩ Power amplifier input 20 kΩ 10 kΩ 10 kΩ 10 kΩ 7 0.61 10 kΩ 15 kΩ 22 INA 7 BST OUT BST amplifier 2 output terminal 21 BST amplifier 2 NF terminal (low-pass compensation condenser connection terminal) GND of power amplifier output stage 20 kΩ PWB 4 0.61 8 BST NF2 0.61 8 3 PWR GND ⎯ 0 20 5 DET Smoothing of boost AGC level detection 5.1 kΩ 5 ⎯ 3 2006-04-19 TA2131FLG Terminal No. Terminal Explanation InternaL Circuit Terminal Voltage (V) 20 Signal input level to BST amplifier is varied according to the input level to the boost AGC input terminal. Input impedance: 15 kΩ (typ.) 6 AGC IN 5 kΩ Vref 0.61 6 10 kΩ ADD 20 kΩ 20 kΩ 9 LPF2 BST amplifier 1 output (filter terminal) 22 PWA AGC BST1 0.61 BST2 AMP 11 20 kΩ 10 kΩ 12 kΩ 10 BST NF1 BST amplifier 1 NF 21 PWB 2 kΩ 30 kΩ 0.61 10 11 LPF1 ADD amplifier output (filter terminal) Vref 9 0.61 Vref 20 12 Vref Reference voltage circuit 4 kΩ 0.61 10 kΩ 13 Vref IN Reference voltage circuit filter terminal 13 10 kΩ 12 0.61 14 GND GND of input stage in power amplifier ⎯ 0 4 2006-04-19 TA2131FLG Terminal No. Terminal Explanation Beep sound input terminal Receives beep sound signals from microcomputer. InternaL Circuit Terminal Voltage (V) 15 BEEP IN 20 0 23 BEEP OUTB Beep sound output terminal 15 10 kΩ 23 24 ⎯ 24 BEEP OUTA 16 BST SW Bass boost ON/OFF switch “H” level/OPEN: BST ON “L” level: BST OFF Refer to function explanation 5 20 20 kΩ 16 ⎯ VCC1 20 17 MT SW Mute switch “L” level: Mute reset “H” level: Mute ON Refer to function explanation 5 17 ⎯ 47 kΩ VCC1 20 Power ON/OFF switch “H” level: IC operation “L” level: IC OFF Refer to function explanation 5 47 kΩ 18 ⎯ 18 PW SW 5 2006-04-19 TA2131FLG Terminal No. Terminal Explanation InternaL Circuit Terminal Voltage (V) 20 19 MT TC Mute smoothing Power mute switch Reduces the shock noise during switching 12 kΩ 1.2 19 20 VCC1 Main VCC ⎯ 2.8 6 2006-04-19 TA2131FLG Function Explanation 1. Bass Boost Function 1-1 Description of Operation TA2131FLG has a bass boost function for bass sound reproduction built-in to the power amplifier. With the bass boost function, at medium levels and lower, channel A and channel B are added for the low frequency component, and output to BST amplifier 2 (BST2) in negative phase. That signal is inverted and added before being subjected to bass boost. If the signal of the low-frequency component reaches a high level, the boost gain is controlled to main a low distortion (see Fig.1). 20 kΩ INA 20 kΩ 22 10 µF DAC OUT 10 µF Vref 20 kΩ ADD 10 kΩ 20 kΩ BST1 2 kΩ 30 kΩ 12 kΩ BST2 10 kΩ 20 kΩ 10 kΩ 15 kΩ 10 kΩ 15 kΩ 10 kΩ PWB 10 kΩ PWA 10 kΩ OUTA 2 V (OUT) 220 µF V (RL) 16 Ω RL BST NF2 8 1 µF Vref V (NF2) 220 µF 16 Ω RL 20 kΩ BST AGC 10 kΩ 5 kΩ LPF1 0.1 µF V (LPF1) 11 0.1 µF DET 5 AGC IN BST NF1 6 10 4.7 µF 0.1 µF V (NF1) 9 LPF2 V (LPF2) BST OUT 7 0.1 µF 22 kΩ V (BST OUT) Vref Vref Vref Figure 1 System Diagram of Bass Boost 1-2 AGC Circuit The AGC circuit of the bass boost function detects with “AGC DET” the voltage component created by “BST2,” and as the input level increases, the variable impedance circuit is changed, and the bass boost signal is controlled so that it is not assigned to BST amplifier 1. In this way, the bass signal to “BST2” input is shut-off, and that boost gain is controlled. 1-3 Bass Boost System As shown in Fig.1, the flow of the bass boost signal is that the signal received from power amplifier input goes through LPF1, ADD amplifier, ATT (variable impedance circuit), BPF1 (BST amplifier 1) and LPF2, and the negative phase signal to the power amplifier input signal is output from BST amplifier 2. The reason why it becomes the negative phase of the BST amplifier 2 signal is that the phase is inverted by 180° in the audible bandwidth by the secondary characteristics of LPF1 and LPF2 in Fig.1. Ultimately the main signal and the bass boost signal formed before BST2 are added. Fig.2 shows the frequency characteristics to each terminal. 10 kΩ 4 OUTB INB 21 7 2006-04-19 TA2131FLG 40 V (OUT) 20 V (RL) V (NF2) 0 V (LPF2) (dB) V (BST OUT) GV −20 V (NF1) −40 V (LPF1) −60 1 10 100 1k 10 k 100 k f (Hz) Figure 2 During Bass Boost (Frequency Characteristics to Each Terminal) 2. Low-Pass Compensation 2-1. Function In C-couple type power amplifiers, it is necessary to give the output condenser C a large capacity to flatten out the frequency characteristics to the low frequency band (this is because the loss in the low frequency bandwidth becomes larger due to the effect of the high-pass filter comprising C and RL). Particularly when the headphone load is approximately 16 Ω and an attempt is being made to achieve frequency characteristics of ±3 dB at 20 Hz, a large capacity condenser of C = 470 µF is required. Bearing this situation in mind, a low-pass compensation function was built in to the TA2131FLG, and while reducing the capacity of the output coupling condenser, almost flat (±3 dB) frequency characteristics in all audible bandwidths (20 Hz to 20 kHz) have been achieved. Fig.3 shows the low-pass system diagram, and Fig.4 shows the frequency characteristics at each point. In Fig.4, (a) represents the status lost by the low-pass as a result of the high-pass filter comprising the headphone load (RL = 16 Ω) and the output coupling condenser (220 µF) in the C-coupling system. 20 kΩ INA 20 kΩ 22 10 µF DAC OUT 10 µF 21 INB Vref 20 kΩ BST2 10 kΩ 20 kΩ 10 kΩ ADD 10 kΩ 15 kΩ 10 kΩ 15 kΩ 10 kΩ PWB 20 kΩ PWA 10 kΩ OUTA 2 V (OUT) V (RL) 220 µF 16 Ω RL BST NF2 8 1 µF Vref 220 µF 16 Ω RL 10 kΩ 4 OUTB Figure 3 Low-Pass Compensation System Diagram 8 2006-04-19 TA2131FLG 20 (b) 10 (dB) (c) 0 (a) GV −10 −20 1 10 100 1k 10 k 100 k f (Hz) Figure 4 Power Amplifier Frequency Characteristics The low-pass component alone is extracted from the composite signal of PWA/PWB output, and that frequency signal is fed back to PWA/PWB once more via the inversion amplifier, thereby making it possible to increase the gain only of the low-pass component. The frequency characteristics of the power amplifier output V (OUT) in this state are shown in Fig.4 (b). In practice they are the frequency characteristics (c) viewed from load terminal V (RL), and the low-pass is compensated relative to the state in (a). 2-2. Low-Pass Compensation Condenser and Crosstalk In this low-pass compensation condenser circuit, processing is carried out using the composite signal of power amplifier output, so this affects crosstalk, according to the amount of compensation. f characteristics and crosstalk generated by the capacity of the condenser for compensation (8-pin) are shown below. 10 VCC1 = 2.8 V VCC2 = 1.2 V Rg = 620 Ω RL = 1 6 Ω C = 0.47 µF Filter: LPF 80 kHz Output C = 220 µF 0 Vref short C = 1 µF C = 2.2 µF Response (dB) −10 10 30 100 300 1k 3k 10 k 30 k f (Hz) Figure 5 Condenser and f Characteristics for Low-Pass Compensation 9 2006-04-19 TA2131FLG CT – f VCC1 = 2.8 V VCC2 = 1.2 V Rg = 620 Ω RL = 16 Ω Vo = −22dBV WIDE BAND Output C = 220 µF C = 1 µF 0 C = 0.47 µF CT (dB) −20 C = 2.2 µF −40 Vrefshort −60 10 30 100 300 1k 3k 10 k 30 k 100 k f (Hz) Figure 6 Low-Pass Compensation Condenser and Crosstalk 3. Beep Beep sound signals from microcomputer can be received by the beep input terminal (15-pin). The PWA and PWB of the power amplifier during power mute are turned OFF, and the beep signal input from BEEP-IN (15-pin) is output from the BEEP-OUT terminal (23/24-pin) as fixed current, after passing through the converter and current amplification stage. Connecting this terminal to the headphone load outputs the beep sound. If the beep sound is not input, fix the BEEP-IN (15-pin) terminal to GND level. VCC PW SW (18-pin) OFF MT SW (17-pin) OFF BEEP IN (15-pin) 200 ms 20 IBEEP 15 IBEEP ID 23 24 100 ms 100 ms ON OFF ON OFF 4. Power Switch As long as the power switch is not connected to “H” level, the IC does not operate. If it malfunctions due to external noise, however, it is recommended to connect a pull-down resistor externally (the power switch is set to be highly sensitive). 10 2006-04-19 TA2131FLG 5. Threshold Voltages of Switches (1) 5 4.5 V PW SW 5 (2) 4.5 V MT SW, BST SW (V) 4 (V) H 4 3 V16 , V17 V18 3 H Terminal voltage 2 1.6 V 1 0.6 V L 0 1 2 3 4 5 Terminal voltage 2 1 0.8 V 0.3 V L 2 3 4 5 0 1 Power supply voltage VCC (V) Power supply voltage VCC (V) PW SW (V18) “H” level “L” level IC operation IC OFF “H” level “L” level MT SW (V17) Mute ON Mute reset BST SW (V16) “H” level/OPEN “L” level BST ON BST OFF 6. These capacitors which prevent oscillation of the power amplifier, and are between the Vref and VCC-GND must have a small temperature coefficient and outstanding frequency characteristics. 11 2006-04-19 TA2131FLG Absolute Maximum Ratings Characteristic Supply voltage Output current Power dissipation Operating temperature Storage temperature Symbol VCC Io (peak) PD (Note) Topr Tstg Rating 4.5 100 350 −25~75 −55~150 Unit V mA mW °C °C Note: Derated above Ta = 25°C in the proportion of 2.8 mW/°C. Electrical Characteristics (Unless specified otherwise, VCC1 = 2.8 V, VCC2 = 1.2 V, Rg = 600 Ω, RL = 16 Ω, f = 1 kHz, Ta = 25°C) Characteristic Symbol ICC1 ICC2 Quiescent supply current ICC3 ICC4 ICC5 ICC6 Power supply current during drive Gain Channel balance Output power Total harmonic distortion Power Section Output noise voltage Crosstalk ICC7 ICC8 GV CB Po max THD Vno CT RR1 Ripple rejection ratio RR2 Mute attenuation Beep sound output voltage ATT VBEEP BST1 Boost gain BST2 BST3 Test Condition IC off (VCC1), SW1: b, SW2: b IC off (VCC2), SW1: b, SW2: b Mute on (VCC1), SW1: a, SW2: b Mute on (VCC2), SW1: a, SW2: b No signal (VCC1), SW1: a, SW2: a No signal (VCC2), SW1: a, SW2: a Po = 0.5 mW + 0.5 mW output (VCC1) Po = 0.5 mW + 0.5 mW output (VCC2) Vo = −22dBV Vo = −22dBV THD = 10% Po = 1 mW Rg = 600 Ω, Filter: IHF-A, SW4: b Vo = −22dBV fr = 100 Hz, Vr = −20dBV inflow to VCC2 fr = 100 Hz, Vr = −20dBV inflow to VCC1 Vo = −12dBV, SW2: a → b V Beep IN = 2 Vp-o, SW2: b Vo = −20dBV, f = 100 Hz, SW3: ON → OPEN Vo = −30dBV, f = 100 Hz, SW3: ON → OPEN Vo = −50dBV, f = 100 Hz, SW3: ON → OPEN Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 10 −1.5 5 ⎯ ⎯ −42 −71 −54 −90 −53 1 10 13.5 Typ. 0.1 0.1 0.35 5 0.55 0.20 0.6 5.3 12 0 8 0.1 −102 −48 −77 −64 −100 −48 4 13 16.5 Max 5 5 0.50 10 0.75 0.40 ⎯ ⎯ 14 dB 1.5 ⎯ 0.3 −96 ⎯ ⎯ dB ⎯ ⎯ −43 7 16 19.5 dB dBV mW % dBV mA mA µA Unit µA 12 2006-04-19 TA2131FLG Test Circuit VCC VCC Rg = 600 Ω 4.7 µF 15 BEEP IN 14 GND 13 Vref IN V ref (a) (b) SW1 (a) (b) SW2 SW3 OFF ON 18 1 µF 19 MT TC PW SW 17 MT SW 16 BST SW 12 10 µF VCC1 (2.8 V) 600 Ω (b) 10 µF (a) SW4B (a) 10 µF 600 Ω Vref (b) SW4A 20 VCC1 LPF1 11 0.1 µF Vref 21 INB TA2131FLG 22 INA BST 10 NF1 Vref 4.7 µF LPF2 9 0.1 µF BST NF2 Vref 23 BEEP OUTB 8 Vref VCC2 1 OUTA 2 PWR GND 3 (*) OUTB 4 DET 5 0.1 µF (*) 6 220 µF +B (1.2 V) 16 Ω 220 µF 16 Ω (*) 0.22 µF + 10 Ω Monolithic ceramic capacitor 22 kΩ 0.1 µF 24 BEEP OUTA BST AGC OUT 7 IN 13 2006-04-19 TA2131FLG Application Circuit 1 VCC1 VCC1 100 kΩ OFF ON 0.1 µF BEEP OFF ON OFF ON 18 MT TC PW SW 1 µF 19 17 MT SW 16 BST SW 15 BEEP IN 14 GND 4.7 µF 13 Vref IN Vref 12 10 µF VCC (2.8 V) 20 VCC1 LPF1 11 0.1 µF Vref 10 µF DAC OUT 10 µF Vref 21 INB TA2131FLG BST 10 NF1 Vref 4.7 µF 22 INA LPF2 9 0.1 µF Vref BEEP 23 OUT B BST 8 NF2 1 µF Vref +B (1.2 V) 220 µF RL 220 µF RL 0.1 µF (*) (*) (*) 0.22 µF + 10 Ω Monolithic ceramic capacitor 22 kΩ VCC2 1 OUTA 2 OUTB 4 DET 5 3 6 0.1 µF 24 BEEP OUTA PWR GND BST AGC OUT IN 7 14 2006-04-19 TA2131FLG Application Circuit 2 (Low-Pass Compensation/Bass Boost Function/Beep Not Used) VCC1 VCC1 OFF ON OFF ON 18 MT TC PW SW 1 µF 19 17 MT SW 16 BST SW 15 BEEP IN 14 GND 4.7 µF 13 Vref IN Vref 12 10 µF VCC1 (2.8 V) 20 VCC1 LPF1 11 Vref 10 µF DAC OUT 10 µF Vref 21 INB TA2131FLG BST 10 NF1 22 INA LPF2 9 Vref 23 BEEP OUTB BST 8 NF2 Vref 24 BEEP OUTA VCC2 1 OUTA 2 220 µF PWR GND 3 OUTB 4 220 µF (*) DET 5 BST AGC OUT IN 6 7 (*) +B (1.2 V) Vref RL RL (*) 0.22 µF + 10 Ω Monolithic ceramic capacitor 15 2006-04-19 TA2131FLG Characteristics (Unless otherwise specified VCC1 = 2.8 V, VCC2 = 1.2 V, Rg = 600 Ω, f = 1 kHz, Ta = 25°C) 1.0 ICC – VCC2 1.0 VDC – VCC2 (Vref, OUT) (mA) 0.8 0.8 ICC Quiescent supply current 0.4 Output voltage 0.6 (V) ICC5 0.6 0.4 0.2 ICC6 0.2 0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 Supply voltage VCC2 (V) Supply voltage VCC2 (V) ICC – VCC2 1.0 MUTE ON 100 Po – VCC2 (mA) ICC (mW) Output voltage Po 0.8 30 10 Quiescent supply current 0.6 3 0.4 ICC3 1 0.2 0.3 ICC4 0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 0.1 0.6 0.8 1.0 1.2 1.4 1.6 1.8 THD = 10 % A/Bch IN 2.0 2.2 2.4 Supply voltage VCC2 (V) Supply voltage VCC2 (V) ICC – Po −80 Vno – VCC2 IHF-A −85 −90 −95 −100 −105 −110 −115 −120 0.6 (mW) 100 ICC 30 Consumption supply current 10 ICC8 3 1 ICC7 0.3 0.1 0.01 Output noise voltage Vno (dBV) A/Bch IN 0.03 0.1 0.3 1 3 10 30 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 Output voltage Po (mW) Supply voltage VCC2 (V) 16 2006-04-19 TA2131FLG THD – Po 10 0 R.R. – VCC2 inflow to VCC1 fr = 100 Hz Vr = −20dBV (%) 3 R.R. (dB) 10 kHz −20 THD 1 Total harmonic distortion 0.3 Ripple rejection ratio 3 10 30 100 300 −40 −60 0.1 100 Hz/1 kHz 0.03 −80 0.01 0.1 0.3 1 −100 0.4 0.8 1.2 1.6 2 .0 2.4 Output voltage Po (mW) Supply voltage VCC2 (V) THD – VCC2 30 RL = 16 Ω 0 Po = 1 mW A/Bch IN R.R. – VCC inflow to VCC2 fr = 100 Hz Vr = −20dBV (%) 10 (dB) R.R. Ripple rejection ratio −20 THD 3 Total harmonic distortion −40 1 −60 0.3 1 kHz 10 kHz 100 Hz 0.1 −80 0.03 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 −100 0.4 0.8 1.2 1.6 2 .0 2.4 Supply voltage VCC2 (V) Supply voltage VCC2 (V) Vo – f 0 −10 −30 −40 BEEP (dBV) (dBV) Beep output voltage −20 −30 −40 −50 −60 −70 10 −50 −60 −70 −80 −90 −100 −110 0.1 fBEEP = 400 Hz rectangle wave 0.3 0.5 1 3 5 10 Output voltage Vo 30 100 300 1k 3k 10 k 30 k Frequency f (Ｈz) beep input voltage VBEEP (Vp-o) (V) 17 2006-04-19 TA2131FLG CT – f 0 Vo = −22 dBV 10 1.0 ICC – Ta (mA) Quiescent supply current ICC 0.8 CT (dB) 20 Application ciucuit 1 30 40 (No use Low-Pass Compensation) 50 Application ciucuit 2 60 70 10 0.6 ICC5 Cross talk 0.4 ICC6 0.2 30 100 300 1k 3k 10 k 30 k 0 −50 −25 0 25 50 75 100 Frequency f (Ｈz) Ambient temperature Ta (°C) VDC – Ta 1.0 VDC Output voltage (V) 0.8 0.6 0.4 0.2 0 −50 −25 0 25 50 75 100 Ambient temperature Ta (°C) 18 2006-04-19 TA2131FLG Display of Actual Product Display of Actual Product (Labeling Example) *1 *1 9 *2 0 *1 Display name of actual product: 2131 *2 Weekly Code: 9 0 1 K A Toshiba’s internal management code Weekly code *2 Year (last digit) A K 1 1-pin display Requests Concerning Use of QON Outline Drawing of Package (Upper Surface) (Lower Surface) When using QON, please take into account the following items. (1) (2) Do not carry out soldering on the island section in the four corners of the package (the section shown on the lower surface drawing with diagonal lines) with the aim of increasing mechanical strength. The island section exposed on the package surface (the section shown on the upper surface drawing with diagonal lines) must be used as *1 below while electrically insulated from outside. Note 1: Ensure that the island section (the section shown on the lower surface drawing with diagonal lines) does not come into contact with solder from through-holes on the board layout. • • When mounting or soldering, take care to ensure that neither static electricity nor electrical overstress is applied to the IC (measures to prevent anti-static, leaks, etc.). When incorporating into a set, adopt a set design that does not apply voltage directly to the island section. 19 2006-04-19 TA2131FLG Package Dimensions Weight: 0.05 g (typ.) 20 2006-04-19 TA2131FLG RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 021023_D 060116EBA • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. 021023_A • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. 021023_B • The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. 021023_C • The products described in this document are subject to the foreign exchange and foreign trade laws. 021023_E About solderability, following conditions were confirmed • Solderability (1) Use of Sn-37Pb solder Bath · solder bath temperature = 230°C · dipping time = 5 seconds · the number of times = once · use of R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder Bath · solder bath temperature = 245°C · dipping time = 5 seconds · the number of times = once · use of R-type flux 21 2006-04-19