TA2170FLG

TA2170FLG TOSHIBA Bipolar Linear IC Silicon Monolithic TA2170FLG Low Current Consumption Headphone Amplifier (Built-in Input Selector) The TA2170FLG is a stereo headphone amplifier built-in selector switch for three inputs. The mute switch is built into each of the three inputs, and a single or mixer output can be selected for the output. Features • Low current consumption VCC = 3 V, f = 1 kHz, RL = 32 Ω, typ. • No signal mode ICCQ = 0.9 mA (1-input mode) ICCQ = 1.0 mA (2-input mode) ICCQ = 1.1 mA (3-input mode) • 0.1 mW × 2 ch ICC = 2.2 mA (1-input mode) ICC = 2.3 mA (2-input mode) ICC = 2.4 mA (3-input mode) • 0.5 mW × 2 ch ICC = 4.1 mA (1-input mode) ICC = 4.2 mA (2-input mode) ICC = 4.3 mA (3-input mode) • • • • • • • GV = −0.3 dB (1-input mode, typ.) Built-in signal level adjustment circuit to eliminate any perceptible change in volume whether single or mixer output is used. Built-in power switch Built-in all mute switch Built-in mute switch at each buffer amplifier Built-in one side mute switch at buffer amplifier 1 Operating supply voltage range (Ta = 25°C): VCC1 (opr) = 1.8 to 4.5 V VCC2 (opr) = 0.9 to 4.5 V Weight: 0.05 g (typ.) Marking: 2170G 1 2006-04-19 TA2170FLG Block Diagram VCC1 VCC PW SW ON 19 ALL MUTE 20 18 RF IN 17 GND 16 VCC1 15 BIAS OUT 14 BIAS IN 13 OUT ADJ BIAS BUF1A IN1A 12 IN1 MUTE1-A BUF1B ON IN1B 11 MUTE1 ON MUTE3 21 PW SW MUTE SW IN2A 10 BUF2A IN2 IN2B 9 BUF2B ON MUTE2 22 MUTE2 ON MUTE1A 23 BUF3A IN3A 8 PW A PW B IN3 IN3B 7 ON MUTE1 24 ALL MUTE MUTE3 1 EQA 2 OUTA 3 PW GND 4 OUTB 5 EQB 6 BUF3B VCC2 VCC2 OUTA RL RL OUTB 2 2006-04-19 TA2170FLG Pin Descriptions Pin Voltage: Typical pin voltage for a test circuit when no input signal is applied, VCC1 = VCC2 = 3 V, Ta = 25°C Pin No. & Name Function Internal Circuit Pin Voltage (V) 1 EQA 2 Low-pass compensation pins 1.15 5 EQB 5 kΩ 15 kΩ 43 kΩ 1 BIAS OUT 2 OUTA Outputs from power amplifier 6 VCC2 1.15 OUTB 2 OUT 0 3 PW GND GND for power drive stage 4 3 6 VCC2 VCC for power drive stage 3 7 8 9 10 11 12 IN3B Inputs to buffer amplifier 3 IN3A IN2B Inputs to buffer amplifier 2 IN2A IN1B Inputs to buffer amplifier 1 IN1A 8 10 kΩ 10 kΩ 1.15 1.15 BIAS OUT 1.15 3 2006-04-19 TA2170FLG Pin No. & Name Function DC output voltage adjustment Either connect this pin or leave it open, depending on the level of VCC2. If the power supply of a 1.5-V system is applied to VCC2, connect this pin to BIAS IN (pin 14). If the power supply of a 3-V system is applied to VCC2, leave this pin open. Bias circuit input Internal Circuit Pin Voltage (V) VCC2 1.85 18 47 kΩ 15 kΩ 13 OUT ADJ 14 BIAS IN 13 16 VCC1 1.15 15 BIAS OUT Bias circuit output VCC for everything other than the power drive stage Ripple filter input ⎯ 14 62 kΩ 15 1.15 16 VCC1 3 18 17 RF IN GND 2.7 ⎯ 0 VCC1 100 kΩ 10 kΩ 19 PW SW Power switch IC ON: H level IC OF : L level Refer to Application Note 4. 19 3 20 ALL MUTE All mute switch Mute ON: L level Mute OFF : H level Refer to Application Note 4. VCC 10 kΩ 20 kΩ 20 ⎯ 21 MUTE3 Mute switch of buffer amplifier 3 Mute ON: L level Mute OFF: H level Refer to Application Note 4. Mute switch of buffer amplifier 2 Mute ON: L level Mute OFF: H level Refer to Application Note 4. Mute switch of buffer amplifier 1A Mute ON: L level Mute OFF: H level This switch is used for turning on A channel mutes for buffer amplifier 1. Refer to Application Note 4. Mute switch of buffer amplifier 1 Mute ON: L level Mute OFF: H level Refer to Application Note 4. 39 kΩ ⎯ 22 MUTE2 ⎯ VCC 10 kΩ 21 ⎯ 23 MUTE1A 24 MUTE1 ⎯ 4 2006-04-19 TA2170FLG Application Notes 1. Mute switch and voltage gain This IC is designed to ensure there is no perceptible change in volume whether a single output or several outputs are used. When the input signal to the three buffer amplifiers is the same and in a linear domain, the relation between the mute switches and voltage gain is as follows: Test condition: VCC = 3 V, f = 1 kHz, Vin = −20 dBV, theoretical value. (1) 1-input mode MUTE SW MUTE1 MUTE1A MUTE2 MUTE3 Attenuation to an input signal (dB) BUF1 BUF2 BUF3 Ach Bch Ach Bch Ach Bch ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Total gain (dB) Ach Bch Input signal is applied to BUF 1. OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF ON ON ON ON ON OFF ON OFF ON OFF ON OFF ON ON OFF OFF ON ON OFF OFF 0 −6 −6 −9.5 ⎯ ⎯ ⎯ ⎯ 0 −6 −6 −9.5 0 −6 −6 −9.5 0 −6 −6 −9.5 ⎯ ⎯ ⎯ ⎯ 0 −6 −6 −9.5 0 −6 −6 −9.5 Input signal is applied to BUF 2 ON ON OFF OFF OFF OFF ON/OFF ON/OFF OFF ON OFF ON OFF OFF OFF OFF OFF OFF ON OFF ON ON OFF OFF ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 0 −6 −6 0 −9.5 −6 0 −6 −6 −6 −9.5 −9.5 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 0 −6 −6 0 −9.5 −6 0 −6 −6 −6 −9.5 −9.5 Input signal is applied to BUF 3. ON ON OFF OFF OFF OFF ON/OFF ON/OFF OFF ON OFF ON ON OFF ON ON OFF OFF OFF OFF OFF OFF OFF OFF ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 0 −6 −6 0 −9.5 −6 0 −6 −6 −6 −9.5 −9.5 0 −6 −6 0 −9.5 −6 0 −6 −6 −6 −9.5 −9.5 5 2006-04-19 TA2170FLG (2) 2-input mode MUTE SW MUTE1 MUTE1A MUTE2 MUTE3 Attenuation to an input signal (dB) BUF1 BUF2 BUF3 Ach Bch Ach Bch Ach Bch −6 −9.5 ⎯ ⎯ −6 −9.5 ⎯ −6 −6 −9.5 ⎯ −9.5 −6 −9.5 ⎯ −6 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Total gain (dB) Ach Bch Input signal is applied to BUF 1 and BUF 2. OFF OFF OFF OFF OFF OFF ON ON OFF OFF OFF OFF ON OFF ON OFF 0 −3.5 ⎯ −3.5 0 −3.5 ⎯ 0 Input signal is applied to BUF 1 and BUF 3. OFF OFF OFF OFF OFF OFF ON ON ON OFF ON OFF OFF OFF OFF OFF −6 −9.5 ⎯ ⎯ −6 −9.5 −6 −9.5 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ −6 −9.5 −6 −9.5 −6 −9.5 −6 −9.5 0 −3.5 −6 −9.5 0 −3.5 0 −3.5 Input signal is applied to BUF 2 and BUF 3. ON OFF OFF ON/OFF ON OFF OFF OFF OFF OFF OFF OFF ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ −6 −6 −9.5 −6 −9.5 −9.5 −6 −6 −9.5 −6 −9.5 −9.5 0 0 −3.5 0 −3.5 −3.5 (3) 3-input mode MUTE SW Attenuation to an input signal (dB) BUF1 BUF2 BUF3 Ach Bch Ach Bch Ach Bch −9.5 ⎯ −9.5 −9.5 −9.5 −9.5 −9.5 −9.5 −9.5 −9.5 −9.5 −9.5 Total gain (dB) Ach Bch 0 −3.5 0 0 MUTE1 OFF OFF MUTE1A OFF ON MUTE2 OFF OFF MUTE3 OFF OFF 2. Low-cut compensation The low-frequency range can be decreased using an output-coupling capacitor and a load (fc = 50 Hz at C = 100 µF, R = 32 Ω). However, since the capacitor is connected between the IC’s output pin (pin 2/4) and EQ pin (pin 1/5), the low-frequency gain of the power amplifier increases, enabling low-cut compensation to be performed. For the response of capacitors of different values, refer to Figure 1. RES – f 4.0 0.1 µF 2.0 0.15 µF 0.0 Response (dB) −2.0 −4.0 0.22 µF −6.0 No compensation −8.0 −10.0 −12.0 10 Coupling C = 100 µF RL = 32 Ω 50 100 500 1000 5000 Frequency f (Hz) Figure 1. Capacitor Response 6 2006-04-19 TA2170FLG 3. Adjustment of DC output voltage Perform the following with the OUT ADJ pin (pin 13) using the power supply of VCC1 and VCC2: • If a boost voltage is applied to VCC1, VCC2 is connected to a battery and the difference between VCC1 and VCC2 is greater than or equal to 0.7 V, short pins 13 and 14 together. In this case the DC output voltage will be as follows: VCC2 . 2 • If the difference between VCC1 and VCC2 is less than 0.7 V, or if VCC1 and VCC2 are connected to the same power supply, leave pin 13 open. In these cases, the DC output voltage will be VCC2 − 0.7 V . 2 4. Switch (1) Timing chart Refer to Figure 2 for the IC timing chart. ON PW SW OFF OFF ALL MUTE ON OFF MUTE ON OUT 200 ms 100 ms Figure 2. Timing Chart (2) PW SW The device is ON when this pin is set to High. To prevent the IC being turned ON by external noise, it is necessary to connect an external pull-down resistor to the PW SW pin. The pin is highly sensitive. Mute smoothing Ensure that the smoothing resistor used for the mute pin is 100 kΩ or less. The switch circuit will not operate normally if the value is greater than this. (3) 7 2006-04-19 TA2170FLG (4) 5 4.5 V Switch sensitivity (Ta = 25°C) 5 4.5 V (V) 4 (V) Applied voltage V20~24 H 4 Applied voltage V19 3 3 H 2 2 1.5 V 1 0.3 V 0 0 1 2 1 0.8 V 0.1 V L 1 2 3 4 5 L 3 4 5 0 0 Supply voltage VCC1 (V) Supply voltage VCC1 (V) PW SW H level L level IC ON IC OFF H level L level MUTE Mute OFF Mute ON Figure 3: Switch Sensitivity 5. Capacitor The following capacitors must have excellent temperature and frequency characteristics. Absolute Maximum Ratings (Ta = 25°C) Characteristic Supply voltage 1 Supply voltage 2 Output current Power dissipation Operating temperature Storage temperature Symbol VCC1 VCC2 Io (peak) PD (Note) Topr Tstg Rating 4.5 4.5 100 350 −25~75 −55~150 mA mW °C °C Unit V Note: Derated by 2.8 mW/°C above Ta = 25°C 8 2006-04-19 TA2170FLG Electrical Characteristics (Unless otherwise specified, VCC1 = VCC2 = 3 V, Rg = 600 Ω, RL = 32 Ω, f = 1 kHz, Ta = 25°C, SW1~SW5: a, SW6~SW8: a) Characteristic Symbol ICCQ1 Test condition IC OFF mode SW1~5: b 1 input on mode BUF1: ON (SW5: a, SW3/4: b) BUF2: ON (SW4: a, SW3/5: b) BUF3: ON (SW3: a, SW4/5: b) 2 input on mode BUF1/2: ON (SW4/5: a, SW3: b) BUF1/3: ON (SW3/5: a, SW4: b) BUF2/3: ON (SW3/4: a, SW5: b) 3 input on mode 1 input on mode VCC1 = 2.4 V, VCC2 = 1.2 V BUF1: ON (SW5: a, SW3/4: b) BUF2: ON (SW4: a, SW3/5: b) BUF3: ON (SW3: a, SW4/5: b) 1 input on mode 0.1 mW/32 Ω × 2 ch BUF1: ON (SW5: a, SW3/4: b) BUF2: ON (SW4: a, SW3/5: b) BUF3: ON (SW3: a, SW4/5: b) 2 input on mode 0.1 mW/32 Ω × 2 ch BUF1/2: ON (SW4/5: a, SW3: b) BUF1/3: ON (SW3/5: a, SW4: b) BUF2/3: ON (SW3/4: a, SW5: b) 3 input on mode 0.1 mW/32 Ω × 2 ch 1 input on mode Vo = −20 dBV BUF1: ON (SW5: a, SW3/4: b) BUF2: ON (SW4: a, SW3/5: b) BUF3: ON (SW3: a, SW4/5: b) 2 input on mode Vo = −20 dBV BUF1/2: ON (SW4/5: a, SW3: b) BUF1/3: ON (SW3/5: a, SW4: b) BUF2/3: ON (SW3/4: a, SW5: b) 3 input on mode Vo = −20 dBV Vo = −20 dBV THD = 10% VCC1 = 2.4 V, VCC2 = 1.2 V THD = 10% Po = 1 mW Rg = 600 Ω, Filter: IHF-A, SW6~8: b Vo = −20 dBV fr = 100 Hz, Vr = −20 dBV ALL MUTE SW: ON, Vo = −20 dBV MUTE SW: ON, Vo = −20 dBV VCC1 = 1.8 V, VCC2 = 0.9 V VCC1 = 1.8 V, VCC2 = 0.9 V VCC1 = 1.8 V, VCC2 = 0.9 V VCC1 = 1.8 V, VCC2 = 0.9 V Min. ⎯ ⎯ Typ. ⎯ Max. 5 Unit µA ICCQ2 0.9 1.6 Quiescent supply current ICCQ3 ⎯ ⎯ 1.0 1.8 mA ICCQ4 1.1 2.0 ICCQ5 ⎯ 0.9 1.6 ICC1 ⎯ 2.2 ⎯ Power supply current during drive ICC2 mA ⎯ ⎯ −1.8 2.3 ⎯ ⎯ ICC3 2.4 −0.3 GV1 1.2 Voltage gain GV2 dB −1.0 −0.8 −1.5 15 3 ⎯ ⎯ −53 −70 −75 −47 5 0 5 0 0.5 2.0 GV3 Channel balance CB Po1 Output power Po2 Total harmonic distortion Output noise voltage Cross talk Ripple rejection ratio Muting attenuation PW SW ON current PW SW OFF voltage MUTE SW OFF current MUTE SW ON voltage THD Vno CT RR ATT1 ATT2 I19 V19 I20-24 V20-24 0.7 0 20 6 0.1 −100 −60 −80 −90 −62 ⎯ ⎯ ⎯ ⎯ 2.2 1.5 ⎯ ⎯ 0.3 −96 ⎯ ⎯ ⎯ ⎯ ⎯ 0.3 ⎯ 0.1 mW dB % dBV dB dB dB µA V µA V 9 2006-04-19 TA2170FLG Test Circuit VCC1 4.7 µF VCC SW1 PW SW (a) 19 (b) (a) 100 kΩ ALL MUTE 20 18 RF IN 22 µF 17 GND 16 VCC1 15 BIAS OUT 4.7 µF BIAS IN 10 µF 14 13 OUT ADJ IN1A 12 Rg = 600 Ω SW8a 1 µF (b) (a) 600 Ω 0.1 µF SW2 (b) IN1B 11 Rg = 600 Ω (a) 600 Ω SW8b 1 µF (b) SW7a 1 µF (b) SW7b 1 µF (b) 0.1 µF SW3 (b) (a) 100 kΩ MUTE3 21 IN2A 10 Rg = 600 Ω (a) 600 Ω 0.1 µF SW4 (b) (a) 100 kΩ TA2170FLG 9 MUTE2 22 IN2B Rg = 600 Ω (a) 600 Ω 0.1 µF SW5b (b) (a) 100 kΩ MUTE1A 23 (a) 100 kΩ Rg = 600 Ω (a) 600 Ω IN3A 8 SW6a 1 µF (b) 0.1 µF SW5a (b) MUTE1 24 IN3B 7 Rg = 600 Ω (a) 600 Ω SW6b 1 µF (b) 1 EQA 0.22 µF 2 OUTA 4.7 Ω 0.22 µF 100 µF 3 4.7 Ω 0.22 µF OUTA 100 µF 0.22 µF OUTB RL RL 22 µF PW GND 4 OUTB 5 EQB 6 VCC2 VCC2 10 2006-04-19 TA2170FLG Markings Markings (example) *1 *1 9 *2 0 *1 Product name: 2152 *2 Weekly code: 9 0 1 K A Toshiba internal management code Weekly code Year (last digit only) A K 1 Orientation marking *2 11 2006-04-19 TA2170FLG Package Dimensions W eight: 0.05 g (typ.) 12 2006-04-19 TA2170FLG RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 021023_D 060116EBA • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. 021023_A • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. 021023_B • The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. 021023_C • The products described in this document are subject to the foreign exchange and foreign trade laws. 021023_E About solderability, following conditions were confirmed • Solderability (1) Use of Sn-37Pb solder Bath · solder bath temperature = 230°C · dipping time = 5 seconds · the number of times = once · use of R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder Bath · solder bath temperature = 245°C · dipping time = 5 seconds · the number of times = once · use of R-type flux 13 2006-04-19