TB62209FG
TOSHIBA BiCD Processor IC Silicon Monolithic
TB62209FG
Stepping Motor Driver IC Using PWM Chopper Type
The TB62209FG is a stepping motor driver driven by chopper
micro-step pseudo sine wave.
The TB62209FG integrates a decoder for CLK input in micro
steps as a system to facilitate driving a two-phase stepping motor
using micro-step pseudo sine waves. Micro-step pseudo sine
waves are optimal for driving stepping motors with low-torque
ripples and at low oscillation. Thus, the TB62209FG can easily
drive stepping motors with low-torque ripples and at high
efficiency.
Also, TB62209FG consists of output steps by DMOS (Power
Weight: 0.79 g (typ.)
MOS FET), and that makes it possible to control the output
power dissipation much lower than ordinary IC with bipolar
transistor output.
The IC supports Mixed Decay mode for switching the attenuation ratio at chopping. The switching time for the
attenuation ratio can be switched in four stages according to the load.
Features
•
Bipolar stepping motor can be controlled by a single driver IC
•
Monolithic BiCD IC
•
•
•
•
Low ON-resistance of Ron = 0.5 Ω (Tj = 25°C @1.0 A: typ.)
Built-in decoder and 4-bit DA converters for micro steps
Built-in ISD, TSD, VDD &VM power monitor (reset) circuit for protection
Built-in charge pump circuit (two external capacitors)
•
36-pin power flat package (HSOP36-P-450-0.65)
•
Output voltage: 40 V max
•
Output current: 1.8 A/phase max
•
•
•
2-phase, 1-2 (type 2) phase, W1-2 phase, 2W1-2 phase, 4W1-2 phase, or motor lock mode can be
selected.
Built-in Mixed Decay mode enables specification of four-stage attenuation ratio.
Chopping frequency can be set by external resistors and capacitors.
High-speed chopping possible at 100 kHz or higher.
Note: When using the IC, pay attention to thermal conditions.
This device is easily damaged by high static voltage, please handle with care.
This product is RoHS compatible.
© 2014 TOSHIBA Corporation
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TB62209FG
Block Diagram
1. Overview
TORQUE 1 TORQUE 2
MDT 1
MDT 2
RESET
CW/CCW
MO
ENABLE
STANDBY
VDD
Micro-step decoder
D MODE 3
D MODE 2
Chopper OSC
D MODE 1
CR-CLK
converter
Current Level Set
Vref
CR
OCS
CLK
Torque control
4-bit D/A
(sine angle control)
Current Feedback (×2)
RS
VM
VM
VRS 1
RS COMP 1
VRS 2
RS COMP 2
Ccp C
Ccp B
Ccp A
Output control
(Mixed Decay control)
STANDBY
Charge
Pump
Unit
ISD
Output (H-bridge)
×2
ENABLE
VM
TSD
VDDR/VMR
protect
VDD
TSD
protect
Protection Unit
Stepping
Motor
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TB62209FG
2. LOGIC UNIT Function
The microstep electrical angle is output according to the logic of the PIN settings.
MDT 1
MDT 2
TORQUE 1
TORQUE 2
DATA MODE
Decay
× 2 bit
A unit
Micro-step decoder
D MODE 1
D MODE 2
D MODE 3
Micro-step
current data
× 4 bit
A unit side
CW/CCW
CLK
STANDBY
Phase
× 1 bit
A unit
RESET
ENABLE
Output
control
circuit
Torque
× 2 bit
Current
feedback
circuit
Decay
× 2 bit
B unit
side
Micro-step
current data
× 4 bit
B unit side
Mixed
Decay
circuit
D/A circuit
3
Phase
× 1 bit
B unit
side
Output
control
circuit
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TB62209FG
3. Current feedback circuit and current setting circuit
Function
The current setting circuit is used to set the reference voltage of the output current using the current
setting decoder.
The current feedback circuit is used to output to the output control circuit the relation between the
set current value and output current. This is done by comparing the reference voltage output to the
current setting circuit with the potential difference generated when current flows through the current
sense resistor connected between RS and VM.
The chopping waveform generator circuit to which CR is connected is used to generate clock used as
reference for the chopping frequency.
Decoder
Unit
TORQUE
0, 1
Vref
100%
85%
70%
50%
Torque
control
circuit
Current setting
circuit
D/A circuit
RS
VM
CURRENT
0-3
15 Micro-step
14
current
setting
13
12 selector
circuit
11
10
9
8
7
6
5
4
3
4-bit
2
D/A
1
circuit
Chopping waveform
generator circuit
Waveform shaping circuit
Chopping reference circuit
CR
Mixed
Decay
timing
circuit
0
Output stop signal (ALL OFF)
VRS circuit 1
(detects
potential
difference
between
RS and VM)
RS COMP
circuit
1
(Note 1)
VRS circuit 2
(detects
potential
difference
between
VM and RS)
RS COMP
circuit
2
(Note 2)
NF
(set current
reached signal)
Output
control
circuit
RNF
(set current
monitor signal)
Current feedback circuit
Note 1: RS COMP1: Compares the set current with the output current and outputs a signal when the output
current reaches the set current.
Note 2: RS COMP2: Compares the set current with the output current at the end of Fast mode during chopping.
Outputs a signal when the set current is below the output current.
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TB62209FG
4. Output control circuit, current feedback circuit and current setting circuit
Micro-step current setting
decoder circuit
Chopping
reference circuit
DECAY
MODE
Output control circuit
PHASE
Mixed
Decay
timing
circuit
NF set current
reached signal
Current
feedback
circuit
CR counter
Mixed
Decay
timing
RNF set current
monitor signal
Output stop
signal
Current
setting
circuit
CR Selector
Charge Start
U1
U2
Output circuit
L1
Output control circuit
L2
Output RESET signal
VDD
VM
Power supply for
upper drive output
STANDBY
Output pin
ISD
circuit
VM
VMR
circuit
VDD
VDDR
circuit
Charge
pump
halt
signal
Internal
stop
signal
select
circuit
VMR: VM power on Reset
ISD: Current shutdown
circuit
TSD: Thermal shutdown
circuit
Cop A
Cop C
Charge pump
circuit
Protection
circuit
Micro-step current
setup latch
clear signal
Charge
pump
circuit
Output
circuit
Cop B
TSD
circuit
VDDR: VDD power on
Reset
VH
Mixed Decay
timing table clear
signal
LOGIC
Note: The STANDBY pins are pulled down in the IC by 100-kΩ resistor.
When not using the pin, connect it to GND. Otherwise, malfunction may occur.
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TB62209FG
5. Output equivalent circuit
VM A
RS A
Power
supply
for upper
drive output
(VH)
From output
control
circuit
U1
U2
L1
L2
U1
To VM
RRS A
U2
Output A
L1
L2
Output A
Output
driver
circuit
Phase A
VM B
RSB
Power
supply
for upper
drive output
(VH)
From output
control
circuit
U1
U2
L1
L2
U1
RRS B
U2
Output B
L1
L2
M
Output B
Output
driver
circuit
Phase B
PGND
Note: The diode on the dotted line is a body diode.
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TB62209FG
6. Input equivalent circuit
1.
Input circuit (CLK, TORQUE, MDT, CW/CCW)
VDD
IN
150 Ω
To Logic IC
VSS
2.
GND
Input circuit (RESET, ENABLE, STANDBY , DATA MODE, Drive Mode)
VDD
100 kΩ
IN
150 Ω
To Logic IC
VSS
3.
GND
Vref input circuit
VDD
IN
2
To D/A circuit
VSS
4.
GND
Output circuit (MO, PROTECT)
VDD
OUT
VSS
GND
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TB62209FG
Pin Assignment (top view)
D MODE 1 1
36 CR
D MODE 2 2
35 CLK
D MODE 3 3
34 ENABLE
CW/CCW 4
33 OUT B
VDD 5
32 RESET
Vref 6
31 DATA MODE
NC 7
NC 8
RS B 9
7pin and 8pin are
connected by a lead
frame. However,
there is no connection
to the chip.
(FIN)
TB62209FG
RS A 10
NC 11
NC 12
VM 13
STANDBY
14
30 NC
29 OUT B
28 PGND
(FIN)
27 PGND
11pin and 12pin are
connected by a lead
frame. However,
there is no connection
to the chip.
26 OUT A
25 NC
24 MDT 2
23 MDT 1
Ccp A 15
22 OUT A
Ccp B 16
21 TORQUE2
Ccp C 17
20 TORQUE1
MO 18
19 PROTECT
Pin Assignment for PWM in Data Mode
D MODE 1 → GA+ (OUT A, A )
D MODE 2 → GA− (OUT A, A )
D MODE 3 → GB+ (OUT B, B )
CW/CCW → GB− (OUT B, B )
Note: Pin assignment above is different at data mode and PWM.
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TB62209FG
Pin Description 1
Pin Number
Pin Name
Function
Remarks
D MODE 3, 2, 1 =
1
D MODE 1
LLL: Same function as that of STANDBY pin
LLH: Motor Lock mode
LHL: 2-Phase Excitation mode
2
D MODE 2
Motor drive mode setting pin
LHH: 1-2 Phase Excitation (A) mode
HLL: 1-2 Phase Excitation (B) mode
HLH: W1-2 Phase Excitation mode
3
HHL: 2W1-2 Phase Excitation mode
D MODE 3
HHH: 4W1-2 Phase Excitation mode
CW: Forward rotation
4
CW/CCW
Sets motor rotation direction
5
VDD
Logic power supply connecting pin
Connect to logic power supply (5 V)
6
Vref
Reference power supply pin for setting output
current
Connect to supply voltage for setting current.
7
NC
Not connected
Not wired
8
NC
Not connected
Not wired
9
RS B
Unit-B power supply pin
Connect current sensing resistor between this
pin and VM
CCW: Reverse rotation
(connecting pin for power detection resistor)
Connect to power ground
FIN
FIN
FIN Logic ground pin
The pin functions as a heat sink. Design pattern
taking heat into consideration.
10
RS A
Unit-A power supply pin
(pin connecting power detection resistor)
Connect current sensing resistor between this
pin and VM
11
NC
Not connected
Not wired
12
NC
Not connected
Not wired
Pin Assignment for PWM in Data Mode
D MODE 1 → GA+ (OUT A, A )
D MODE 2 → GA− (OUT A, A )
D MODE 3 → GB+ (OUT B, B )
CW/CCW → GB− (OUT B, B )
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TB62209FG
Pin Description 2
Pin Number
Pin Name
Function
Remarks
13
VM
Motor power supply monitor pin
Connect to motor power supply
14
STANDBY
All-function-initializing and Low Power
Dissipation mode pin
15
Ccp A
Pin connecting capacitor for boosting output
stage drive power supply (storage side
connected to GND)
Connect capacitor for charge pump (storage
side) VM and VDD are generated.
16
Ccp B
Pin connecting capacitor for boosting output
stage drive power supply
Connect capacitor for charge pump (charging
side) between this pin and Ccp C
17
Ccp C
(charging side)
Connect capacitor for charge pump (charging
side) between this pin and Ccp B
H: Normal operation
L: Operation halted
Charge pump output halted
Outputs High level in 4W1-2, 2W1-2, W1-2, or
1-2 Phase Excitation mode with electrical angle
of 0° (phase B: 100%, phase A: 0%)
18
MO
Electrical angle (0°) monitor pin
19
PROTECT
TSD operation detector pin
Detects thermal shut down (TSD) and outputs
High level
20
TORQUE 1
Motor torque switch setting pin
21
TORQUE 2
Torque 2, 1 = HH: 100%
LH: 85%
HL: 70%
LL: 50%
22
OUT A
23
MDT 1
24
MDT 2
In 2-Phase Excitation mode, outputs High level
with electrical angle of 0° (phase B: 100%,
phase A: 100%)
―
Channel A output pin
Mixed Decay mode setting pins
10
MDT 2, 1 = HH: 100%
HL: 75%
LH: 37.5%
LL: 12.5%
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TB62209FG
Pin Description 3
Pin Number
Pin Name
Function
Remarks
25
NC
Not connected
Not wired
26
OUT A
Channel A output pin
27
PGND
Power ground pin
Connect all power ground pins and VSS to GND.
FIN
FIN
Logic ground pin
The pin functions as a heat sink. Design pattern
taking heat into consideration.
28
PGND
Power ground pin
Connect all power ground pins to GND.
29
OUT B
Channel B output pin
30
NC
Not connected
―
―
Not wired
H: Controls external PWM.
L: CLK-IN mode
31
DATA MODE
We recommend this pin normally be used as
CLK-IN mode pin (Low).
Clock input and PWM
In PWM mode, functions such as constant
current control do not operate. Fix DATA MODE
at the L level.
Forcibly initializes electrical angle.
32
RESET
At this time we recommend ENABLE pin be set
to Low to prevent miss operation.
Initializes electrical angle.
H: Resets electrical angle.
L: Normal operation
―
33
OUT B
Channel B output pin
34
ENABLE
Output enable pin
35
CLK
Inputs CLK for determining number of motor
rotations.
36
CR
Forcibly turns all output transistors off.
Electrical angle is incremented by one for each
CLK input.
CLK is reflected at rising edge.
Chopping reference frequency reference pin (for
Determines chopping frequency.
setting chopping frequency)
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TB62209FG
1. Function of CW/CCW
CW/CCW switches the direction of stepping motor rotation.
Input
Function
H
Forward (CW)
L
Reverse (CCW)
2. Function of MDT X
MDT X specifies the current attenuation speed at constant current control.
The larger the rate (%), the larger the attenuation of the current. Also, the peak current value (current
ripple) becomes larger. (Typical value is 37.5%.)
MDT 2
MDT 1
Function
L
L
12.5% Mixed Decay mode
L
H
37.5% Mixed Decay mode
H
L
75% Mixed Decay mode
H
H
100% Mixed Decay mode (Fast Decay mode)
3. Function of TORQUE X
TORQUE X changes the current peak value in four steps. Used to change the value of the current used,
for example, at startup and fixed-speed rotation.
TORQUE 2
TORQUE 1
Comparator Reference Voltage
H
H
100%
L
H
85%
H
L
70%
L
L
50%
4. Function of RESET (forced initialization of electrical angle)
With the CLK input method (decoder method), unless CLKs are counted, except MO, where the electrical
angle is at that time not known. Thus, this method is used to forcibly initialize the electrical angle.
For example, it is used to change the excitation mode to another drive mode during output from MO
(electrical angle = 0°).
Input
Function
H
Initializes electrical angle to 0°
L
Normal operation
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TB62209FG
5. Function of ENABLE (output operation)
ENABLE forcibly turns OFF all output transistors at operation.
Data such as electrical angle and operating mode are all retained.
Input
Function
H
Operation enabled (active)
L
Output halted (operation other than output active)
6. Function of STANDBY
STANDBY halts the charge pump circuit (power supply booster circuit) as well as halts output.
We recommend setting to Standby mode at power on.
(At this time, data on the electrical angle are retained.)
Input
Function
H
Operation enabled (active)
L
Output halted (Low Power Dissipation mode)Charge pump halted
7. Functions of D Mode X (Excitation Mode )
Excitation Mode
D Mode 3
D Mode 2
D Mode 1
Remarks
1
Low Power Dissipation mode
L
L
L
( Standby mode ) Charge pump halted
2
Motor Lock mode
L
L
H
Locks only at 0° electrical angle.
3
2-Phase Excitation mode
L
H
L
45° → 135° → 225° → 315° → 45°
4
1-2 Phase Excitation (A)
L
H
H
0%, 100% type 1-2 Phase Excitation
5
1-2 Phase Excitation (B)
H
L
L
0%, 71%, 100% type 1-2 Phase Excitation
6
W1-2 Phase Excitation
H
L
H
2-bit micro-step change
7
2W1-2 Phase Excitation
H
H
L
3-bit micro-step change
8
4W1-2 Phase Excitation
H
H
H
4-bit micro-step change
8. Function of DATA MODE
DATA MODE switches external duty control (forced PWM control) and constant current
CLK-IN control. In Phase mode, H-bridge can be forcibly inverted and output only can be
turned off. Constant current drive including micro-step drive can only be controlled in CLK-IN mode.
Note :
Input
Function
H
PHASE MODE
L
CLK-IN MODE
Normally, use CLK-IN mode.
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TB62209FG
9. Electrical Angle Setting immediately after Initialization
In Initialize mode (immediately after RESET is released), the following currents are set.
In Low Power Dissipation mode, the internal decoder continues incrementing the electrical angle but
current is not output.
Note that the initial electrical angle value in 2-Phase Excitation mode differs from that in nW1-2 (n = 0,
1, 2, 4) Phase Excitation mode.
Excitation Mode
IB (%)
IA (%)
1
Low Power Dissipation mode
100
0
Electrical angle incremented but no current output
2
Motor Lock mode
100
0
Electrical angle incremented but no motor rotation
due to no IA output
3
2-Phase Excitation
100
100
45°
4
1-2 Phase Excitation (A)
100
0
0°
5
1-2 Phase Excitation (B)
100
0
0°
6
W1-2 Phase Excitation
100
0
0°
7
2W1-2 Phase Excitation
100
0
0°
8
4W1-2 Phase Excitation
100
0
0°
Note :
Where, IB = 100% and IA = 0%, the electrical angle is 0°. Where, IB = 0% and IA = 100%,
the electrical
10.
Remarks
angle is +90°.
Function of DATA MODE (Phase A mode used for explanation)
DATA MODE inputs the external PWM signal (duty signal) and controls the current. Functions such as
constant current control and overcurrent protector do not operate.
Use this mode only when control cannot be performed in CLK-IN mode.
GA+
GA−
(1)
L
L
Output off
(2)
L
H
A+ phase: Low
A− phase: High
(3)
H
L
A+ phase: High
A− phase: Low
(4)
H
H
Output off
(1)･(4)
Output State
(2)
U1
U2
U1
OFF
OFF
OFF
L1
L2
L1
OFF
OFF
ON
(3)
(Note)
Load
PGND
PGND
U2
U1
ON
ON
L2
OFF
OFF
L1
U2
OFF
(Note)
Load
ON
L2
PGND
Note: Output is off at (1) and (4).
D MODE 1 → GA+ (OUT A, A )
D MODE 2 → GA− (OUT A, A )
D MODE 3 → GB+ (OUT B, B )
CW/CCW → GB− (OUT B, B )
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TB62209FG
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Logic supply voltage
VDD
7
V
Motor supply voltage
VM
40
V
IOUT
1.8
A/phase
Current detect pin voltage
VRS
VM ± 4.5 V
V
Charge pump pin maximum voltage
(CCP1 Pin)
VH
VM + 7.0
V
Logic input voltage
VIN
-0.4 to VDD+
0.4
V
Output current
Power dissipation
(Note 1)
(Note 2)
(Note 3)
(Note 4)
1.4
PD
W
3.2
Operating temperature
Topr
−40 to 85
°C
Storage temperature
Tstg
−55 to 150
°C
Junction temperature
Tj
150
°C
Note 1: Perform thermal calculations for the maximum current value under normal conditions. Use the IC at 1.5 A or
less per phase.
The current value may be controlled according to the ambient temperature or board conditions.
Note 2: Input 7 V or less as VIN.
Note 3: Measured for the IC only. (Ta = 25°C)
Note 4: Measured when mounted on the board. (Ta = 25°C)
Ta: IC ambient temperature
Topr: IC ambient temperature when starting operation
Tj: IC chip temperature during operation. Tj (max) is controlled by TSD (thermal shut down circuit).
Operating Conditions (Ta = 0 to 85°C, (Note 5))
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
Power supply voltage
VDD
―
4.5
5.0
5.5
V
Motor supply voltage
VM
VDD = 5.0 V, Ccp1 = 0.22 μF,
Ccp2 = 0.022 μF
13
24
34
V
Ta = 25°C, per phase
―
1.2
1.5
A
GND
―
VDD
V
Output current
IOUT (1)
―
Logic input voltage
VIN
Clock frequency
fCLK
VDD = 5.0 V
―
1.0
150
KHz
Chopping frequency
fchop
VDD = 5.0 V
50
100
150
KHz
Reference voltage
Vref
VM = 24 V, Torque = 100%
2.0
3.0
VDD
V
Current detect pin voltage
VRS
VDD = 5.0 V
0
±1.0
±4.5
V
Note 5: Because the maximum value of Tj is 120°C, please design the maximum current to the value from which Tj
becomes under 120°C.
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TB62209FG
Electrical Characteristics 1 (Ta = 25°C, VDD = 5 V, VM = 24 V, unless otherwise specified)
Characteristics
Symbol
Test
Circuit
Min
Typ.
Max
2.0
VDD
VDD
+ 0.4
GND
− 0.4
GND
0.8
Data input pins
200
400
700
Data input pins with resistor
35
50
75
―
―
1.0
―
―
1.0
VDD = 5 V (STROBE, RESET,
DATA = L), RESET = L, Logic,
output all off
1.0
2.0
3.0
IDD2
Output OPEN, fCLK = 1.0 kHz
LOGIC ACTIVE, VDD = 5 V,
Charge Pump = charged
1.0
2.5
3.5
IM1
Output OPEN (STROBE,
RESET, DATA = L), RESET =
L, Logic, output all off, Charge
Pump = no operation
1.0
2.0
3.0
IM2
Output OPEN, fCLK = 1 kHz
LOGIC ACTIVE, VDD = 5 V,
VM = 24 V, Output off,
Charge Pump = charged
2.0
4.0
5.0
Output OPEN, fCLK = 4 kHz
LOGIC ACTIVE, 100 kHz
chopping (emulation), Output
OPEN,
Charge Pump = charged
―
10
13
HIGH
VIN (H)
LOW
VIN (L)
―
Input voltage
Input hysteresis voltage
VIN (HIS)
―
IIN (H)
Input current
IIN (H)
―
IIN (L)
IDD1
―
Power dissipation (VDD Pin)
Power dissipation (VM Pin)
―
IM3
Test Condition
Data input pins
Data input pins without resistor
Unit
V
mV
μA
mA
mA
Output standby current
Upper
IOH
―
VRS = VM = 24 V, VOUT = 0 V,
STANDBY = H, RESET = L,
CLK = L
−200
−150
―
μA
Output bias current
Upper
IOB
―
VOUT = 0 V, STANDBY = H,
RESET= L, CLK = L
−100
−50
―
μA
Output leakage current
Lower
IOL
―
VRS = VM = CcpA = VOUT
= 24 V, LOGIC IN = ALL = L
―
―
1.0
μA
HIGH
(Reference)
VRS (H)
Vref = 3.0 V, Vref (Gain) = 1/5.0
TORQUE = (H) = 100% set
―
100
―
MID
HIGH
VRS (MH)
Vref = 3.0 V, Vref (Gain) = 1/5.0
TORQUE = (MH) = 85% set
83
85
87
MID
LOW
VRS (ML)
Vref = 3.0 V, Vref (Gain) = 1/5.0
TORQUE = (ML) = 70% set
68
70
72
LOW
VRS (L)
Vref = 3.0 V, Vref (Gain) = 1/5.0
TORQUE = (L) = 50% set
48
50
52
Comparator reference
voltage ratio
―
%
Output current differential
∆IOUT1
―
Differences between output
current channels
−5
―
5
%
Output current setting differential
∆IOUT2
―
IOUT = 1000 mA
−5
―
5
%
IRS
―
VRS = 24 V, VM = 24 V,
RESET= L (RESET state)
―
1
2
μA
RON (D-S) 1
IOUT = 1.0 A, VDD = 5.0 V
Tj = 25°C, Drain-Source
―
0.5
0.6
RON (D-S ) 1
IOUT = 1.0 A, VDD = 5.0 V
Tj = 25°C, Source-Drain
―
0.5
0.6
RON (D-S) 2
IOUT = 1.0 A, VDD = 5.0 V
Tj = 105°C, Drain-Source
―
0.6
0.75
RON (D-S ) 2
IOUT = 1.0 A, VDD = 5.0 V
Tj = 105°C, Source-Drain
―
0.6
0.75
RS pin current
Output transistor drain-source
ON-resistance
―
16
Ω
2014-10-01
TB62209FG
Electrical Characteristics 2 (Ta = 25°C, VDD = 5 V, VM = 24 V, IOUT = 1.0 A)
Characteristics
Chopper current
Symbol
Vector
Test
Circuit
―
Test Condition
Min
Typ.
Max
θA = 90 (θ16)
―
100
―
θA = 84 (θ15)
―
100
―
θA = 79 (θ14)
93
98
―
θA = 73 (θ13)
91
96
―
θA = 68 (θ12)
87
92
97
θA = 62 (θ11)
83
88
93
θA = 56 (θ10)
78
83
88
θA = 51 (θ9)
72
77
82
66
71
76
θA = 40 (θ7)
58
63
68
θA = 34 (θ6)
51
56
61
θA = 28 (θ5)
42
47
52
θA = 23 (θ4)
33
38
43
θA = 17 (θ3)
24
29
34
θA = 11 (θ2)
15
20
25
θA = 6 (θ1)
5
10
15
θA = 0 (θ0)
―
0
―
θA = 45 (θ8)
17
―
Unit
%
2014-10-01
TB62209FG
Electrical Characteristics 3 (Ta = 25°C, VDD = 5 V, VM = 24 V, unless otherwise specified)
Symbol
Test
Circuit
Test Condition
Min
Typ.
Max
Unit
Vref input voltage
Vref
9
VM = 24 V, VDD = 5 V,
STANDBY = H, RESET = L,
Output on, CLK = 1 kHz
2.0
―
VDD
V
Vref input current
Iref
9
STANDBY = H, RESET = L,
Output on, VM = 24 V,
VDD = 5 V, Vref = 3.0 V
20
35
50
μA
Vref (GAIN)
—
VM = 24 V, VDD = 5 V,
STANDBY = H, RESET= L,
Output on,
Vref = 2.0 to VDD − 1.0 V
1/4.8
1/5.0
1/5.2
―
TjTSD
—
VDD = 5 V, VM = 24 V
130
―
170
°C
∆TjTSD
—
TjTSD = 130 to 170°C
TjTSD
− 50
TjTSD
− 35
TjTSD
− 20
°C
VDD return voltage
VDDR
10
VM = 24 V, STANDBY = H
2.0
3.0
4.0
V
VM return voltage
VMR
11
VDD = 5 V, STANDBY = H
2.0
3.5
5.0
V
Over current protected circuit
operation current
(Note 2)
ISD
—
VDD = 5 V, VM = 24 V
―
3.0
―
A
Iprotect
12
VDD = 5 V,
TSD = operating condition
1.0
3.0
5.0
mA
IMO
12
VDD = 5 V,
electrical angle = 0°
(IB = 100%, IA = 0%)
1.0
3.0
5.0
mA
Vprotect (H)
12
VDD = 5 V,
TSD = operating condition
―
―
5.0
Vprotect (L)
—
VDD = 5 V,
TSD = not operating
condition
0.0
―
―
12
VDD = 5 V,
electrical angle = except 0°
(IB = 100%,
IA = Except 0% set)
―
―
5.0
—
VDD = 5 V,
electrical angle = 0°
(IB = 100%, IA = 0%)
0.0
Characteristics
Vref attenuation ratio
TSD temperature
(Note 1)
TSD return temperature difference
(Note 1)
High temperature monitor pin
output current
Electrical angle monitor pin output
current
High temperature monitor pin
output voltage
VMO2 (H)
Electrical angle monitor pin output
voltage
VMO2 (L)
V
V
―
―
Note 1: Thermal shut down circuit (TSD)
When the IC junction temperature reaches the specified value and the TSD circuit is activated, the internal
reset circuit is activated switching the outputs of both motors to off.
When the temperature is set between 130°C (min) to 170°C (max), the TSD circuit operates. When the TSD
is activated, the output of motors is stopped until the stand-by function is reset.
When the TSD circuit is activated, the charge pump is halted, and PROTECT pin outputs VDD voltage.
Even if the TSD circuit is activated and Standby goes H → L → H instantaneously, the IC is not reset until
the IC junction temperature drops −20°C (typ.) below the TSD operating temperature (hysteresis function).
Note 2: Overcurrent protection circuit (ISD)
When current exceeding the specified value flows to the output, the internal reset circuit is activated, and the
ISD turns off the output.
Until the Standby signal goes Low to High, the overcurrent protection circuit remains activated.
During ISD, IC turns Standby mode and the charge pump halts.
18
2014-10-01
TB62209FG
AC Characteristics (Ta = 25°C, VM = 24 V, VDD = 5 V, 6.8 mH/5.7Ω)
Symbol
Test
Circuit
Test Condition
Min
Typ.
Max
Unit
fCLK
—
―
―
―
120
kHz
tw (tCLK)
—
―
100
―
―
twp
—
―
50
―
―
twn
—
―
50
―
―
tr
—
―
100
―
tf
—
―
100
―
tpLH
—
CLK to OUT
―
1000
―
tpHL
—
Output Load: 6.8 mH/5.7 Ω
―
2000
―
tpLH
—
CR to OUT
―
500
―
tpHL
—
Output Load: 6.8 mH/5.7 Ω
―
1000
―
tr
—
―
―
20
―
tf
—
―
―
20
―
tpLH
—
―
―
20
―
tpHL
—
―
―
20
―
Noise rejection dead band time
tBRANK
—
IOUT = 1.0 A
200
300
400
ns
CR reference signal oscillation
frequency
fCR
—
Cosc = 560 pF, Rosc = 3.6 kΩ
―
800
―
kHz
—
VM = 24 V, VDD = 5 V,
Output ACTIVE (IOUT = 1.0 A)
Step fixed, Ccp1 = 0.22 μF,
Ccp2 = 0.022 μF
40
100
150
kHz
Characteristics
Clock frequency
Minimum clock pulse width
Output transistor switching
characteristic
Transistor switching characteristics
(MO, PROTECT)
Chopping frequency range
fchop (min)
fchop (max)
Output Load: 6.8 mH/5.7 Ω
―
ns
ns
ns
Chopping frequency
fchop
—
Output ACTIVE (IOUT = 1.0 A),
CR CLK = 800 kHz
―
100
―
kHz
Charge pump rise time
tONG
—
Ccp = 0.22 μF, Ccp = 0.022 μF
VM = 24 V, VDD = 5 V,
STANDBY = ON L→ H
―
100
200
μs
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2014-10-01
TB62209FG
11. Current Waveform and Setting of Mixed Decay Mode
At constant current control, in current amplitude (pulsating current) Decay mode, a point from 0 to 3 can
be set using 2-bit parallel data.
NF is the point where the output current reaches the set current value. RNF is the timing for monitoring
the set current.
The smaller the MDT value, the smaller the current ripple (peak current value). Note that current decay
capability deteriorates.
fchop
CR pin
internal
CLK
waveform
Set current value
DECAY MODE 0
NF
12.5%
MIXED
DECAY
MODE
MDT
Charge mode → NF: set current value reached → Slow
mode → Mixed decay timing → Fast mode → current
monitored (when set current value > output current) Charge
DECAY MODE 1
RNF
Set current value
NF
37.5%
MIXED
DECAY
MODE
MDT
Charge mode → NF: set current value reached → Slow
mode → Mixed decay timing → Fast mode → current
monitored (when set current value > output current) Charge
DECAY MODE 2
75%
MIXED
DECAY
MODE
RNF
Set current value
NF
MDT
Charge mode → NF: set current value reached → Slow mode
→ Mixed decay timing → Fast mode → current monitored
(when set current value > output current) Charge mode
RNF
DECAY MODE 3
Set current value
FAST
DECAY
MODE
Fast mode → RNF: current monitored (when set current value
> output current) Charge mode → Fast mode
100%
75%
50%
20
RNF
25%
0
2014-10-01
TB62209FG
12. CURRENT MODES
(MIXED (SLOW + FAST) DECAY MODE Effect)
○ Current value in increasing (Sine wave)
Slow
Slow
Set current
value
Fast
Slow
Set current
value
Charge
Slow
Fast
Charge
Charge
Fast
Charge
Fast
○ Sine wave in decreasing (When using MIXED DECAY Mode with large attenuation ratio (MDT%) at
attenuation)
Set current
value
Slow
Slow
Because current attenuates so quickly, the current
immediately follows the set current value.
Charge
Charge
Fast
Fast
Set current
value
Slow
Slow
Fast
Charge
Fast
○ Sine wave in decreasing (When using MIXED DECAY Mode with small attenuation ratio (MDT%) at
attenuation)
Slow
Set current
value
Charge
Because current attenuates slowly, it takes a long time
for the current to follow the set current value (or the
current does not follow).
Slow
Fast Charge
Fast
Slow
Fast
Slow
Set current
value
Fast
If RNF, current watching point, was the set current value (output current) in the mixed decay mode and
in the fast decay mode, there is no charge mode but the slow + fast mode (slow to fast is at MDT) in the
next chopping cycle.
Note: The above charts are schematics. The actual current transient responses are curves.
21
2014-10-01
TB62209FG
13. MIXED DECAY MODE waveform (Current Waveform)
fchop
fchop
Internal
CR CLK
signal
IOUT
Set current value
Set current
value
NF
NF
25%
MIXED
DECAY
MODE
RNF
MDT (MIXED DECAY TIMING) point
•
When NF is after MIXED DECAY TIMING
Fast Decay mode after Charge mode
fchop
fchop
IOUT
Set current value
NF
MDT (MIXED DECAY TIMING) point
Set current
value
NF
25%
MIXED
DECAY
MODE
NF
RNF
CLK signal input
•
In MIXED DECAY MODE, when the output current > the set current value
fchop
Set current
value
fchop
Because of the set current value > the
output current, no CHARGE MODE in the
next cycle.
NF
IOUT
fchop
RNF
NF
Set current value
25%
MIXED
DECAY
MODE
RNF
MDT (MIXED DECAY TIMING) point
CLK signal input
22
2014-10-01
TB62209FG
14. FAST DECAY MODE waveform
fchop
Set current
value
IOUT
Because of the set current value > the
output current, FAST DECAY MODE in the
next cycle. (Charge cancel function)
FAST
DECAY
MODE
(100%
MIXED
DECAY
MODE)
RNF
Set current value
NF
RNF
Because of the set current value > the
output current, CHARGE MODE → NF →
FAST DECAY MODE in the next cycle.
RNF
CLK signal input
The output current to the motor is in supply voltage mode after the current value set by Vref, RRS, or
Torque reached at the set current value.
23
2014-10-01
TB62209FG
15. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in SLOW DECAY MODE)
When CLK signal is input, the chopping counter (CR-CLK counter) is forced to reset at the next CR-CLK
fchop
fchop
fchop
Internal
CR CLK
signal
Set current value
IIOUT
NF
MDT
NF
Set current value
MDT
IOUT
RNF
RNF
Momentarily enters CHARGE MODE
CLK signal input
Reset CR-CLK counter here
timing.
Because of this, compared with a method in which the counter is not reset, response to the input data is
faster.
The delay time, the theoretical value in the logic portion, is expected to be a one-cycle CR waveform: 5 μs
at 100 kHz CHOPPING.
When the CR counter is reset due to CLK signal input, CHARGE MODE is entered momentarily due to
current comparison.
Note: In FAST DECAY MODE, too, CHARGE MODE is entered momentarily due to current comparison.
24
2014-10-01
TB62209FG
16. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in CHARGE MODE)
12.5% MIXED DECAY MODE
fchop
fchop
fchop
Internal
CR CLK
signal
Set current
value
MDT
NF
Set current value
MDT
IOUT
RNF
RNF
CLK signal input
Momentarily enters CHARGE MODE
Reset CR-CLK counter here
25
2014-10-01
TB62209FG
17. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in FAST DECAY MODE)
12.5% MIXED DECAY MODE
fchop
fchop
fchop
Internal
CR CLK
signal
Set current
value
IOUT
NF
MDT
Set current value
MDT
NF
MDT
RNF
RNF
Momentarily enters CHARGE MODE
CLK signal input
Reset CR-CLK counter here
26
2014-10-01
TB62209FG
18. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in 2 EXCITATION MODE)
12.5% MIXED DECAY MODE
fchop
fchop
fchop
Set current
value
IOUT
0
RNF
RNF
Set current value
NF
MDT
NF
CLK signal input
Reset CR-CLK counter here
27
2014-10-01
TB62209FG
Current Discharge Path when ENABLE=L Input During Operation
In Slow Mode, when all output transistors are forced to switch off, coil energy is discharged in the
following MODES:
Note: Parasitic diodes are located on dotted lines. In normal MIXED DECAY MODE, the current does not flow
to the parasitic diodes.
VM
VM
RRS
RRS
RS pin
U1
ON
VM
(Note)
RS pin
U2
U1
OFF
OFF
Load
OFF
ON
ON
L1
L2
L1
PGND
Charge mode
RRS
(Note)
RS pin
U2
U1
OFF
OFF
Input ENABLE=L
Load
L2
ON
PGND
Slow mode
L1
U2
OFF
(Note)
Load
L2
OFF
OFF
PGND
Forced OFF mode
As shown in the figure at above, an output transistor has parasitic diodes.
To discharge energy from the coil, each transistor is switched on allowing current to flow in the reverse
direction to that of normal operation. As a result, the parasitic diodes are not used. If all the output
transistors are forced to switch off, the energy of the coil is discharged via the parasitic diodes.
28
2014-10-01
TB62209FG
Output Transistor Operating Mode
VM
VM
RRS
RRS
RS pin
RRS
RS pin
U1
U2
U1
OFF
OFF
L1
L2
L1
OFF
ON
ON
ON
VM
(Note)
RS pin
(Note)
Load
Load
U2
U1
OFF
OFF
L2
ON
PGND
L1
ON
(Note)
Load
L2
ON
PGND
Charge mode
U2
OFF
PGND
Slow mode
Fast mode
Output Transistor Operation Functions
CLK
U1
U2
L1
L2
CHARGE
ON
OFF
OFF
ON
SLOW
OFF
OFF
ON
ON
FAST
OFF
ON
ON
OFF
Note: The above table is an example where current flows in the direction of the arrows in the above figures.
When the current flows in the opposite direction of the arrows, see the table below.
CLK
U1
U2
L1
L2
CHARGE
OFF
ON
ON
OFF
SLOW
OFF
OFF
ON
ON
FAST
ON
OFF
OFF
ON
29
2014-10-01
TB62209FG
Power Supply Sequence (Recommended)
VDD (max)
VDD (min)
VDD
VDDR
GND
VM
VM
VM (min)
VMR
GND
NON-RESET
Internal reset
RESET
STANDBY
INPUT (Note 1)
H
STANDBY
L
Takes up to tONG until operable.
Non-operable area
Note 1: If the VDD drops to the level of the VDDR or below while the specified voltage is input to the VM pin, the IC is
internally reset.
This is a protective measure against malfunction. Likewise, if the VM drops to the level of the VMR or below
while regulation voltage is input to the VDD, the IC is internally reset as a protective measure against
malfunction.
To avoid malfunction, when turning on VM or VDD, to input the Standby signal at the above timing is
recommended.
It takes time for the output control charge pump circuit to stabilize. Wait up to tONG time after power on
before driving the motors.
Note 2: When the VM value is between 3.3 to 5.5 V, the internal reset is released, thus output may be on. In such a
case, the charge pump cannot drive stably because of insufficient voltage. The Standby state should be
maintained until VM reaches 13 V or more.
Note 3: Since VDD = 0 V and VM = voltage within the rating are applied, output is turned off by internal reset.
At that time, a current of several mA flows due to the Pass between VM and VDD.
When voltage increases on VDD output, make sure that specified voltage is input.
30
2014-10-01
TB62209FG
How to Calculate Set Current
This IC controls constant current in CLK-IN mode.
At that time, the maximum current value (set current value) can be determined by setting the sensing
resistor (RRS) and reference voltage (Vref).
1/5.0 is Vref (gain): Vref attenuation ratio. (For the specifications, see the electrical characteristics.)
For example, when inputting Vref = 3 V and torque = 100% to output IOUT = 0.8 A, RRS = 0.75 Ω (0.5 W
or more) is required.
How to Calculate the Chopping and OSC Frequencies
At constant current control, this IC chops frequency using the oscillation waveform (saw tooth waveform)
determined by external capacitor and resistor as a reference.
The TB62209FG requires an oscillation frequency of eight times the chopping frequency.
The oscillation frequency is calculated as follows:
fCR =
1
0.523 × (C × R + 600 × C)
For example, when Cosc = 560 pF and Rosc = 3.6 kΩ are connected, fCR = 813 kHz.
At this time, the chopping frequency fchop is calculated as follows:
fchop = fCR/8 = 101 kHz
When determining the chopping frequency, make the setting taking the above into consideration.
IC Power Dissipation
IC power dissipation is classified into two: power consumed by transistors in the output block and power
consumed by the logic block and the charge pump circuit.
• Power consumed by the Power Transistor (calculated with RON = 0.60 Ω)
In Charge mode, Fast Decay mode, or Slow Decay mode, power is consumed by the upper and lower
transistors of the H bridges.
The following expression expresses the power consumed by the transistors of an H bridge.
P (out) = 2 (Tr) × IOUT (A) × VDS (V) = 2 × IOUT2 × RON .............................. (1)
The average power dissipation for output under 4-bit micro step operation (phase difference between
phases A and B is 90°) is determined by expression (1).
Thus, power dissipation for output per unit is determined as follows (2) under the conditions below.
RON = 0.60 Ω (@ 1.0 A)
IOUT (Peak: max) = 1.0 A
VM = 24 V
VDD = 5 V
P (out) = 2 (Tr) × 1.02 (A) × 0.60 (Ω) = 1.20 (W) .............................................. (2)
Power consumed by the logic block and IM
The following standard values are used as power dissipation of the logic block and IM at operation.
I (LOGIC) = 2.5 mA (typ.):
I (IM3) = 10.0 mA (typ.): operation/unit
I (IM1) = 2.0 mA (typ.): stop/unit
The logic block is connected to VDD (5 V). IM (total of current consumed by the circuits connected to
VM and current consumed by output switching) is connected to VM (24 V). Power dissipation is
calculated as follows:
P (Logic&IM) = 5 (V) × 0.0025 (A) + 24 (V) × 0.010 (A) = 0.25 (W) ................ (3)
Thus, the total power dissipation (P) is
P = P (out) + P (Logic&IM) = 1.45 (W)
Power dissipation at standby is determined as follows:
P (standby) + P (out) = 24 (V) × 0.002 (A) + 5 (V) × 0.0025 (A) = 0.06 (W)
For thermal design on the board, evaluate by mounting the IC.
31
2014-10-01
TB62209FG
Test Waveforms
CK
tCK
tCK
tpLH
VM
90%
90%
tpHL
50%
50%
10%
GND
10%
tr
Figure 1
tf
Timing Waveforms and Names
32
2014-10-01
TB62209FG
OSC-Charge Delay
OSC-Fast Delay
H
OSC (CR)
L
tchop
OUTPUT
Voltage A
OUTPUT
Voltage A
H
50%
L
H
50%
50%
L
Set current
OUTPUT
Current
L
Charge
Slow
Fast
OSC-charge delay:
Because the rising edge level of the OSC waveform is used for converting the OSC waveform to the
internal CR CLK, a delay of up to 1.25 ns (@fchop = 100 kHz: fCR = 400 kHz) occurs between the OSC
waveform and the internal CR CLK.
CR-CR CLK delay
CR Waveform
Internal CR CLK
Waveform
Figure 2
Timing Waveforms and Names (CR and output)
33
2014-10-01
TB62209FG
Relationship between Drive Mode Input Timing and MO
CLK Waveform
MO Waveform
•
If drive mode input changes before MO timing
Drive Mode Input
Waveform (1)
The setting of the motor drive mode changes.
Drive Mode Input
Internal Reflection (1)
The motor drive mode changes.
Parallel set signal is reflected.
•
If drive mode input changes after MO timing
Drive Mode Input
Waveform (2)
The setting of the motor drive mode changes.
In this case, the drive mode is changed when the electrical
angle becomes 0°.
Drive Mode Input
Internal Reflection (2)
Parallel set signal occurs after the rising edge of CLK, therefore, it is not reflected. The drive mode is
changed when the electrical angle becomes 0°.
Note: The TB62209FG uses the drive mode change reserve method to prevent the motor from step out
when changing drive modes.
Note that the following rules apply when switching drive modes at or near the MO signal output
timing.
34
2014-10-01
TB62209FG
Reflecting Points of Signals
Point where Drive Mode
Setting Reflected
(area of 1 in figure)
2-Phase Excitation mode
CW/CCW
At rising edge of CLK input
45° (MO)
Before half-clock of phase
B = phase A = 100%
At rising edge of CLK input
1-2 Phase Excitation mode
0° (MO)
Before half-clock of phase
W1-2 Phase Excitation
B = 100%
mode
2W1-2 Phase Excitation
mode
4W1-2 Phase Excitation
mode
Other parallel set signals can be changed at any time (they are reflected immediately).
Recommended Point for Switching Drive Mode
CLK Waveform
MO Waveform
1
2
In the area 2, the drive of the motor doesn't change
even if the input signal of driving mode data switch
t
When Drive Mode
3
Driving mode input in the area
of 1 in figure is reflected.
Data Switching
can be Input
During MO output (phase data halted: the area of 3 above) to forcibly switch drive modes, a function to
set RESET = High and to initialize the electrical angle is required.
35
2014-10-01
TB62209FG
PD – Ta (Package power dissipation)
PD – Ta
3.5
(2)
2.5
Power dissipation
PD
(W)
3
2
1.5
1
(1)
0.5
0
0
25
50
75
100
125
150
Ambient temperature Ta (°C)
(1)
(2)
HSOP36 Rth (j-a) (96°C/W)
When mounted on the board (140 mm × 70 mm × 1.6 mm: 38°C/W: typ.)
Note: Rth (j-a): 8.5°C/W
36
2014-10-01
TB62209FG
Relationship between VM and VH (charge pump voltage)
VM – VH (&Vcharge UP)
VH voltage
charge up voltage
VM voltage
Maximum rating
VH voltage, charge up voltage (V)
Charge pump
voltage
Input STANDBY
VM voltage
VMR
20
Maximum rating
10
Operation area
Usable area
0
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
Supply voltage VM (V)
Charge pump voltage VH = VDD + VM (= Ccp A) (V)
Note: VDD = 5 V
Ccp 1 = 0.22 µF, Ccp 2 = 0.022 µF, fchop = 150 kHz
(Be aware the temperature changes of capacitance of charge pump capacitor.)
37
2014-10-01
TB62209FG
Operation of Charge Pump Circuit
RRS
RS
VDD = 5 V
VM
VH
Ccp A
i2
Output
Tr2
Comparator
&
Controller Output
H switch
VM = 24 V
Vz
Di3
Di2
Di1
(1)
i1
(2)
(2)
R1
Ccp B
Ccp 2
0.022 µF
Ccp 1
0.22 µF
Ccp C
Tr1
VH = VM + VDD = charge pump voltage
i1 = charge pump current
i2 = gate block power dissipation
•
Initial charging
(1)
•
When RESET is released, Tr1 is turned ON and Tr2 turned OFF. Ccp 2 is charged from VM via
Di1.
(2) Tr1 is turned OFF, Tr2 is turned ON, and Ccp 1 is charged from Ccp 2 via Di2.
(3) When the voltage difference between VM and VH (Ccp A pin voltage = charge pump voltage)
reaches VDD or higher, operation halts (Steady state).
Actual operation
(4)
(5)
Ccp 1 charge (i2) is used at fchop switching and the VH potential drops.
Charges up by (1) and (2) above.
Output switching
Initial charging
Steady state
VH
VM
(1)
(2)
(3)
(4)
(5)
(4)
(5)
t
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Charge Pump Rise Time
Ccp 1 voltage
VDD + VM
VM + (VDD × 90%)
VM
5V
STANDBY
0V
50%
tONG
tONG:
Time taken for capacitor Ccp 2 (charging capacitor) to fill up Ccp 1 (storing capacitor) to VM + VDD after
a reset is released.
The internal IC cannot drive the gates correctly until the voltage of Ccp 1 reaches VM + VDD. Be sure to
wait for tONG or longer before driving the motors.
Basically, the larger the Ccp 1 capacitance, the smaller the voltage fluctuation, though the initial charge
up time is longer.
The smaller the Ccp 1 capacitance, the shorter the initial charge-up time but the voltage fluctuation is
larger.
Depending on the combination of capacitors (especially with small capacitance), voltage may not be
sufficiently boosted.
When the voltage does not increase sufficiently, output DMOS RON turns lower than the normal, and it
raises the temperature.
Thus, use the capacitors under the capacitor combination conditions (Ccp 1 = 0.22 µF, Ccp 2 = 0.022 µF)
recommended by Toshiba.
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External Capacitor for Charge Pump
When driving the stepping motor with VDD = 5 V, fchop = 150 kHz, L = 10 mH under the conditions of VM
= 13 V and 1.5 A, the logical values for Ccp 1 and Ccp 2 are as shown in the graph below:
Ccp 1 – Ccp 2
0.05
Applicable range
0.045
0.04
0.035
0.03
0.025
0.02
Recommended
value
0.015
0.01
0.005
0
0
0.05
0.1 0.15 0.2 0.25
0.3 0.35 0.4
Ccp 1 capacitance
0.45
0.5
(μF)
Choose Ccp 1 and Ccp 2 to be combined from the above applicable range. We recommend Ccp 1:Ccp 2 at
10:1 or more. (If our recommended values (Ccp1 = 0.22 µF, Ccp 2 = 0.022 µF) are used, the drive conditions
in the specification sheet are satisfied. (There is no capacitor temperature characteristic as a condition.)
When setting the constants, make sure that the charge pump voltage is not below the specified value and
set the constants with a margin (the larger Ccp 1 and Ccp 2, the more the margin).
Some capacitors exhibit a large change in capacitance according to the temperature. Make sure the above
capacitance is obtained under the usage environment temperature.
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(1)
(2)
(3)
Low Power Dissipation mode
Low Power Dissipation mode turns off phases A and B, and also halts the charge pump.
Operation is the same as that when the STANDBY pin is set to Low.
Motor Lock mode
Motor Lock mode turns phase B output only off with phase A off.
From reset, with IA = 0 and IB = 100%, the normal 4W1-2 phase operating current is output.
Use this mode when you want to hold (lock) the rotor at any desired value.
2-Phase Excitation mode
100
[%]
Phase B
0
Phase A
−100
STEP
2-Phase Excitation Mode
(typ. A)
0
100
Electrical angle 360° = 4 CLKs
Note: 2-phase excitation has a large load change due to motor induced electromotive force. If a mode in
which the current attenuation capability (current control capability) is small is used, current increase
due to induced electromotive force may not be suppressed. In such a case, use a mode in which
the mixed decay ratio is large.
We recommend 37.5% Mixed Decay mode as the initial value (general condition).
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(4)
1-2 Phase Excitation mode (a)
MO
CLK
100
[%]
Phase B
Phase A
0
−100
STEP
1-2 Phase Excitation Mode (typ. A)
100
0
100
Electrical angle 360° = 8 CLK
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(5)
1-2 Phase Excitation mode (b)
MO
CLK
100
[%]
71
Phase A
Phase B
0
−71
−100
STEP
1-2 Phase Excitation Mode (typ. B)
100
71
0
71
100
Electrical angle 360° = 8 CLK
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(6)
W1-2 Phase Excitation mode
[%]
100
92
71
38
Phase A
Phase B
0
−38
−71
−92
−100
STEP
W1-2 Phase Excitation Mode
(2-bit micro step)
100
92
71
38
0
38
92 100
71
Electrical angle 360° = 16 CLK
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(7)
2W1-2 Phase Excitation mode
[%]
100
96
88
71
Phase A
56
38
20
0
−20
Phase B
−38
−56
−71
−83
−92
−98
−100
STEP
2W 1-2 Phase Excitation Mode
(3-bit micro step)
100
98
92
83
71
56
38
20
0
20
38
56
71
83 92 98 100
Electrical angle 360° = 32 CLK
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(8)
4W1-2 Phase Excitation mode
[%]
100
96
92
88
83
77
71
63
56
47
38
29
20
10
Phase A
Phase B
0
−10
−20
−29
−38
−47
−56
−63
−71
−77
−83
−88
−92
−96
−100
STE
Electrical angle 360° = 64 CLK
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4-Bit Micro Step Output Current Vector Locus (Normalizing each step to 90°)
100
X = 16
X = 15
X = 14
98
96
X = 13
X = 12
92
CW
X = 11
88
X = 10
83
X=9
77
71
X=8
CCW
X=7
63
X=6
56
X=5
47
X=4
38
29
X=3
20
X=2
θX
10
X=1
θX
X=0
0
10
20
29
38
47
IB
56
63
71
77
83
88
92 96 98 100
(%)
For input data, see the current function examples.
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Application Circuit (example)
The values for the devices are all recommended values. For values under each input condition, see the
above-mentioned recommended operating conditions.
Rosc = 3.6 kΩ
Vref AB
CR
Vref AB
Cosc = 560 pF
3V
1 μF
SGND
VM
VDD
RRS A
5V
0V
DATA MODE
5V
0V
CLK
A
ENABLE
B
5V
0V
5V
0V
5V
0V
RRS A 0.66 Ω
A
M
B
CW/CCW
RRS B
Stepping
Motor
RRS B
RESET
0.66 Ω
P-GND
VSS
(FIN)
PGND
5V
SGND
5V
0V
DMODE 1
5V
0V
5V
0V
DMODE 2
5V
0V
5V
0V
MDT 1
5V
0V
STANDBY
SGND
PROTECT
OPEN
MO
OPEN
DMODE 3
TORQUE 1
5V
0V
TORQUE 2
5V
0V
MDT 2
DATA MODE 5 V
0V
10 μF
Ccp A Ccp B
Ccp C
Ccp 1
Ccp 2
0.22 μF 0.022 μF
SGND
24 V
100 μF
SGND
Note: Adding bypass capacitors is recommended.
Make sure that GND wiring has only one contact point, and to design the pattern that allows the heat
radiation.
To control setting pins in each mode by SW, make sure to pull down or pull up them to avoid high
impedance.
To input the data, see the section on the recommended input data. Please use DATA MODE fixed at the
L level.
Careful attention should be paid to the layout of the output, VDD(VM) and GND traces, to avoid short
circuits across output pins or to the power supply or ground. If such a short circuit occurs, the device may
be permanently damaged.
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Package Dimensions
Weight: 0.79 g (typ.)
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified
for explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for
explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Examples
The application examples provided in this data sheet are provided for reference only. Thorough evaluation
and testing should be implemented when designing your application's mass production design.
In providing these application examples, Toshiba does not grant the use of any industrial property rights.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These
components and circuits are not guaranteed to prevent malfunction or failure from occurring in the
application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be
exceeded, even for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause breakdown, damage or deterioration of the device, which may
result in injury by explosion or combustion.
[2]
Do not insert devices incorrectly or in the wrong orientation.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause breakdown, damage or deterioration of the device, which may
result in injury by explosion or combustion.
In addition, do not use any device that has had current applied to it while inserted incorrectly or in
the wrong orientation even once.
[3]
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in
the event of over current and/or IC failure. The IC will fully break down when used under
conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when
an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow.
Such a breakdown can lead to smoke or ignition. To minimize the effects of a large current flow in
the event of breakdown, fuse capacity, fusing time, insertion circuit location, and other such suitable
settings are required.
[4] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into
the design to prevent device malfunction or breakdown caused by the current resulting from the
inrush current at power ON or the negative current resulting from the back electromotive force at
power OFF. IC breakdown may cause injury, smoke or ignition.
For ICs with built-in protection functions, use a stable power supply with. An unstable power supply may
cause the protection function to not operate, causing IC breakdown. IC breakdown may cause injury, smoke or
ignition.
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[5] Carefully select power amp, regulator, or other external components (such as inputs and negative feedback
capacitors) and load components (such as speakers).
If there is a large amount of leakage current such as input or negative feedback capacitors, the IC
output DC voltage will increase. If this output voltage is connected to a speaker with low input
withstand voltage, overcurrent or IC failure can cause smoke or ignition. (The over current can
cause smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge
Tied Load (BTL) connection type IC that inputs output DC voltage to a speaker directly.
Points to remember on handling of ICs
(1) Over current Protection Circuit
Over current protection circuits (referred to as current limiter circuits) do not necessarily protect
ICs under all circumstances. If the Over current protection circuits operate against the over current,
clear the over current status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings
can cause the over current protection circuit to not operate properly or IC breakdown before
operation. In addition, depending on the method of use and usage conditions, if over current
continues to flow for a long time after operation, the IC may generate heat resulting in breakdown.
(2) Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal
shutdown circuits operate against the over temperature, clear the heat generation status
immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings
can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation.
(3) Heat Dissipation Design
In using an IC with large current flow such as a power amp, regulator or driver, please design the device so
that heat is appropriately dissipated, not to exceed the specified junction temperature (Tj) at any time or under
any condition. These ICs generate heat even during normal use. An inadequate IC heat dissipation design can
lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the
device taking into consideration the effect of IC heat dissipation on peripheral components.
(4) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s
power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the
device’s motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid
this problem, take the effect of back-EMF into consideration in your system design.
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with
TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
APPLICATIONS.
• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH
MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
("UNINTENDED USE"). Except for specific applications as expressly stated in this document, Unintended Use includes, without
limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for
automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions,
safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. IF YOU USE
PRODUCT FOR UNINTENDED USE, TOSHIBA ASSUMES NO LIABILITY FOR PRODUCT. For details, please contact your
TOSHIBA sales representative.
• Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
• Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any
applicable laws or regulations.
• The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any
infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to
any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.
• ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE
FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY
WHATSOEVER, INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR
LOSS, INCLUDING WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND
LOSS OF DATA, AND (2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO
SALE, USE OF PRODUCT, OR INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
• Do not use or otherwise make available Product or related software or technology for any military purposes, including without
limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile
technology products (mass destruction weapons). Product and related software and technology may be controlled under the
applicable export laws and regulations including, without limitation, the Japanese Foreign Exchange and Foreign Trade Law and the
U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited
except in compliance with all applicable export laws and regulations.
• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.
Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES
OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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