TB62747AFG/AFNG
TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic
TB62747AFG, TB62747AFNG
16-Output Constant Current LED Driver
The TB62747 series is comprised of constant-current drivers
designed for LEDs and LED panel displays.
The regulated current sources are designed to provide a
constant current, which is adjustable through one external
resistor.
The TB62747 series incorporates 16 channels of shift
registers, latches, AND gates and constant-current outputs.
Fabricated using the Bi-CMOS process, the TB62747 series
satisfies the system requirement of high-speed data
transmission.
It operates with a 3.3 or 5.0 V power supply.
TB62747AFG
SSOP24-P-300-1.00B
TB62747AFNG
SSOP24-P-300-0.65A
Weight
SSOP24-P-300-1.00B: 0.29 g (typ.)
SSOP24-P-300-0.65A: 0.14 g (typ.)
Features
•
16-output built-in
•
Output current setting range
: 1.5 to 35 mA @ VDD = 3.3 V, VO = 0.4 to 1.0 V
•
Current accuracy (@ REXT = 1.2 kΩ, VO = 0.4 V, VDD = 3.3 V, 5.0 V)
: Between outputs: ± 1.5 % (max)
: Between devices: ± 1.5 % (max)
high-speed output switching : twOE(L) = 100 ns (min)
•
: 1.5 to 45 mA @ VDD = 5.0 V, VO = 0.4 to 1.2 V
•
Control data format
: serial-in, parallel-out
•
Input signal voltage level : 3.3 V and 5.0 V CMOS interfaces
(Schmitt trigger input)
•
Serial data transfer rate
•
Power supply voltages
•
: fSCK = 25 MHz (max) @cascade connection
: VDD = 3.0 V to 5.5 V
Operation temperature range: Topr = -40 to 85 °C
•
Output voltage
•
Power on reset (POR)
•
Package
: VO = 26 V (max)
: AFG type
: AFNG type
: SSOP24-P-300-1.00B
: SSOP24-P-300-0.65A
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TB62747AFG/AFNG
Pin Assignment (top view)
TB62747AFG/AFNG
GND
VDD
SIN
REXT
SCK
SOUT
SLAT
OE
OUT0
OUT15
OUT1
OUT14
OUT2
OUT13
OUT3
OUT12
OUT4
OUT11
OUT5
OUT10
OUT6
OUT9
OUT7
OUT8
Note1: Short circuiting an output pin to a power supply pin (VDD or VLED*), or short-circuiting the REXT pin
to the GND pin will likely exceed the rating, which in turn may result in smoldering and/or permanent
damage. Please keep this in mind when determining the wiring layout for the power supply and GND
pins.
*: VLED: LED power supply
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TB62747AFG/AFNG
Block Diagram
OUT0
OUT1
OUT15
VDD
OUT0
OUT1
OUT15
reference
voltage
Constant current outputs
POR
GND
REXT
OE
SLAT
SIN
G
D0
Q0 Q1
Q15
16-bit D-latch
D0 D1
D15
R
Q0 Q1
Q15
16-bit shift register
Q15
R
SOUT
SCK
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Truth Table
SLAT
OE
SIN
OUT0 --- OUT7 --- OUT15 (Note1)
SOUT
H
L
Dn
Dn --- Dn - 7 --- Dn - 15
Dn - 15
L
L
Dn + 1
No Change
Dn - 14
H
L
Dn + 2
Dn + 2 --- Dn - 5 --- Dn - 13
Dn - 13
― (Note2)
L
Dn + 3
Dn + 2 --- Dn - 5 --- Dn - 13
Dn - 13
― (Note2)
H
Dn + 3
OFF
Dn - 13
SCK
Note1: When OUT0 to OUT15 output pins are set to "H" the respective output will be ON and when set
to "L" the respective output will be OFF.
Note2: “―“is irrelevant to the truth table.
Timing Diagram
n=0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
H
SCK
L
H
SIN
L
H
SLAT
L
H
OE
L
ON
OUT0
OFF
ON
OUT1
OFF
ON
OUT2
OFF
ON
OUT15
OFF
H
SOUT
L
Note 1:
Note 2:
The latch circuit is a leveled-latch circuit. Please note that it is not a triggered-latch circuit.
Keep the SLAT pin is set to “L” to enable the latch circuit to hold data. In addition, when the SLAT
pin is set to “H” the latch circuit does not hold data. The data will instead pass onto output.
When the OE pin is set to “L” the OUT0 to OUT15 output pins will go ON and OFF in response to
the data. In addition, when the OE pin is set to “H” all the output pins will be forced OFF regardless
of the data.
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Pin Functions
Pin No
Pin Name
I/O
Function
1
GND
―
The ground pin.
2
SIN
I
The serial data input pin.
3
SCK
I
4
SLAT
I
The latch signal input pin.
Data is saved at L level.
5
OUT0
O
A sink type constant current output pin.
6
OUT1
O
A sink type constant current output pin.
7
OUT2
O
A sink type constant current output pin.
8
OUT3
O
A sink type constant current output pin.
9
OUT4
O
A sink type constant current output pin.
10
OUT5
O
A sink type constant current output pin.
11
OUT6
O
A sink type constant current output pin.
12
OUT7
O
A sink type constant current output pin.
13
OUT8
O
A sink type constant current output pin.
14
OUT9
O
A sink type constant current output pin.
15
OUT10
O
A sink type constant current output pin.
16
OUT11
O
A sink type constant current output pin.
17
OUT12
O
A sink type constant current output pin.
18
OUT13
O
A sink type constant current output pin.
19
The serial data transfer clock input pin.
Data are shifted at the rising edge.
OUT14
O
A sink type constant current output pin.
20
OUT15
O
A sink type constant current output pin.
21
OE
I
The constant current output enable signal input pin.
During the “H” level, the output will be forced off.
22
SOUT
O
The serial data output pin.
23
REXT
―
VDD
―
The constant current value setting resistor connection pin.
24
Then a resistor connects to the ground.
All output current is set to the same.
The power supply input pin.
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Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Symbol
Rating (Note1)
Unit
VDD
-0.4 to 6.0
V
IO
55
mA
Logic input voltage
VIN
-0.3 to VDD + 0.3 (Note2)
V
Output voltage
VO
-0.3 to 26
V
Operating temperature
Topr
-40 to 85
°C
Storage temperature
Tstg
-55 to 150
°C
Power supply voltage
Output current
Thermal resistance
94 (AFG), 120 (AFNG)
Rth(j-a)
Power dissipation
°C/W
When mounted PCB (Note3)
1.32 (AFG), 1.04 (AFNG)
PD
W
When mounted PCB (Note3), (Note4)
Note1: Voltage is ground referenced.
Note2: However, do not exceed 6 V.
Note3: PCB condition 76.2 mm x 114.3 mm x 1.6 mm, Cu 30 % (SEMI conforming, 4-Layer)
Note4: The power dissipation decreases the reciprocal of the saturated thermal resistance (1/ Rth(j-a)) for each
One degree (°C) that the ambient temperature is exceeded from Ta = 25 °C.
Operating Conditions
DC Items (Unless otherwise specified, VDD = 3.0 to 5.5 V, Ta = -40°C to 85°C)
Characteristics
Power supply voltage
Output voltage when ON
Symbol
Test Conditions
Min
Typ.
Max
Unit
VDD
―
3.0
―
5.5
V
0.4
―
4.0
V
VO (ON)
OUTn
High level logic input voltage
VIH
SIN,SCK, SLAT , OE
0.7 ×
VDD
―
VDD
V
Low level logic input voltage
VIL
SIN,SCK, SLAT , OE
GND
―
0.3 ×
VDD
V
High level SOUT output current
IOH
―
―
―
-1
mA
Low level SOUT output current
IOL
―
―
―
1
mA
IO1
OUTn , VDD = 3.3 V, VO = 0.4 to 1.0 V
1.5
―
35
IO2
OUTn , VDD = 5.0 V, VO = 0.4 to 1.2 V
1.5
―
45
Constant current output
mA
AC Items (Unless otherwise specified, VDD = 3.0 to 5.5 V, Ta = -40°C to 85°C)
Characteristics
Serial data transfer frequency
Hold time
Symbol
Test
Circuits
Test Conditions
Min
Typ.
Max
Unit
fSCK
6
―
―
―
25
MHz
tHOLD1
6
―
5
―
―
ns
tHOLD2
6
―
5
―
―
ns
tSETUP1
6
―
5
―
―
ns
tSETUP2
6
―
5
―
―
ns
Maximum clock rise time
tr
6
(Note1)
―
―
500
ns
Maximum clock fall time
tf
6
(Note1)
―
―
500
ns
Setup time
Note1: If the device is connected in a cascade and the tr/tf of the clock waveform increases due to deceleration of the
clock waveform, it may not be possible to achieve the timing required for data transfer. Please keep these timing
conditions in mind when designing your application.
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Electrical Characteristics (Unless otherwise specified, VDD = 3.3 V, Ta = 25°C)
Characteristics
Symbol
Test
Test Conditions
Circuits
Min
Typ.
Max
Unit
High level logic output voltage
VOH
1
IOH = -1 mA
VDD
- 0.4
―
―
V
Low level logic output voltage
VOL
1
IOL = +1 mA
―
―
0.4
V
High level logic input current
IIH
2
VIN = VDD, OE , SIN, SCK
―
―
1
μA
Low level logic input current
IIL
3
VIN = GND, SLAT , SIN, SCK
―
―
-1
μA
IDD1
4
VO = 25 V, REXT = OPEN,
―
―
1.0
mA
IDD2
4
REXT = 1.2 kΩ, All output off
―
―
4.0
mA
IDD3
4
REXT = 1.2 kΩ, All output on
―
―
8.0
mA
IO
5
―
14
―
mA
Constant current error(Ch to Ch)
∆IO(Ch)
5
―
±1
±1.5
%
Constant current error(IC to IC)
∆IO(IC)
5
―
±1
±1.5
%
IOK
5
―
―
0.5
μA
%VDD
5
VDD = 3.0 to 3.6 V, VO = 0.4 V,
―
±1
±2
%
Constant current output voltage
regulation
%VO
5
VDD = 3.3 V, VO = 0.4 to 3.0 V,
―
±1
―
%/V
Pull-up resistor
RUP
3
OE
250
500
800
kΩ
RDOWN
2
SLAT
250
500
800
kΩ
Power supply current
Output current
Output OFF leak current
Constant current power
voltage regulation
Pull-down resistor
supply
SCK = “L”, OE = “H”
VDD = 3.3 V, VO = 0.4 V,
REXT = 1.2 kΩ, OUT0 to OUT15
VDD = 3.3 V, VO = 0.4 V,
REXT = 1.2 kΩ, OUT0 to OUT15
VDD = 3.3 V, VO = 0.4 V,
REXT = 1.2 kΩ, OUT0 to OUT15
VDD = 3.3 V, VO = 25 V,
REXT = 1.2 kΩ, OUT0 to OUT15
REXT = 1.2 kΩ, OUT0 to OUT15
REXT = 1.2 kΩ, OUT0 to OUT15
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Electrical Characteristics (Unless otherwise specified, VDD = 5.0 V, Ta = 25°C)
Characteristics
Symbol
Test
Test Conditions
Circuits
Min
Typ.
Max
Unit
High level logic output voltage
VOH
1
IOH = -1 mA
VDD
- 0.4
―
―
V
Low level logic output voltage
VOL
1
IOL = +1 mA
―
―
0.4
V
High level logic input current
IIH
2
VIN = VDD, OE , SIN, SCK
―
―
1
μA
Low level logic input current
IIL
3
VIN = GND, SLAT , SIN, SCK
―
―
-1
μA
IDD1
4
VO = 25 V, REXT = OPEN,
―
―
1.0
mA
IDD2
4
REXT = 1.2 kΩ, All output off
―
―
4.5
mA
IDD3
4
REXT = 1.2 kΩ, All output on
―
―
8.0
mA
IO
5
VDD = 5.0 V, VO = 0.4 V,
REXT = 1.2 kΩ, OUT0 to OUT15
―
14
―
mA
Constant current error(Ch to Ch)
∆IO(Ch)
5
―
±1
±1.5
%
Constant current error(IC to IC)
∆IO(IC)
5
―
±1
±1.5
%
IOK
5
―
―
0.5
μA
%VDD
5
VDD = 4.5 to 5.5 V, VO = 0.4 V,
―
±1
±2
%
Constant current output voltage
regulation
%VO
5
VDD = 5.0 V, VO = 0.4 to 3.0 V,
―
±1
―
%/V
Pull-up resistor
RUP
3
OE
250
500
800
kΩ
RDOWN
2
SLAT
250
500
800
kΩ
Power supply current
Output current
Output OFF leak current
Constant current power
voltage regulation
Pull-down resistor
supply
SCK = “L”, OE = “H”
VDD = 5.0 V, VO = 0.4 V,
REXT = 1.2 kΩ, OUT0 to OUT15
VDD = 5.0 V, VO = 0.4 V,
REXT = 1.2 kΩ, OUT0 to OUT15
VDD = 5.0 V, VO = 25 V,
REXT = 1.2 kΩ, OUT0 to OUT15
REXT = 1.2 kΩ, OUT0 to OUT15
REXT = 1.2 kΩ, OUT0 to OUT15
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TB62747AFG/AFNG
Switching Characteristics (Unless otherwise specified, VDD = 3.0 V, Ta = 25°C)
Symbol
Test
Circuits
SCK- OUT0
tpLH1
6
SLAT - OUT0
tpLH2
OE - OUT0
Propagation delay SCK-SOUT
time
SCK- OUT0
Characteristics
Min
Typ.
Max
Unit
SLAT = “H”, OE = “L”
―
20
300
ns
6
OE = “L”
―
20
300
ns
tpLH3
6
SLAT = “H”
―
20
300
ns
tpLH
6
CL=10.5 pF
10
20
35
ns
tpHL1
6
SLAT = “H”, OE = “L”
―
30
340
ns
SLAT - OUT0
tpHL2
6
OE = “L”
―
70
340
ns
OE - OUT0
tpHL3
6
SLAT = “H”
―
70
340
ns
SCK-SOUT
tpHL
6
CL=10.5 pF
10
20
35
ns
Output rise time
tor
6
10 to 90 % of voltage
waveform
―
20
90
ns
Output fall time
tof
6
90 to 10 % of voltage
waveform
―
25
180
ns
twOE(L)
6
OE = “L” (Note1)
100
―
―
ns
Clock pulse width
twSCK
6
SCK = “H” or “L”
20
―
―
ns
Latch pulse width
twSLAT
6
SLAT = “H”
20
―
―
ns
Enable pulse width
Test Conditions
Note1: At the condition of twOE(H) = 250 ns or more
Switching Characteristics (Unless otherwise specified, VDD = 5.5 V, Ta = 25°C)
Symbol
Test
Circuits
SCK- OUT0
tpLH1
6
SLAT - OUT0
tpLH2
OE - OUT0
tpLH3
Propagation delay SCK-SOUT
time
SCK- OUT0
SLAT - OUT0
Characteristics
Min
Typ.
Max
Unit
SLAT = “H”, OE = “L”
―
20
300
ns
6
OE = “L”
―
20
300
ns
6
SLAT = “H”
―
20
300
ns
tpLH
6
CL=10.5 pF
10
20
35
ns
tpHL1
6
SLAT = “H”, OE = “L”
―
30
340
ns
tpHL2
6
OE = “L”
―
70
340
ns
OE - OUT0
tpHL3
6
SLAT = “H”
―
70
340
ns
SCK-SOUT
tpHL
6
CL=10.5 pF
10
20
35
ns
Output rise time
tor
6
10 to 90 % of voltage
waveform
―
20
90
ns
Output fall time
tof
6
90 to 10 % of voltage
waveform
―
25
180
ns
twOE(L)
6
OE = “L” (Note1)
100
―
―
ns
Enable pulse width
Test Conditions
Clock pulse width
twSCK
6
SCK = “H” or “L”
20
―
―
ns
Latch pulse width
twSLAT
6
SLAT = “H”
20
―
―
ns
Note1: At the condition of twOE(H) = 250 ns or more
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I/O Equivalent Circuits
1. SCK, SIN
2. OE
VDD
VDD
(SCK)
(SIN)
OE
GND
GND
3. SLAT
4. SOUT
VDD
VDD
SLAT
SOUT
GND
GND
5. OUT0 to OUT15
OUT0 to OUT15
GND
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TB62747AFG/AFNG
Test Circuits
Test Circuit1: High level logic output voltage / Low level logic output voltage
SCK
VDD
OUT0
SIN
F.G
SLAT
OUT7
OE
OUT15
IO = -1mA to 1mA
SOUT
V
VDD = 3.3 V, 5.0 V
GND
REXT
REXT
CL = 10.5 pF
VIH = VDD
VIL = 0 V
tr = tf = 10 ns
(10 to 90 %)
Test Circuit2: High level logic input current / Pull-down resistor
VIN = VDD
A
A
SCK
VDD
OUT0
SIN
SLAT
A
A
OUT7
OE
OUT15
VDD = 3.3 V, 5.0 V
SOUT
CL = 10.5 pF
GND
REXT
REXT
Test Circuit3: Low level logic input current / Pull-up resistor
OUT0
SIN
SLAT
OUT7
OE
OUT15
REXT
GND
SOUT
11
VDD = 3.3 V, 5.0 V
A
A
VDD
CL = 10.5 pF
A
SCK
REXT
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TB62747AFG/AFNG
Test Circuit4: Power supply current
SCK
F.G
VDD
OUT0
SIN
SLAT
OUT7
OE
OUT15
A
SOUT
VO = 0.4 V
VDD = 3.3 V, 5.0 V
GND
CL = 10.5 pF
REXT
REXT = 1.2 kΩ
VIH = VDD
VIL = 0 V
tr = tf = 10 ns
(10 to 90 %)
Test Circuit5: Constant current output / Output OFF leak current / Constant current error
Test Circuit5: Constant current power supply voltage regulation / Constant current output voltage regulation
SCK
OUT0
A
OUT7
A
OUT15
A
SIN
SLAT
OE
SOUT
VDD = 3.3 V, 5.0 V
GND
CL = 10.5 pF
REXT
REXT = 1.2 kΩ
VIH = VDD
VIL = 0 V
tr = tf = 10 ns
(10 to 90 %)
VO = 0.4 V, 25 V
F.G
VDD
Test Circuit6: Switching Characteristics
SCK
OUT0
CL
SIN
SLAT
OUT7
OE
CL
GND
SOUT
CL = 10.5 pF
REXT = 1.2 kΩ
REXT
12
RL
CL = 10.5 pF
VDD = 3.0 V, 5.5 V
OUT15
VIH = VDD
VIL = 0 V
tr = tf = 10 ns
(10 to 90 %)
RL
VLED = 4.9 V
F.G
RL = 300 Ω
VDD
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TB62747AFG/AFNG
Timing Waveforms
1. SCK, SIN, SOUT
twSCK
90%
SCK
50%
50%
tSETUP1
SIN
50%
10%
twSCK
50%
90%
10%
tr
tf
50%
tHOLD1
SOUT
50%
tpLH/tpHL
2. SCK, SIN, SLAT , OE , OUT0
SCK
50%
50%
SIN
tHOLD2
SLAT
tSETUP2
50%
50%
twSLAT
twOE(L)
50%
OE
50%
50%
OUT0
tpHL1/tpLH1
tpHL2/tpLH2
3. OE , OUT0
twOE
50%
50%
OE
tpLH3
tpHL3
OFF
90%
50%
50%
90%
OUT0
10%
10%
tof
ON
tor
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Reference data
*This data is provided for reference only. Thorough evaluation and testing should be implemented when
designing your application's mass production design.
Output Current – REXT Resistor
All output on
Ta=25 °C
VO=0.7 V
Theoretical value
IOUT (A) = 1.13 (V) ÷ REXT (Ω) × 14.9
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Reference data
*This data is provided for reference only. Thorough evaluation and testing should be implemented when
designing your application's mass production design.
Output Current – Duty (LED turn-on rate)
IO - Duty
50
AFG
45
AFNG
40
40
35
35
30
30
25
Ta=25 °C
VDD=5.0 V
VO=1.0 V
ON PCB
20
15
10
5
AFG
45
IO (mA)
IO (mA)
IO - Duty
50
AFNG
25
Ta=55 °C
VDD=5.0 V
VO=1.0 V
ON PCB
20
15
10
5
0
0
0
20
40
60
Duty - Turn on rate (%)
80
100
0
20
40
60
Duty - Turn on rate (%)
80
100
AFG
AFNG
Ta=85 °C
VDD=5.0 V
VO=1.0 V
ON PCB
Power dissipation – Ta
PD - Ta
1.4
AFG
1.2
1.0
AFNG
PD (W)
0.8
0.6
0.4
0.2
0.0
0
10
20
30
40
50
Ta (℃)
60
70
80
90
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TB62747AFG/AFNG
Package Dimensions
Weight: 0.29 g (typ.)
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Package Dimensions
Unit : mm
Weight: 0.14 g (typ.)
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or
simplified for explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for
explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only.
Thorough evaluation is required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of
application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics.
These components and circuits are not guaranteed to prevent malfunction or failure from
occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device
breakdown, damage or deterioration, and may result injury by explosion or combustion.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of
over current and/or IC failure. The IC will fully break down when used under conditions that exceed its
absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs
from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke
or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate
settings, such as fuse capacity, fusing time and insertion circuit location, are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the
design to prevent device malfunction or breakdown caused by the current resulting from the inrush
current at power ON or the negative current resulting from the back electromotive force at power OFF. IC
breakdown may cause injury, smoke or ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the
protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or
ignition.
[4] Do not insert devices in the wrong orientation or incorrectly.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding
the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by
explosion or combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation or
incorrectly even just one time.
[5] Carefully select external components (such as inputs and negative feedback capacitors) and load
components (such as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as input or negative feedback condenser, the IC output
DC voltage will increase. If this output voltage is connected to a speaker with low input withstand voltage,
overcurrent or IC failure can cause smoke or ignition. (The over current can cause smoke or ignition from
the IC itself.) In particular, please pay attention when using a Bridge Tied Load (BTL) connection type IC
that inputs output DC voltage to a speaker directly.
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Points to remember on handling of ICs
(1) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the
device so that heat is appropriately radiated, not to exceed the specified junction temperature
(TJ) at any time and condition. These ICs generate heat even during normal use. An inadequate
IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC
breakdown. In addition, please design the device taking into considerate the effect of IC heat
radiation with peripheral components.
(2) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the
motor’s power supply due to the effect of back-EMF. If the current sink capability of the power supply is
small, the device’s motor power supply and output pins might be exposed to conditions beyond maximum
ratings. To avoid this problem, take the effect of back-EMF into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with
TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product,
or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all
relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for
Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for
the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product
design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or
applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams,
programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for
such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.
• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH
MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
("UNINTENDED USE"). Except for specific applications as expressly stated in this document, Unintended Use includes, without
limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for
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safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. IF YOU USE
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Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES
OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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