TB62D786FTG
TOSHIBA BiCD Process Integrated Circuit Silicon Monolithic
TB62D786FTG
9-channel constant current LED driver with single wire
TB62D786FTG
The TB62D786FTG is a constant current driver designed for LED
illumination. This product incorporates 7-bit PWM dimming controllers
and 9-channel constant current drivers. 9-channel constant current
drivers are divided into three blocks corresponding to LED
luminescence colors, and each output current can be adjusted by
external resistors.
This product is controlled using the only DATA-IN input signal. It can
be configured up to 64 recognition addresses with the ID setting pin.
This product includes a linear regulator (7.0 to 28 V) function, which
shares with the power supply of LEDs.
Additionally, data can be transferred at high speed with BiCD process.
P-VQFN24-0404-0.50-001
Weight: 0.037g (typ.)
Feature
•
Power supply voltage : VL = 7.0 to 28 V (The case used by sharing with a power supply of LED)
•
Maximum output current capability:80 mA (max) × 9 channels
•
Constant current output range:
•
Output voltage at constant-current drive: 0.4 V(min) @IOUT=5 to 40 mA
Vcc = 5.0 V±10% (The case that the power supply of LED and that of this IC separately. )
5 to 40 mA
•
Designed for common-anode LEDs.
•
The input interface is controlled by DATA-IN (Single wire)
•
Thermal shut down (TSD) included.
•
Input and output of logic circuit:
5 V CMOS Interface
•
Maximum output voltage:
28 V
•
PWM control circuit included:
7-bit PWM
•
Driver recognition:
Up to 64 driver ICs can be controlled individually
•
Operating temperature range:
•
Package:
Topr = -40 to 85°C
•
Constant current accuracy
P-VQFN24-0404-0.50-001
Condition
Constant-current accuracy
between channels
Constant-current accuracy
between ICs
Output voltage: 0.5 V
Output current: 15 mA
±3.0%
±6.0%
This product is very delicate because of elements of MOS structure. In handling, please take care of measures of static
electricity, such as use of a ground band or an electric conduction mat, removal of static electricity by an ionizer, and
management of temperature and humidity.
© 2016-2018
Toshiba Electronic Devices & Storage Corporation
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TB62D786FTG
2
8
1
18 NC
17 DATA-IN
16 DATA-OUT
15 Vcc
14 ID2
13 ID1
2
3
4
5
5
2
5
5
/OUTB2 6
4
/OUTR2 4
/OUTG2 5
3
2
/OUTG1 2
/OUTB1 3
1
/OUTR1 1
1
/OUTB0 24
9
7
TOP VIEW
3
/OUTG0 23
10 REXT-B
3
4
/OUTR0 22
11 GND
4
5
VL 21
12 ID0
5
5
NC 20
5
VLOUT 19
1
Pin Assignment (top view)
REXT-G
REXT-R
PGND
Please be sure to connect the back radiation PAD of a QFN package to GND of a substrate.
Block diagram
Vcc
VLOUT
VLED
(5V REG)
Power
supply
ID0
Address
setting
ID1
ID2
Logic process
DATA-IN
REXT-R
PWM(7-bit)
Constant
current
driver
PWM(7-bit)
Constant
current
driver
PWM(7-bit)
Constant
current
driver
PWM(7-bit)
Constant
current
driver
PWM(7-bit)
Constant
current
driver
PWM(7-bit)
Constant
current
driver
PWM(7-bit)
Constant
current
driver
PWM(7-bit)
Constant
current
driver
PWM(7-bit)
Constant
current
driver
Oscillator
DATA-OUT
GND
VL
PGND
REXT-G
/OUTR0
/OUTR1
/OUTR2
/OUTG0
/OUTG1
/OUTG2
/OUTB0
/OUTB1
/OUTB2
REXT-B
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
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TB62D786FTG
Pin Description
Pin No.
Symbol
Function description
1
/OUTR1
Constant current output pin. (Open-drain type)
2
/OUTG1
Constant current output pin. (Open-drain type)
3
/OUTB1
Constant current output pin. (Open-drain type)
4
/OUTR2
Constant current output pin. (Open-drain type)
5
/OUTG2
Constant current output pin. (Open-drain type)
6
/OUTB2
Constant current output pin. (Open-drain type)
7
PGND
8
REXT-R
External resistor pin for output current configuration (/OUTR0, /OUTR1, /OUTR2)
9
REXT-G
External resistor pin for output current configuration (/OUTG0, /OUTG1, /OUTG2)
10
REXT-B
External resistor pin for output current configuration (/OUTB0, /OUTB1, /OUTB2)
11
GND
Ground pin
12
ID0
ID configuration pin
13
ID1
ID configuration pin
14
ID2
ID configuration pin
15
Vcc
5V of supply voltage input pin
16
DATA-OUT
17
DATA-IN
18
NC
19
VLOUT
20
NC
Non-connection pin. Please connect to GND or open. (Note 1)
21
VL
Power supply input pin in the case of sharing a power supply of LED and the power supply of this
product.
22
/OUTR0
Constant current output pin. (Open-drain type)
23
/OUTG0
Constant current output pin. (Open-drain type)
24
/OUTB0
Constant current output pin. (Open-drain type)
Power ground pin
Serial data output pin (DATA-in input signal is output to the buffer.)
Serial data input pin
Non-connection pin. Please connect to GND or Vcc.
5V Regulator output pin. Please connect VLOUT and Vcc when it use included regulator.
In case it inputs 5V direct to Vcc pin please VLOUT connect to GND pin.
Note 1: Please pay attention to short circuiting between adjacent pins when pin 20 is connected to GND.
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TB62D786FTG
Equivalent circuit for inputs and outputs
Equivalent circuit
Pin No.
VCC
Vcc
DATA-IN
DATA-IN
GND
VCC
Vcc
DATA-OUT
DATA-OUT
GND
ID0 to 2
VCC
Vcc
Comparator
コンパレータ
3 to 2 decoder
3 to 2 デコーダ
A2
Q1
A1
Q0
ID0
ID1
ID2
VCC-2Vf
A0
GND
/OUTR0 to 2
/OUTG0 to 2
/OUTB0 to 2
OUTR0~2
OUTG0~2
OUTB0~2
PGND
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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TB62D786FTG
Programming the TB62D786FTG
This product is controlled with single wire data signal shown in the following. As compared with 2-wire data signal
synchronous with the clock signal in conventional products, this product assigns each data to the transition of potential
(H to L or L to H).
SDA
2-wire input data
L
H
SCLK
Single wire input data
L
H
DATA-IN
L
H
(1) Data setting format
Each command setting input to DATA-IN is set with the following format.
This product recognizes the communication frequency (rising interval of input data) by taking in the start command
(the start condition of data input).
Start command : 1010101010101010=0xAA, 0xAA (original binary: 11111111)
Since this product continues to recognize the signal interval which recognizes at the start command until the period
command, input the pulse width so that the period is not collapsed until completion of the period command.
Period command : 1001010101010110=0x95,0x56 (original binary: 10000001)
After the completion of the period command input, make sure to set the interval ("L") more than 10 μs just before next
start command input.
Interval more
than10µs
Ex.) Basic input mode
Period
command
[10000001]
DATA-IN
L input
Start
command
[11111111]
Slave
address
Sub address
Period
command
[10000001]
Data byte
L input
Start
command
[11111111]
Example 1) Start command setting 0xAA, 0xAA (original binary 11111111)
DATA-IN
H
L
H
"1"
L
H
"1"
L
H
"1"
L
H
"1"
L
H
"1"
L
H
"1"
L
H
"1"
L
"1"
Example 2) Period command setting [original binary 10000001]
DATA-IN
H
L
"1"
L
H
"0"
L
H
"0"
L
H
"0"
5
L
H
"0"
L
H
"0"
L
H
"0"
H
L
"1"
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TB62D786FTG
PWM
counter
OUTR0
OUTG0
OUTB0
OUTR1
OUTG1
OUTB1
OUTR2
Constant
current
driver
R0
Constant
current
driver
G0
Constant
current
driver
B0
Constant
current
driver
R1
Constant
current
driver
G1
Constant
current
driver
B1
Data
compare
R0
Data
compare
G0
Data
compare
B0
Data
compare
R1
Data
compare
G1
8bit
8bit
8bit
8bit
PWM data
R0
PWM data
G0
PWM data
B0
8bit
8bit
8bit
8bit
counter
DATA-IN
1 to 2-wire
conversion
phase
detection
OUTG2
OUTB2
Constant
current
driver
R2
Constant
current
driver
G2
Constant
current
driver
B2
Data
compare
B1
Data
compare
R2
Data
compare
G2
Data
compare
B2
8bit
8bit
8bit
8bit
8bit
PWM data
R1
PWM data
R1
PWM data
B1
PWM data
R2
PWM data
G2
PWM data
B2
8bit
8bit
8bit
8bit
8bit
8bit
SDA
Shift register / ID compare / Ch selection
CLK
8bit
ID setting
Oscillator
ID0 ID1 ID2
(2) Normal programming mode
Normal input mode should be set as the following flow.
Start command -> Slave address -> Sub-address -> Data byte -> Period Command
Slave address: ID of IC, Sub-address: set to Output channel, Data byte: setting PWM
Interval
(“L” more
than 10μs)
Interval
Start
Slave
Sub-address
Data byte
Period
Command
Address
(channel select)
(PWM configuration)
Command
(“L” more
than 10μs)
(3) Special programming mode
This is how to set when all channels are set individually.
-Special mode setting (In the case that all channels are set individually)
If the Special mode is set to sub-address, the illuminating data of all channels can be set.
Special mode: 0110100101010101=0x69, 0x55 (original binary: 01100000)
Interval
(“L” more
than 10μs)
Start
Command
Slave
Address
Sub-address
(Special mode)
Data
OUTR0
Data
OUTG0
Data
OUTB0
Data
Data
Data
Data
Data
Data
Period
OUTR1
OUTG1
OUTB1
OUTR2
OUTG2
OUTB2
Command
Please set 9 channels of data surely. (When the data more than 9 channels are input, the 10th and subsequent
data are invalid.).
-Channel setting to be output
Start Command
Slave
Address
Sub-address
(channel setting)
Data setting
(Output which is set at subaddress)
6
Period Command
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TB62D786FTG
(4)Data settings
a) Slave address
Input voltages and logic states of the ID0, ID1, ID2 pins are determined as follows.
(MSB=”0”, LSB =0 (Except of all selections))
Vcc=”1010”=0xA, open="1001”=0x9, REXT-R/B/G(*)=”0110”=0x6, GND=”0101”=0x5
Slave setting
Slave address
Input with one wire
Hexadecimal
0101010101010101
0x5555
0101010101011001
0x5559
0101010101100101
0x5565
0101010101101001
0x5569
0101010110010101
0x5595
0101010110011001
0x5599
0101010110100101
0x55A5
0101010110101001
0x55A9
0101011001010101
0x5655
0101011001011001
0x5659
0101011001100101
0x5665
0101011001101001
0x5669
0101011010010101
0x5695
0101011010011001
0x5699
0101011010100101
0x56A5
0101011010101001
0x56A9
0101100101010101
0x5955
0101100101011001
0x5959
0101100101100101
0x5965
0101100101101001
0x5969
0101100110010101
0x5995
0101100110011001
0x5999
0101100110100101
0x59A5
0101100110101001
0x59A9
0101101001010101
0x5A55
0101101001011001
0x5A59
0101101001100101
0x5A65
0101101001101001
0x5A69
0101101010010101
0x5A95
0101101010011001
0x5A99
0101101010100101
0x5AA5
0101101010101001
0x5AA9
0110010101010101
0x6555
0110010101011001
0x6559
0110010101100101
0x6565
0110010101101001
0x6569
0110010110010101
0x6595
0110010110011001
0x6599
0110010110100101
0x65A5
0110010110101001
0x65A9
0110011001010101
0x6655
0110011001011001
0x6659
0110011001100101
0x6665
0110011001101001
0x6669
0110011010010101
0x6695
0110011010011001
0x6699
0110011010100101
0x66A5
0110011010101001
0x66A9
Original
binary
00000000
00000010
00000100
00000110
00001000
00001010
00001100
00001110
00010000
00010010
00010100
00010110
00011000
00011010
00011100
00011110
00100000
00100010
00100100
00100110
00101000
00101010
00101100
00101110
00110000
00110010
00110100
00110110
00111000
00111010
00111100
00111110
01000000
01000010
01000100
01000110
01001000
01001010
01001100
01001110
01010000
01010010
01010100
01010110
01011000
01011010
01011100
01011110
ID2
ID1
ID0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
GND
GND
GND
GND
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
Open
Open
Open
Open
Vcc
Vcc
Vcc
Vcc
GND
GND
GND
GND
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
Open
Open
Open
Open
Vcc
Vcc
Vcc
Vcc
GND
GND
GND
GND
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
Open
Open
Open
Open
Vcc
Vcc
Vcc
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R,G,B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
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TB62D786FTG
0110100101010101
0x6955
01100000
0110100101011001
0x6959
01100010
0110100101100101
0x6965
01100100
0110100101101001
0x6969
01100110
0110100110010101
0x6995
01101000
0110100110011001
0x6999
01101010
0110100110100101
0x69A5
01101100
0110100110101001
0x69A9
01101110
0110101001010101
0x6A55
01110000
0110101001011001
0x6A59
01110010
0110101001100101
0x6A65
01110100
0110101001101001
0x6A69
01110110
0110101010010101
0x6A95
01111000
0110101010011001
0x6A99
01111010
0110101010100101
0x6AA5
01111100
0110101010101001
0x6AA9
01111110
01XXXXXXXXXXXX10
0x4002**
0XXXXXX1
* Please set it as a pin for one of REXT-R,G,B.
** The hexadecimal number display of all selections is a case
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
GND
GND
GND
GND
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
REXT-R/G/B*
Open
Open
Open
Open
Vcc
Vcc
Vcc
Vcc
All selections
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
GND
REXT-R/G/B*
Open
Vcc
which is defined as x=0.
b) Sub-address
Output channel setting/ All channels setting/ Special mode setting
In output channel setting, a channel which defines PWM configuration is selected. In all channels setting, PWM is
configured for all channels. The special mode is the mode which sets all channels individually.
Channel setting command
Input with one wire Hexadecimal
0101010101011001
0x5559
0101010101100101
0x5565
0101010101101001
0x5569
0101010110010101
0x5595
0101010110011001
0x5599
0101010110100101
0x55A5
0101010110101001
0x55A9
0101011001010101
0x5655
0101011001011001
0x5659
0101100101010101
0x5955
0110100101010101
0x6955
Original
binary
00000010
00000100
00000110
00001000
00001010
00001100
00001110
00010000
00010010
00100000
01100000
Channel setting
/OUTR0
/OUTG0
/OUTB0
/OUTR1
/OUTG1
/OUTB1
/OUTR2
/OUTG2
/OUTB2
All channels setting
Special mode setting
c) Data byte (PWM setting)
Data bytes set PWM dimming.
PWM setting command
Input with one wire
Hexadecimal
0101010101010101
0x5555
0101010101011001
0x5559
0101010101100101
0x5565
…
1010101010100101
0xAAA5
1010101010101001
0xAAA9
Original
binary
00000000
00000010
00000100
…
11111100
11111110
PWM dimming
0/127
1/127
2/127
…
126/127
127/127
Note: Any data other than those specified above must not be programed.
Default setting is 0/127.
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TB62D786FTG
(5) Notes of data setting
This product has the specification of data recognition or processing with only a data signal (asynchronous input signal).
The data period (communication speed) is read (learned) with the start command (data input start condition). Data are
recognized according to this learning period, and reset the learning period with the period command (data input
completion condition). Therefore, if the data period from the start command to the period command is collapsed, data
are not recognized (see the following (a)). Then the period learned during an interval period is reset and it waits for next
communication.
(a) Learning data period
Interval
More than
10 μs
(L fixed)
Start command
Slave address
Special mode
setting
Wave data setting
Data are recognized based on the
intervals and phases learned in
Start command.
Data intervals
and phases are
learned in Start
command period.
Period command
Intervals and
phases learned
are reset.
Be careful since data cannot be recognized if the intervals and phases are
changed between the Start command and Period command.
Example) Waveform disorder at the time of noise impression
periodical disorder of MCU causes.
(b) Data recognition
The data input of this product makes data 2 bits (H, and L, or L and H) on the basis of a Manchester code, and transitions
of the potential in a detection window show logic. Including jitter, communication delay and others, data are received
by potential transitions in the detection window.
Detection window
Potential transitions show the
communication data.
H communication
H
L
L communicaiton
L
H
0％
50％
100％
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TB62D786FTG
Reference: Example of control data input
(6) Example of data input to the same ID
a) In case data A is input up to the rising edge of 127 internal PWM clocks.
Transferring data A Start out put
Internal PWM clock
Pattern1
Start
Data A
Period
127
0
127
Input invalid
term
0
Data A output
Output data A starts at the rising edge of zero internal PWM clock.
Inputting is invalid from the rising edge of 127 internal PWM clocks to the rising edge of zero internal PWM clock
which is just after these 127 PWM clocks.
b) In case data A is input after the rising edge of 127 internal PWM clocks.
Data A transferring
Internal PWM clock
Pattern 2
Start
Data A
127
127
0
0
Input invalid term
Period
Start out put
Data A output
Outputting data A does not start at the rising edge of zero internal PWM clock just after the data A is input. It starts
at the next rising edge of zero internal PWM clock.
Inputting is invalid from the data A (period) input to the rising edge of after the next zero internal PWM clock.
c)
In case data B is input after data of pattern 1 starts outputting.
Transferring Data A Start output
Internal PWM clock
Pattern 3
Start
Data A
Period
Transferring Data B
0
127
Input invalid
term
126
Start
Data B
Period
Start output
0
127
Input invalid
term
Data A output
Data B output
Outputting data A starts at the rising edge of zero internal PWM clock just after the data A is input. Outputting data
B starts at the rising edge of zero internal PWM clock which is just after the data B input.
Inputting is invalid in the following term.
From the rising edge of 127 internal PWM clocks which are just after the data A is input to the rising edge of zero
internal PWM clock which is just after these 127 clocks.
From the rising edge of 127 internal PWM clocks which is just after the data B input to the rising edge of zero
internal PWM clock which is just after these 127 clocks.
Pay attention that the IC does not operate according to the configuration while the following patterns (patterns 4
and 5) are input.
d)
In case data B is input before starting the output of pattern 2.
Transferring Data A Start out put
Internal PWM clock
127
127
0
0
Input invalid term
Pattern 4
Start
Data A
Start
Period
Data B
Period
Data A output
Inputting is invalid from the data A (period) input to the rising edge of the second internal clock. So, data B is invalid
and data A is output.
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TB62D786FTG
e) In case the period command mistakes.
Internal PWM clock
Pattern 5
Start
Transferring Data B
0
127
0
127
Data A
Start
Data B
Period
Start output
Input invalid
term
Data B
output
Outputting data A does not start at the rising edge of zero internal clock which is just after the data A input.
Outputting data B starts at the rising edge of zero internal PWM clock which is just after the data B input.
f)
In case of matching asynchronously the timing between pattern end and internal data update
1 cycle of internal PWM
counter=3ms(max)
Transferring
Data A
Internal PWM
clock
Pattern
Internal
SCLK
125
Start
126
Data A
0
127
R eady for
tran sfer
Period
R ece ivin g
in itial izatio n
61
62
126
125
63
Data transfer and receiving initialization
after inputting Period is created at random
in 1 cycle of internal PWM counter.
Pattern
Internal
SCLK
126
Start
0
127
1
62
63
126
64
Transferring
data A
Data A
Start
Data B
Start
Data B
R ece ivin g
in itial izatio n
R eady for
tran sfer
Internal PWM
clock
0
127
*1 Data A is refl ected to LED output and waiting
for receiving.
0
127
1
*1
Period
In case of matching asynchronously the timing between SCLK end and internal data update, the start command at
the beginning of next pattern may not be received. That may occur in the pattern of first IC if there are patterns
for two or more ICs. That does not occur if the pattern length is as follows.
1. Less than minimum 10.6 μs after inputting period command
2. Exceeding maximum 3 ms from point of 1.
This time management is difficult. We recommend that the following measures are applied from initial state to avoid
the occurrence of the event.
Dummy data are added to the beginning of the pattern, and 1 time or more SCLKs should be added.
The following figure shows the dummy data = L. However, the dummy data =H is also possible.
Transferring Data A
Internal PWM
clock
Pattern
Internal
SCLK
Dumm y
Start
125
Data A
Dummy
126
R eady for
tran sfer
Period
127
R ece ivin g
in itial izatio n
0
61
62
63
125
126
127
0
*1 Data A is refl ected to LED output and waiting for receiving.
Dummy
Start
Data B
Start
DATA-IN
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TB62D786FTG
(7) Example of data input to the different ID.
a) In case the data B is input to slave (= 02h) just after the data A is input to slave (= 00h).
Transferring
Data A and B
Internal PWM clock
Start
Pattern 6
127
Slave=00h, Data A
Period
Slave=02h, Data B
Start
Start out put
0
Period
Data A output
Slave=00h output
Data B output
Slave=02h output
Both data A and data B are output at the rising edge of zero internal PWM clock which is just after the data A and
the data B inputs.
(Reference)
Pay attention that the IC does not operate according to the configuration while following patterns (patterns 7 and 8)
are input.
b) In case period command after inputting data A to the slave (=00h) is missed or omitted, or in case period
Transferring Data A
command after inputting data B to the slave (=02h) is missed or omitted.
Start out put
Data A is output. Data B is not output.
Internal PWM clock
Pattern 7
Start
Slave=00h, Data A
0
127
Slave=02h, Data B
Start
Data A output
Slave=00h output
Slave=02h output
c)
In case start command is input after data B of pattern 7 is input.
Transferring
Start out put
Data A
Internal PWM clock
Pattern 8
Start
Slave=00h, Data A
127
Start
Slave=02h, Data B
0
Start
Data A output
Slave=00h output
Slave=02h output
Data A is output. Data B is not output.
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TB62D786FTG
Power Supply Block
The power supply of this product can be set with the following 2 ways shown in (1) and (2).
(1) When the power supply of LEDs and those of this product are shared (The power supply function of this product
is used.)
(2) When this product is operated with 5V power supply input, not sharing the power supply of LEDs (The power
supply function of this product is not used.)
Each setting is shown below.
(1) When the power supply of LEDs and those of this product are shared
VLOUT
Vcc
(5.0 V)
Linear
regulator
VL
Power supply
(7.0 to 28V)
5 V control circuit
GND,PGND
LED
As shown in the above, the power supply (7.0 to 28V) is applied to the VL pin, and VLOUT and Vcc pins are connected
directly.
Connect VLOUT pin output (5V) to Vcc of this product, and also connect at within 15 mA.
(2) When 5V power supply is input to Vcc directly
5 V power supply
VLOUT
Vcc
(5.0 V)
Linear
regulator
Power supply
(7.0 to 28V)
VL
5 V control circuit
GND,PGND
LED
When 5V power supply is applied to this product without using the built-in power supply, ground VL pin and VLOUT pin
to GND.
Note:
Add decoupling capacitors to VL pin and Vcc pin. The recommended values are as follows.
Recommended value of decoupling capacitors between VL (LED power supply) and GND: 1 μF of electrolytic capacitor
* Evaluate appropriately since it is dependent on the main power supply performance.
Recommended value of decoupling capacitors between Vcc (5V power supply) and GND: 1μF of electrolytic capacitor
and 0.1μF of ceramic capacitor
* Evaluate appropriately since it is dependent on the LED current to be set and current supply amount of VLOUT.
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TB62D786FTG
Data buffer
Data buffer is built in between DATA-IN and DATA-OUT, and it can be used for the cascade connection of two or more
these products.
In the case of cascade connection with this buffer, connect up to 5 pieces (@ 2 MHz communication) on the same board.
LED power supply
DATAーIN
TB62D786FTG
DATAーOUT
MCU
DATAーIN
DATA
TB62D786FTG
DATAーOUT
DATAーIN
TB62D786FTG
Power on reset (POR)
It avoids the malfunction by the reset all internal data of IC and setting default in startup.
POR circuit operates only when VDD rises from 0 V. To restart POR, Vcc should be 0 V.
As for the voltage for holding internal data, it is guaranteed after Vcc reaches 4.5 V or more once.
Initial clear
Vcc waveform
Voltage for end of reset
2.0 V
Lower limit voltage for
guaranteed data
1.8 V
End of POR
0V
POR working
range
Beyond POR working range
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Thermal shutdown function (TSD)
When the temperature of internal IC exceeds 150°C, all constant current outputs are turned off by this function.
The constant current is output again when the temperature decreases to the rating.
TSD operation temperature 150°C to 180°C
TSD reset temperature
20°C below TSD operation temperature
* TSD function aims at detecting abnormal heating of ICs. Please avoid positively using the TSD function.
Notes of setting
1.
Output load
This product is the driver in which loads are LEDs. Do not connect loads except LEDs to the output.
2.
External resistor for LED drive current setting (REXT-R, REXT-G, REXT-B)
The external resistances to be connected to REXT-R, REXT-G, and REXTt-B pins should be connected separately.
Three resistors must not be collected as one resister. If they are collected, current error is generated in each RGB.
3.
Operation sequence of ID setting
The ID setting can be available when Vcc exceeds 4.5 V after turning on.
However, in order to prevent malfunction of the ID setting, the transitional input signals of less than 2-clock period
of external input data (DATA-IN) are not received.
Vcc
4.5V
Not available range of ID
setting
4.5V
Available range of ID setting
Not available range of ID
setting
4.
Data setting
The gradation signals should be input data for 9 channels in the special mode certainly.
When the data are input to over 9 channels, the data after 10th channel are invalid.
When the data are input to less than 9 channels, the data of channels to be input are held, and the data of channels
not to be input are held data before the input.
Moreover, do not input data which are not indicated in this document.
Confirm “Programming the TB62D786FTG” and “(5) Notes of data setting.”
5.
Data setting timing
When data are input to same slave address, next data should be input with spacing the interval 3 ms or more (128
internal PWM clocks) because data may not be received.
When data are input to different slave address, the interval 3 ms (128 internal PWM clocks) or more is not required.
6.
Decoupling capacitor
For the stabilization of power supply system, it is recommended that decoupling capacitor between power supply
and GND should place as near IC as possible. For details, refer to "power supply block."
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State Transition Diagram
VLOUT pin and Vcc pin are wire-connected beforehand, and set each IC's ID (from ID0 to ID2 pin).
Turning on main power supply (VL pin)
VLOUT pin supplies IC operation voltage (4.5 V or more).
Vcc pin voltage is 4.5V or more.
ID recognition
Data should be input after Vcc voltage
reaches 4.5V or more, and minimum 15ms passes.
Normal mode
The data of each output is updated for
every ID set by the DATA signals, and LED
illuminating is controlled.
Less than TSD
detecting
temperature
More than TSD
detecting
temperature
TSD (Thermal Shut Down) mode
All LED outputs are forced to OFF if the TSD
detection temperature has reached.
The internal data are held.
VLOUT pin and VL pin are wire-connected to GND beforehand, and set each IC's ID (from ID0 to ID2 pin).
Turning on IC power supply (Vcc pin)
Vcc pin voltage reaches 4.5V or more.
ID recognition
Data should be input after Vcc voltage
reaches 4.5V or more, and minimum 15ms passes.
Normal mode
The data of each output is updated for
every ID set by the DATA signals, and LED
illuminating is controlled.
Less than TSD
detecting
temperature
More than TSD
detecting
temperature
TSD (Thermal ShutDown) mode
All LED outputs are forced to OFF if the TSD
detection temperature has reached.
The internal data are held.
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TB62D786FTG
Absolute Maximum Ratings (Ta=25°C)
Characteristics
Symbol
Rating
Unit
VL pin Supply Voltage
VL
29
V
Vcc pin Supply Voltage
Vcc
6.0
V
Input Voltage
VIN
-0.3 to Vcc + 0.3 (Note 1)
V
Output Current
IOUT
85 (Note 4)
mA/ch
Output Voltage
VOUT
-0.3 to 29
V
Pd
2.4 (Note 2 and 3)
W
Rth (j-a)
51.5 (Note 2)
°C/W
Operating Temperature Rating
Topr
-40 to 85
°C
Storage Temperature Rating
Tstg
-55 to 150
°C
Tj
150
°C
Power Dissipation
Thermal resistance
Maximum junction Temperature
Note 1: Do not exceed 6.0 V.
Note 2: When mounted on a PCB(Material: FR-4 compliant with JEDEC 4 layers board, Board size: 76.2×114.3×1.6mm)
Note 3: Power dissipation is reduced by 1/ Rth(j-a) for each °C above 25°C ambient.
Note 4: Current may be further restricted due to ambient temperature or board condition.
Ta: Ambient temperature of ICs
Topr: Ambient temperature of ICs to be operated
Tj: IC chip temperature during operating
For the design, it is recommended that the maximum of Tj is considered of the amount of use dissipation at about 120°C.
Power Dissipation
Pd
Package saturation thermal resistance: 51.5°C/W
パッケージ
：51
.5℃/W
Power 飽和熱抵抗
dissipation:
2.4W
許容損失
：2.operating
4W
Maximum
temperature: 85°C
最大動作温度：85℃
Maximum junction temperature: 150°C
最大ジャンクション温度：150℃
2.4W
0
25
Topr (℃)
17
85
150
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TB62D786FTG
Operating Ranges (Ta=-40 to 85°C, Fin=0.5 to 2.0 MHz, unless otherwise specified)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
VL pin Supply voltage
VL
―
7.0
―
28
V
Vcc pin supply voltage
Vcc
―
4.5
―
5.5
V
Output Voltage
VOUT(ON)
All outputs
0.5
―
4
V
Output Current
IOUT
All outputs
5
―
40
mA/ch
Input DATA Frequency
Fin
―
0.5
―
2.0
MHz
DATA Detection window width
tW
―
135
―
―
ns
Input DATA allowable jitter width
tJIT
The transition of input DATA potential is
the center.
―
―
±54
ns
Input DATA minimum pulse width
tHIGH, tLOW
―
100
―
―
ns
0.7 ×
Vcc
―
Vcc
VIL
GND
―
0.3 ×
Vcc
VID0
0
―
0.1
VIH
DATA-IN
Input Voltage
ID0, ID1, ID2
VREXT=1.128 V (typ.)
VID1
VID2
ΔVl
VLOUT load current
V
VREXT
VREXT
VREXT
-0.1
+0.1
Except Supply current
Vcc 0.1
―
Vcc
―
―
15
mA
Definition of input DATA (DATA-IN) and allowable width of jitter
The following figure shows representatively the allowable width of jitter because the transition of potential is
monitored after Slave address communication after Start command. In all communications, if the jitter width is
within tJIT, the receiving can be reliable.
Slave address
START command
First
H
Second
H
Third
H
Fourth
H
Eighth
H
Fin(Duty)
=50% typ.
tST4 (4-cycle width of first H communication of START
command)
tST4*1/4
MSB data
L
H
L
tJIT
tW
tHIGH
tLOW
The voltage transitions of ”H”
communication and ”L” communication
should be input as the same phase.
Note: Output format of control signal port
CMOS push-pull type is recommended for the output port of the controller.
When the open-drain output is used, the potential transition of H communication and L communication may not be
same Duty, and the duty narrows the allowable jitter width. Therefore, pay attention to the communication wave.
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Electrical Characteristics (Ta=25°C, VL=15V, Vcc=VLOUT, Unless otherwise specified )
Characteristics
Output Current
Output Current Accuracy between
channels
Output leakage current
VLOUT pin voltage
Input current
Changes in constant output
current dependent on Vcc
Symbol
Test Condition
Min
Typ.
Max
Unit
IOUT1
VOUT =0.5V, REXT = 1.2kΩ
12.5
13.3
14.1
mA
∆IOUT2
VOUT = 0.5V, REXT =1.2kΩ
All output ON
―
―
±3.0
%
VOUT = 28 V
―
―
1
μA
―
4.5
―
5.5
V
IIH
DATAIN
―
―
1
IIL
DATAIN
―
―
-1
IID
ID0, ID1, ID2
―
―
±10
%/Vcc
Vcc = 4.5 V to 5.5 V
―
1
2
Icc (VL)
When applied VL=15 V
REXT =1.2kΩ, VOUT =0.5V,
―
7.8
15
Icc (Vcc)
When connected VL=GND
REXT =1.2kΩ, VOUT =0.5V,
―
7.4
12
Vcc
-0.4
―
―
V
―
―
0.4
V
―
―
20
―
―
20
—
70
—
IOZ
VLout
Supply Current
H Level DATA OUT Pin
Output Voltage
VOH
IOH= -1mA
L Level DATA OUT Pin
Output Voltage
VOL
IOL= 1mA
tpLH
DATAIN-DATAOUT
Propagation Delay Time (Note)
tpHL
PWM reference frequency
fPWM
CL=15pF, tr=tf=3ns
Reference frequency of internal
PWM counter
μA
%
mA
ns
kHz
Note: DATA IN - DATA OUT definition
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TB62D786FTG
Test Circuit
Test Circuit 1 Input Current (IIH)
Test Circuit 2 Input Current (IIL)
VL
Vcc
VLOUT
VL
A
DATA-IN
/OUTR0
A
ID0,1,2
/OUTB2
REXT-R
REXT-G
REXT-B
GND
PGND
Test Circuit 3 Supply Current (VL)
Vcc
VLOUT
A
VL
VL
ID0=0.1V
ID1=V(REXT)±0.1V
ID2=Vcc-0.1V
/OUTR0
ID0
ID1
ID2
/OUTB2
REXT-R
REXT-G
REXT-B
REXT=1.2kΩ
ID
setting
DATA-IN
REXT=1.2kΩ
F.G
REXT=1.2kΩ
VIH=Vcc
VIL=GND
20
GND
PGND
2018-08-02
TB62D786FTG
Test Circuit 4 Supply Current(Vcc)
Vcc
VLOUT
A
VL
Vcc
/OUTR0
ID0
ID1
ID2
/OUTB2
ID0=0.1V
ID1=V(REXT)±0.1V
ID2=Vcc-0.1V
REXT-R
REXT-G
REXT-B
REXT=1.2kΩ
ID設定
DATA-IN
REXT=1.2kΩ
F.G
REXT=1.2kΩ
VIH=Vcc
VIL=GND
GND
PGND
Test Circuit5 Output Current/ Output Leakage Current/ Output Current Accuracy/ Changes in Constant
Output current dependent on Vcc
Vcc
Vcc
ID0=0.1V
ID1=V(REXT)±0.1V
ID2=Vcc-0.1V
/OUTR0
A
ID0
ID1
ID2
/OUTB2
A
REXT-R
REXT-G
REXT-B
REXT=1.2kΩ
ID
setting
VL
DATA-IN
REXT=1.2kΩ
F.G
REXT=1.2kΩ
VIH=Vcc
VIL=GND
VLOUT
21
GND
PGND
VOUT
=0.5V, 28V
2018-08-02
TB62D786FTG
Output current - derating (illuminating rate) graph
Board condition: Material: FR-4 (Compliant with JEDEC 4 layers board), Board size: 76.2×114.3×1.6 mm
When the pulse width is 25 ms or more, it is regarded as DC.
Io - Duty
Io - Duty
90.0
90.0
80.0
80.0
70.0
VL=15V
Io (mA)
Io (mA)
VL=28V
60.0
50.0
Ta=25℃
40.0
VL=15V
30.0
VL=15V
60.0
VL=28V
50.0
0.0
10
20
30
VDS=1.0V
On PCB (4-Layer)
10.0
10.0
0
VL=15V
20.0
On PCB (4-Layer)
0.0
Ta=55℃
40.0
30.0
VDS=1.0V
20.0
70.0
40
50
60
70
80
90
100
0
10
20
30
40
50
60
70
80
90
100
Duty - turn on rate (%)
Duty - turn on rate (%)
Io - Duty
90.0
VL=15V
80.0
70.0
Io (mA)
60.0
50.0
Ta=85℃
40.0
30.0
VDS=1.0V
20.0
On PCB (4-Layer)
10.0
0.0
VL=28V
VL=15V / 28V
0
10
20
30
40
50
60
70
80
90
100
Duty - turn on rate (%)
Output current - external resistance characteristic (typ.)
IOUT - REXT
90
80
70
IOUT=1.128(V)／REXT(Ω)*14.18
50
40
30
20
3
2.8
2.6
2.4
2
2.2
1.8
1.6
1.4
1
1.2
0.8
0.6
0.4
0
0.2
10
0
IOUT (mA)
60
REXT (kΩ)
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TB62D786FTG
Application circuit example 1
LED
power
supply
VLED
OPEN
ID0
ID1 ID2
VLOUT
/OUTR0
ID0
/OUTB2
TB62D786FTG
Vcc
VLOUT
VL
/OUTR0
/OUTB2
TB62D786FTG
Vcc
DATA-IN
MCU
ID1 ID2
VL
DATA-IN
REXT-R REXT-G REXT-B
GND
REXT-R REXT-G REXT-B
GND
DATA
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TB62D786FTG
Application circuit example 2
When this product is controlled from same MCU ports of TB62781FNG, which is 2-wire input control LED driver, need
to connect the Exclusive-OR gate (TC74VHC86) and D-Flip/Flop to preceding phase of the input of this product as shown
below.
Since phase differences between DATA from MCU outputting and clock may occur, confirm the operation enough with
the following configuration.
-System configuration
TB62781FNG
2-wire input
TB62781FNG
SDA
MCU
SCLK
Logic block
TC74
VHC86
TC
7WH74
Single
wire input
DATA-IN
TB62D786FTG
TB62D786FTG
-Logic
-Timing charts
SCLK(1.5MHz)
SDA
EX-OR
CR delay U3(10)
XOR U3(8)
XOR U4(11)
DATA-IN U5(5)
Note: When this circuit is used, the interval period should be fixed to SDA=SCLK=H.
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TB62D786FTG
Package Dimensions
P-VQFN24-0404-0.50-001
Unit: mm
Weight: 0.037g (Typ.)
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TB62D786FTG
Notes of Contents
1. Block diagram
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for
explanatory purposes.
2. Equivalent circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory
purposes.
3. Timing charts
Timing charts may be simplified for explanatory purposes.
4. Application circuit example
The application circuit examples shown in this document are provided for reference purposes only. Thorough
evaluation is required, especially at the mass production design stage. Providing these application circuit
examples does not grant a license for industrial property rights.
5. Test circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components
and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
(1)
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury
by explosion or combustion.
(2)
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of
over current and/or IC failure. The IC will fully break down when used under conditions that exceed its
absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs
from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke
or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings,
such as fuse capacity, fusing time and insertion circuit location, are required.
(3)
If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the
design to prevent device malfunction or breakdown caused by the current resulting from the inrush current
at power ON or the negative current resulting from the back electromotive force at power OFF. IC
breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection
functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown.
IC breakdown may cause injury, smoke or ignition.
(4)
Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative pins
of power supplies are connected properly. Otherwise, the current or power consumption may exceed the
absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or
deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is
applied the current with inserting in the wrong orientation or incorrectly even just one time.
(5)
Carefully select external components (such as inputs and negative feedback capacitors) and load
components (such as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as input or negative feedback condenser, the IC output
DC voltage will increase. If this output voltage is connected to a speaker with low input withstand voltage,
overcurrent or IC failure can cause smoke or ignition. (The over current can cause smoke or ignition from
the IC itself.) In particular, please pay attention when using a Bridge Tied Load (BTL) connection type IC
that inputs output DC voltage to a speaker directly.
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TB62D786FTG
Points to remember on handling of ICs
(1)
Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the device so
that heat is appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and
condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can
lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design
the device taking into considerate the effect of IC heat radiation with peripheral components.
(2)
Back-EMF
When a motor reverses the rotation direction, stops or slows down abruptly, a current flow back to the
motor's power supply due to the effect of back-EMF. If the current sink capability of the power supply is
small, the device's motor power supply and output pins might be exposed to conditions beyond absolute
maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design.
(3)
Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown
circuits operate against the over temperature, clear the heat generation status immediately. Depending on
the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the
thermal shutdown circuit to not operate properly or IC breakdown before operation.
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RESTRICTIONS ON PRODUCT USE
Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as “TOSHIBA”.
Hardware, software and systems described in this document are collectively referred to as “Product”.
•
TOSHIBA reserves the right to make changes to the information in this document and related Product without notice.
•
This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's
written permission, reproduction is permissible only if reproduction is without alteration/omission.
•
Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible for
complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize
risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property,
including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate the Product into their
own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without
limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in
the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product will be used with or for.
Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the
appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information
contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and
(c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS'
PRODUCT DESIGN OR APPLICATIONS.
•
PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE EXTRAORDINARILY
HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY CAUSE LOSS OF HUMAN
LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT ("UNINTENDED USE"). Except for specific
applications as expressly stated in this document, Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment
used in the aerospace industry, lifesaving and/or life supporting medical equipment, equipment used for automobiles, trains, ships and other
transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, and
devices related to power plant. IF YOU USE PRODUCT FOR UNINTENDED USE, TOSHIBA ASSUMES NO LIABILITY FOR PRODUCT. For
details, please contact your TOSHIBA sales representative or contact us via our website.
•
Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
•
Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable
laws or regulations.
•
The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any
infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any
intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.
•
ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE FOR
PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY WHATSOEVER,
INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING
WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND (2)
DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT, OR
INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
•
Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation, for the
design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass
destruction weapons). Product and related software and technology may be controlled under the applicable export laws and regulations
including, without limitation, the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export
and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and
regulations.
•
Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. Please
use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without
limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING AS A RESULT OF
NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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