TB6562ANG/AFG
TOSHIBA Bi-CMOS Integrated Circuit
Silicon Monolithic
TB6562ANG/AFG
Dual Full-Bridge Driver IC for Stepping Motors
The TB6562ANG/AFG is a 2-phase bipolar stepping motor driver
that contains DMOS transistors in the output stage. The driver
achieves high efficiency through the use of low ON-resistance
DMOS transistors and PWM current control circuitry.
TB6562ANG
Features
2-phase/1–2-phase/W 1–2-phase excitation
PWM current control
Power supply voltage: 40 V (max)
Output current: 1.5 A (max)
Low ON-resistance: 1.5 Ω (upper and lower transistors/typ.)
TB6562AFG
Power-saving function
Overcurrent protection: ILIM = 2.5 A (typ.)
Thermal shutdown
Package: TB6562ANG; SDIP24-P-300-1.78
TB6562AFG; SSOP30-P-375-1.00
SSOP30-P-375-1.00
Weight:
SDIP24-P-300-1.78: 1.62 g (typ.)
SSOP30-P-375-1.00: 0.63 g (typ.)
This product has a MOS structure and is sensitive to electrostatic discharge. When handling the product,
ensure that the environment is protected against electrostatic discharge by using an earth strap, a conductive
mat and an ionizer. Ensure also that the ambient temperature and relative humidity are maintained at reasonable
levels.
Special care should be taken with the following pins, which are vulnerable to surge current.
Pins with low surge withstand capability:
TB6562ANG: pins 10, 15 TB6562AFG: pins 13, 18
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TB6562ANG/AFG
Block Diagram
Some functional blocks, circuits, or constants may be omitted or simplified in the block diagram for explanatory purposes.
< TB6562ANG >
GND
Vreg
SB
OSC
VCC
OUT2A
VCC
OUT1A
OUT2B
VCC
OUT1B
24
2
3
22
23
11
7
8
14
18
17
GND
13
OSC
5V
Waveform squaring
circuit
Thermal
shutdown
Control logic
Decoder
1
4
5
6
21
20
19
9
10
16
15
12
GND
Phase A
X1A
X2A
Phase B
X1B
X2B
VrefA
RSA
VrefB
RSB
GND
< TB6562AFG >
GND
Vreg
SB
OSC
VCC
OUT2A
VCC
OUT1A
OUT2B
VCC
OUT1B
30
2
3
28
29
14
10
11
17
21
20
16, 22, 23, 24
GND
OSC
5V
Waveform squaring
circuit
Thermal
shutdown
Control logic
Decoder
1
4
5
6
27
26
25
12
13
19
18
7, 8, 9, 15
GND
Phase A
X1A
X2A
Phase B
X1B
X2B
VrefA
RSA
VrefB
RSB
GND
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2012-09-28
TB6562ANG/AFG
Pin Description
< TB6562ANG >
Pin No.
Function Description
Symbol
Remarks
1
GND
Ground pin
2
Vreg
5 V output pin
Connect a capacitor between this pin and the GND pin.
3
SB
Standby pin
H: start, L: Standby, Built-in pull down resistance of 100 kΩ (typ.)
4
Phase A
Rotation direction control pin (Ch. A)
Apply a 0 V/5 V signal, Built-in pull down resistance of 100 kΩ (typ.)
5
X1A
Input pin used to set output current level (Ch. A)
Apply a 0 V/5 V signal, Built-in pull down resistance of 100 kΩ (typ.)
6
X2A
Input pin used to set output current level (Ch. A)
Apply a 0 V/5 V signal, Built-in pull down resistance of 100 kΩ (typ.)
7
VCC
Power supply voltage input pin
VCC (opr) = 10 V to 34 V
8
OUT1A
Output pin 1 (Ch. A)
Connect to a motor coil pin.
9
VrefA
Input pin for external reference voltage (Ch. A)
10
RSA
Output current detection resistor connection pin (Ch. A).
11
OUT2A
Output pin 2 (Ch. A)
12
GND
Ground pin
13
GND
Ground pin
14
OUT2B
Output pin 2 (Ch. B)
15
RSB
Output current detection resistor connection pin (Ch. B)
16
VrefB
Input pin for external reference voltage (Ch. B)
17
OUT1B
Output pin 1 (Ch. B)
Connect to a motor coil pin.
18
VCC
Power supply voltage input pin
VCC (opr) = 10 V to 34 V
19
X2B
Input pin used to set output current level (Ch. B)
Apply a 0 V/5 V signal, Built-in pull down resistance of 100 kΩ (typ.)
20
X1B
Input pin used to set output current level (Ch. B)
Apply a 0 V/5 V signal, Built-in pull down resistance of 100 kΩ (typ.)
21
Phase B
Rotation direction control pin (Ch. B)
Apply a 0 V/5 V signal, Built-in pull down resistance of 100 kΩ (typ.)
22
OSC
External capacitor pin for triangular-wave oscillation
23
VCC
Power supply voltage input pin
24
GND
Ground pin
Connect to a motor coil pin.
Connect to a motor coil pin.
VCC (opr) = 10 V to 34 V
TB6562ANG
GND
1
24
GND
Vreg
2
23
VCC
SB
3
22
OSC
Phase A
4
21
Phase B
X1A
5
20
X1B
X2A
6
19
X2B
VCC
7
18
VCC
OUT1A
8
17
OUT1B
VrefA
9
16
VrefB
RSA
10
15
RSB
OUT2A
11
14
OUT2B
GND
12
13
GND
3
TB6562AFG
GND
1
30
GND
Vreg
2
29
VCC
SB
3
28
OSC
Phase A
4
27
Phase B
X1A
5
26
X1B
X2A
6
25
X2B
GND
7
24
GND
GND
8
23
GND
GND
9
22
GND
VCC
10
21
VCC
OUT1A
11
20
OUT1B
VrefA
12
19
VrefB
RSA
13
18
RSB
OUT2A
14
17
OUT2B
GND
15
16
GND
2012-09-28
TB6562ANG/AFG
< TB6562AFG >
Pin No.
Symbol
Function Description
Remarks
1
GND
Ground pin
2
Vreg
5 V output pin
Connect a capacitor between this pin and the GND pin.
3
SB
Standby pin
H: start, L: Standby, Built-in pull down resistance of
100 kΩ (typ.)
4
Phase A
Rotation direction control pin (Ch. A)
Apply a 0 V/5 V signal, Built-in pull down resistance
of 100 kΩ (typ.)
5
X1A
Input pin used to set output current level (Ch. A)
Apply a 0 V/5 V signal, Built-in pull down resistance
of 100 kΩ (typ.)
6
X2A
Input pin used to set output current level (Ch. A)
Apply a 0 V/5 V signal, Built-in pull down resistance
of 100 kΩ (typ.)
7
GND
Ground pin
8
GND
Ground pin
9
GND
Ground pin
10
VCC
Power supply voltage input pin
VCC (opr) = 10 V to 34 V
11
OUT1A
Output pin 1 (Ch. A)
Connect to a motor coil pin.
12
VrefA
Reference voltage external set pin (Ch. A)
13
RSA
Resistance connect pin for detecting output current (Ch. A)
14
OUT2A
Output pin 2 (Ch. A)
15
GND
Ground pin
16
GND
Ground pin
17
OUT2B
Output pin 2 (Ch. B)
18
RSB
Output current detection resistor connection pin (Ch. B)
19
VrefB
Input pin for external reference voltage (Ch. B)
20
OUT1B
Output pin 1 (Ch. B)
Connect to a motor coil pin.
21
VCC
Power supply voltage input pin
VCC (opr) = 10 V to 34 V
22
GND
Ground pin
23
GND
Ground pin
24
GND
Ground pin
25
X2B
Input pin used to set output current level (Ch. B)
Apply a 0 V/5 V signal, Built-in pull down resistance
of 100 kΩ (typ.)
26
X1B
Input pin used to set output current level (Ch. B)
Apply a 0 V/5 V signal, Built-in pull down resistance
of 100 kΩ (typ.)
27
Phase B
Rotation direction control pin (Ch. B)
Apply a 0 V/5 V signal, Built-in pull down resistance
of 100 kΩ (typ.)
28
OSC
External capacitor pin for triangular-wave oscillation
29
VCC
Power supply voltage input pin
30
GND
Ground pin
Connect to a motor coil pin.
Connect to a motor coil pin.
VCC (opr) = 10 V to 34 V
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2012-09-28
TB6562ANG/AFG
Absolute Maximum Ratings (Ta = 25°C)
Characteristic
Symbol
Rating
Unit
Power supply voltage
VCC
40
V
Output voltage
VO
40
V
Output current
IO (Peak)
1.5 (Note 1)
A
Input voltage
VIN
−0.2 to 5.5
V
Power dissipation
PD
2.5 (Note 2)
W
Operating temperature
Topr
−20 to 85
°C
Storage temperature
Tstg
−55 to 150
°C
Junction temperature
Tjmax
150
°C
Note 1: Output current may be controlled by excitation mode, ambient temperature, or heatsink.
When designing a circuit, ensure that the maximum junction temperature, Tjmax = 150°C, is not exceeded
when the IC is used.
Avoid using the IC in abnormal conditions that would cause the Tj to exceed 150°C, even though the heat
protection circuit of the IC will continue to operate in such conditions.
Note 2: When mounted on a board (50 mm × 50 mm × 1.6 mm, Cu area: 50%)
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings.
Exceeding the rating (s) may cause the device breakdown, damage or deterioration, and may result injury by explosion
or combustion.
Please use the IC within the specified operating ranges.
Operating Range (Ta = –20 to 85°C)
Characteristic
Symbol
Rating
Unit
Power supply voltage
VCC
10 to 34
V
Input voltage
VIN
0 to 5
V
Vref voltage
Vref
0.5 to 7.0
V
PWM frequency
fpwm
15 to 80
kHz
Triangular-wave oscillation frequency
fOSC
45 to 400
kHz
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2012-09-28
TB6562ANG/AFG
Electrical Characteristics (VCC = 24 V, Ta = 25°C)
Characteristic
Symbol
Test
Circuit
ICC2
Control circuit
(Note 1)
Input hysteresis
voltage
Input current
Input voltage
Standby circuit
Input hysteresis
voltage
Input current
Output ON-resistance
Output leakage current
Diode forward voltage
Internal reference voltage
VINH
VINL
VIN (HYS)
IINH
IINL
VINSH
VINSL
VIN (HYS)
IINSH
IINSL
Ron (U+L)
IL (U)
IL (L)
VF (U)
VF (L)
Typ.
Max
―
6.5
10
―
7.0
12
―
2.0
4.0
―
2.3
―
5.5
―
-0.2
―
0.8
(Target spec.)
―
0.4
―
VIN = 5 V
30
50
75
VIN = 0 V
―
―
5
―
2.3
―
5.5
―
–0.2
―
0.8
(Target spec.)
―
0.4
―
VIN = 5 V
30
50
75
VIN = 0 V
―
―
5
IO = 0.2 A
―
1.5
2.0
IO = 1.5 A
―
1.5
2.0
VCC = 40 V
―
―
10
VCC = 40 V
―
―
10
IO = 1.5 A
―
1.3
2.0
IO = 1.5 A
―
1.3
2.0
4.75
5
5.25
V
―
5
10
μA
0.45
0.5
0.55
0.28
0.33
0.38
0.12
0.17
0.22
88
110
132
kHz
―
160
―
°C
Output = Open
―
XT1A = XT2A = L, XT1B = XT2B = L
Output = Open
Standby mode
ICC3
Input voltage
Min
XT1A = XT2A = H, XT1B = XT2B = H
ICC1
Supply current
Test Condition
―
―
―
―
―
―
―
―
―
Vreg
―
When current of 1 mA is loaded.
Iref
―
Vref = 0.5 V
Vref (1/10)
―
V ref (1/15)
―
V ref (1/30)
―
Triangular-wave oscillation
frequency
fOSC
―
Thermal shutdown circuit operating
temperature
TSD
―
Input current
Vref circuit
Current limit
voltage
X1 = X2 = L
Vref = 5 V
X1 = L, X2 = H
Vref = 5 V
X1 = H, X2 = L
Vref = 5 V
C = 4700 pF
(Target spec.)
Unit
mA
V
μA
V
μA
Ω
μA
V
V
Note 1: Phase, X1 and X2 pins
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2012-09-28
TB6562ANG/AFG
Truth Tables
< 2-phase excitation > (*) IO: OUT1 → OUT2; + current
OUT2 → OUT1; － current
Phase A
Phase B
Input
Phase A
Output
X1A
X2A
IO(A)
Input
Phase B
Output
X1B
X2B
IO (B)
H
L
L
100%
H
L
L
100%
L
L
L
−100%
H
L
L
100%
L
L
L
−100%
L
L
L
−100%
H
L
L
100%
L
L
L
−100%
< 1–2-phase excitation >
Phase A
Phase B
Input
Output
Input
Output
Phase A
X1A
X2A
IO (A)
Phase B
X1B
X2B
IO (B)
H
L
L
100%
H
L
L
100%
X
H
H
0%
H
L
L
100%
L
L
L
−100%
H
L
L
100%
L
L
L
−100%
X
H
H
0%
L
L
L
−100%
L
L
L
−100%
X
H
H
0%
L
L
L
−100%
H
L
L
100%
L
L
L
−100%
H
L
L
100%
X
H
H
0%
< W 1–2-phase excitation >
Phase A
Phase B
Input
Output
Input
Output
Phase A
X1A
X2A
IO (A)
Phase B
X1B
X2B
IO (B)
X
H
H
0%
L
L
L
−100%
H
H
L
33.3%
L
L
L
−100%
H
L
H
66.7%
L
L
H
−66.7%
H
L
L
100%
L
H
L
−33.3%
H
L
L
100%
X
H
H
0%
H
L
L
100%
H
H
L
33.3%
H
L
H
66.7%
H
L
H
66.7%
H
H
L
33.3.%
H
L
L
100%
X
H
H
0%
H
L
L
100%
L
H
L
−33.3%
H
L
L
100%
L
L
H
−66.7%
H
L
H
66.7%
L
L
L
−100%
H
H
L
33.3%
L
L
L
−100%
X
H
H
0%
L
L
L
−100%
L
H
L
−33.3%
L
L
H
−66.7%
L
L
H
−66.7%
L
H
L
−33.3%
L
L
L
−100%
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2012-09-28
TB6562ANG/AFG
Timing Charts
Timing charts may be simplified for explanatory purposes.
< 2-phase excitation >
IO (A)
IO (B)
100％
−100％
100％
−100％
Phase A
H
L
H
X1A
L
H
X2A
L
Phase B
H
L
H
X1B
L
H
X2B
L
(*) IO: OUT1→OUT2; + current
OUT2→OUT1; － current
< 1–2-phase excitation >
100％
IO (A)
0%
−100％
100％
IO (B)
0%
−100％
Phase A
H
L
X1A
X2A
Phase B
X1B
X2B
H
L
H
L
H
L
H
L
H
L
(*) IO: OUT1→OUT2; + current
OUT2→OUT1; － current
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2012-09-28
TB6562ANG/AFG
< W 1–2-phase excitation >
100％
66.7%
33.3%
IO (A)
0%
−33.3％
−66.7%
−100%
100％
66.7%
33.3%
IO (B)
0%
−33.3％
−66.7%
−100%
Phase A
H
L
X1A
X2A
Phase B
X1B
X2B
H
L
H
L
H
L
H
L
H
L
(*) IO: OUT1→OUT2; + current
OUT2→OUT1; － current
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2012-09-28
TB6562ANG/AFG
PWM Current Control
The IC enters CW (CCW) mode and short brake mode alternately during PWM current control.
To prevent shoot-through current caused by simultaneous conduction of upper and lower transistors in the
output stage, a dead time is internally generated for 300 ns (target spec) when the upper and lower transistors are
being switched.
Therefore synchronous rectification for high efficiency in PWM current control can be achieved without an
off-time generated via an external input.
Even for toggling between CW and CCW modes, and CW (CCW) and short brake modes, no off-time is required
due to the internally generated dead time.
VCC
OUT1
VCC
M
OUT1
VCC
M
OUT1
RS
M
RS
RS
PWM ON → OFF
t2 = 300 ns (typ.)
PWM ON
t1
PWM OFF
t3
VCC
OUT1
VCC
OUT1
M
M
RS
RS
PWM OFF → ON
t4 = 300 ns (typ.)
PWM ON
t5
Constant current regulation
When VRS reaches the reference voltage (Vref), the IC enters discharge mode. After four clock signals
are generated from the oscillator, the IC moves from discharge mode to charge mode.
VRS
Vref
OSC
Internal
clock
Vref
VRS
Charge
Discharge
Discharge
GND
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2012-09-28
TB6562ANG/AFG
Transition from charge mode to discharge mode
If VRS > Vref after four clock signals in charge mode, the IC again enters discharge mode. After a
further four clock signals in discharge mode, VRS is compared with Vref. If VRS < Vref, the IC operates
in charge mode until VRS reaches Vref.
OSC
Internal
clock
Vref
VRS
Discharge
Discharge
Charge
Charge
GND
Transition from discharge mode to charge mode
Even when the reference voltage has risen, discharge mode lasts for four clock signals and is then
toggled to charge mode.
OSC
Internal
clock
Vref
VRS
Charge
Discharge
Discharge
GND
Timing charts may be simplified for explanatory purposes.
Internal oscillation frequency (fOSC)
The internal oscillation frequency is approximated by the formula below:
fOSC = 1/(0.523 × (COSC × 3700 ＋ COSC × 600)).
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TB6562ANG/AFG
Reference Voltage Generator
The current value at 100% is determined by applying voltage at the Vref pin.
The value can be calculated as follows:
IO (100％) = Vref × 1/10 × 1/RS[A] (X1 = X2 = L)
VCC
Control
circuit
OUT1
X1
X2
OUT2
M
Decoder
IO
1/10
1/15
1/30
RS
Vref
IO
Thermal Shutdown Circuit (TSD)
The IC incorporates a thermal shutdown circuit. When the junction temperature (Tj) reaches 160°C (typ.), the
output transistors are turned off.
The output transistors are turned on automatically.
The IC has 40°C temperature hysteresis.
TSD = 160°C (target spec)
ΔTSD = 40°C (target spec)
Overcurrent Protection Circuit (ISD)
The IC incorporates an overcurrent protection circuit to detect voltage flowing through the output transistors. The
overcurrent threshold is 2.5 A (typ.).
Currents flowing through the eight output transistors are monitored individually. If overcurrent is detected in at
least one of the transistors, all transistors are turned off.
The IC incorporates a timer to count the 50 μs (typ.) for which the transistors are off. After the 50 μs, the
transistors are turned on automatically. If an overcurrent occurs again, the same operation is repeated. To prevent
false detection due to glitches, the circuit turns off the transistors only when current exceeding the overcurrent
threshold flows for 10 μs or longer.
ILIM
Output current
0
50 μs
(typ.)
10 μs
(typ.)
50 μs
(typ.)
10 μs
(typ.)
Not detected
The target specification for the overcurrent limiter value (overcurrent threshold) is 2.5 A (typ.), and varies in a
range from approximately 1.5 A to 3.5 A.
These protection functions are intended only as a temporary means of preventing output short circuits or other
abnormal conditions and are not guaranteed to prevent damage to the IC.
If the guaranteed operating ranges of this product are exceeded, these protection features may not operate and
some output short circuits may result in the IC being damaged.
The overcurrent protection feature is intended to protect the IC from temporary short circuits only.
Short circuits persisting over long periods may cause excessive stress and damage the IC. Systems should be
configured so that any overcurrent condition will be eliminated as soon as possible.
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TB6562ANG/AFG
Application Circuit
The application circuit below is for reference only and requires thorough evaluation at the mass production design stage.
In furnishing this example of an application circuit, Toshiba does not grant the use of any industrial property rights.
(Note 1)
C1
C2
C3
2
Vreg
VDD
(Note 4)
28
OSC
10
VCC
21
VCC
24 V
(Note 2)
5V
29
VCC
PORT1
3 SB
OUT1A 11
PORT2
4 Phase A
OUT2A 14
PORT3
5 X1A
PORT4
6 X2A
PORT5
27 Phase B
PORT6
26 X1B
PORT7
25 X2B
Stepping
motor
R1
RSA 13
TB6562AFG
OUT1B 20
OUT2B 17
PORT8
PORT9
RSB 18
VrefA
VrefB
12
19
GND
R1
GND
1, 7, 8, 9, 15, 16, 22, 23 24, 30
C4
R2
DAC output signal
Note 1: A power supply capacitor should be connected between VCC and RSA (RSB), and as close as possible to
the IC.
Note 2: C2 and C3 should be connected as close as possible to S-GND.
Note 3:
In powering on, set the IC as follows:
SB = Low (standby mode)
or
XA1 = XA2 = XB1 = XB2 = High (current value = 0%)
Note 4: When the Vref is being changed, a DAC output can be connected directly to the Vref pin.
Note 5: The VCC pins (pin 10, pin 21, and pin 29) should be shorted externally.
Note 6: Connect the capacitor C4 to the Vref to reduce the switching noise.
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TB6562ANG/AFG
Package Dimensions
Weight: 1.62 g (typ.)
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TB6562ANG/AFG
Weight: 0.63 g (typ.)
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TB6562ANG/AFG
Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified
for explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for
explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough
evaluation is required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of
application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These
components and circuits are not guaranteed to prevent malfunction or failure from occurring in the
application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be
exceeded, even for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combustion.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in
case of over current and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal
pulse noise occurs from the wiring or load, causing a large current to continuously flow and the
breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case
of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location,
are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into
the design to prevent device malfunction or breakdown caused by the current resulting from the
inrush current at power ON or the negative current resulting from the back electromotive force at
power OFF. IC breakdown may cause injury, smoke or ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is
unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause
injury, smoke or ignition.
[4] Do not insert devices in the wrong orientation or incorrectly.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation
or incorrectly even just one time.
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Points to remember on handling of ICs
(1) Over current Protection Circuit
Over current protection circuits (referred to as current limiter circuits) do not necessarily protect
ICs under all circumstances. If the Over current protection circuits operate against the over current,
clear the over current status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings
can cause the over current protection circuit to not operate properly or IC breakdown before
operation. In addition, depending on the method of use and usage conditions, if over current
continues to flow for a long time after operation, the IC may generate heat resulting in breakdown.
(2) Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal
shutdown circuits operate against the over temperature, clear the heat generation status
immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings
can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation.
(3) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the
device so that heat is appropriately radiated, not to exceed the specified junction temperature (TJ)
at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat
radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown.
In addition, please design the device taking into considerate the effect of IC heat radiation with
peripheral components.
(4) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to
the motor’s power supply due to the effect of back-EMF. If the current sink capability of the power
supply is small, the device’s motor power supply and output pins might be exposed to conditions
beyond absolute maximum ratings. To avoid this problem, take the effect of back-EMF into
consideration in system design.
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RESTRICTIONS ON PRODUCT USE
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in this document, and related hardware, software and systems (collectively "Product") without notice.
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all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
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