TB6598FN_06

TB6598FN/FNG TENTATIVE TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic TB6598FN/FNG Dual Full-Bridge Driver for Stepping Motors The TB6598FN/FNG is a 2-phase bipolar stepping motor driver employing an LDMOS structure with low ON-resistance for output drive transistors. By applying four input signals (EN1, EN2, IN1, IN2), it is possible to control the rotation direction (forward/reverse) of 2-phase/1-2-phase stepper motor. It is also possible to achieve constant-current drive (PWM chopper drive). Features • • • • • • • • Motor supply voltage: VM ≤ 15 V (max) Control supply voltage: VCC = 2.7 V to 6 V Output current: Iout ≤ 0.8 A (max) Low ON-resistance: 1.5 Ω (upper side + lower side typ. @ VM = 5 V) Constant-current control (PWM chopper drive) Standby (power-saving) mode On-chip thermal shutdown circuit (TSD) Compact package: SSOP-16 TB6598FNG: TB6598FNG is a Pb-free product. The following conditions apply to solderability: *Solderability 1. Use of Sn-37Pb solder bath *solder bath temperature = 230°C *dipping time = 5 seconds *number of times = once *use of R-type flux 2. Use of Sn-3.0Ag-0.5Cu solder bath *solder bath temperature=245°C *dipping time = 5 seconds *the number of times = once *use of R-type flux Weight: 0.07 g (typ.) This product has a MOS structure and is sensitive to electrostatic discharge. When handling the product, ensure that the environment is protected against electrostatic discharge by using an earth strap, a conductive mat and an ionizer. Ensure also that the ambient temperature and relative humidity are maintained at reasonable levels. Install the product correctly. Otherwise, breakdown, damage and/or degradation in the product or equipment may result. 1 2006-3-6 TB6598FN/FNG Block Diagram GND 5 EN1 8 EN2 9 IN1 10 IN2 11 Timing Logic Pre-Drive Control Logic 3 AO1 H-Bridge B 1 AO2 2 RFA 12 OSC TSD 16 BO1 Vlim 7 Timing Logic Vref 0.6 V Band Gap Pre-Drive H-Bridge B 14 BO2 15 RFB VCC 6 13 V M OSC Vref 4 Some functional blocks, circuits, or constants may be omitted or simplified in the block diagram for explanatory purposes. Pin Functions Pin Name AO2 RFA AO1 Vref GND VCC Vlim EN1 EN2 IN1 IN2 OSC VM BO2 RFB BO1 Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Functional Description Output 2 (Ch. A) Winding current detection pin (Ch. A) Output 1 (Ch. A) Internal reference voltage Ground pin Small-signal power supply pin Winding current setting pin Enable input 1 Enable input 2 Control input 1 Control input 2 Internal oscillation frequency setting pin Motor power supply pin Output 2 (Ch. B) Winding current detection pin (Ch. B) Output 1 (Ch. B) Ch. B motor winding connection pin Connect an oscillator capacitor externally VM (ope) = 4.5 V to 13.5 V Ch. B motor winding connection pin VCC (ope) = 2.7 V to 5.5 V Icoil (A) = Vlimit (V)/external RF (Ω) Ch. A motor winding connection pin +0.6 V (typ.) Remarks Ch. A motor winding connection pin 2 2006-3-6 TB6598FN/FNG Truth Table 1 EN1 (EN2) L H L H L Forward IN1 (IN2) * H AO1 (BO1) OFF L AO2 (BO2) OFF H Mode ALL OFF Reverse “*” indicates “don’t care.” Truth Table 2 EN1 L L H H (Note) EN2 L H L H Operation (Note) Mode Standby Note: VINL (EN1 = EN2) < 0.5 V. = Operating Description The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. VCC 115uA 20 uA t2 1.2 V Charge ON OSC 40 kΩ Cosc Discharge ON 115 uA 0.8 V Oscillator circuit 20 k Ω t1 Vosc waveform • The internal oscillation frequency is determined by charging and discharging an external capacitor (Cosc). Vosc = 1 ∫ i dt , Cosc ∆Vosc = I× (t1 − t2)/Cosc, , ∆Vosc･Cosc 1 I fosc = = , 2 (t1 − t2) 2 ･∆Vosc･Cosc 1 1 （theoretical formula）. = = 2 × 0.4/115 µA × Cosc 6.957 × 10 3 × Cosc 1 t1 − t2 ＝ I 3 2006-3-6 TB6598FN/FNG • Chopper control The winding current flows while the output drive transistor is On. When the VRF reaches the limit voltage level (Vlimit), the comparator detects it and turns off the output drive transistor. The oscillator output is squared to generate an internal clock. The off timer starts on the edge of the internal clock and is active for two internal clocks. When the off timer stops, the PWM goes high. osc Internal clock Off timer 2-bit counter PWM output V limit Winding current chop on *2 *1 *2 *1 *2 *1 *2 *1 *1: Increase of current *2: Chopping of current The PWM control limits the winding current to a level determined by the current value (IO) as expressed in the equation below: IO = Vlimt/RNF. • PWM control function When PWM control is provided, normal operation and short brake operation are repeated. To prevent penetrating current, dead time t2 and t4 are provided in the IC. VM M M M RF t1 t2 = 400 ns (typ.) t3 M M t4 = 400 ns (typ.) t5 4 2006-3-6 TB6598FN/FNG Absolute Maximum Ratings (Ta = 25°C) Characteristics Power supply voltage Symbol VM VCC Input voltage Output current Power dissipation Operating temperature Storage temperature VIN IOUT PD Topr Tstg Rating 15 6 −0.2 to 6 0.8 0.78 (Note 1) −20 to 85 −55 to 150 V A W °C °C IN1, IN2, EN1 and EN2 pins Unit V Remarks Note 1: When mounted on a glass-epoxy PCB (50 mm × 30 mm × 1.6 mm, Cu area: 40%) The absolute maximum ratings of a semiconductor device are a set of specified parameter values that must not be exceeded during operation, even for an instant. If any of these ratings are exceeded during operation, the electrical characteristics of the device may be irreparably altered, in which case the reliability and lifetime of the device can no longer be guaranteed. Moreover, any exceeding of the ratings during operation may cause breakdown, damage and/or degradation in other equipment. Applications using the device should be designed so that no maximum rating will ever be exceeded under any operating conditions. Before using, creating and/or producing designs, refer to and comply with the precautions and conditions set forth in this document. Operating Range (Ta = −20 to 85°C) Characteristics Power supply voltage (VCC) Power supply voltage (VM) Output current Limit voltage OSC frequency Chopping frequency Symbol VCC VM IOUT Vlimit f osc fchop Min 2.7 2.5 ⎯ GND ⎯ 20 Typ. 3 5 ⎯ ⎯ ⎯ ⎯ Max 5.5 13.5 0.6 Vref 1 250 Unit V V A V MHz kHz 5 2006-3-6 TB6598FN/FNG Electrical Characteristics (unless otherwise specified, VCC = 3 V, VM = 12 V, Ta = 25°C) Characteristics Symbol Test Circuit 1 1 1 1 1 1 Test Condition 1ch ON EN1 = 0.8 V, EN2 = 2.0 V 2ch ON EN1 = EN2 = 2.0 V Standby mode EN1 = EN2 = 0.5 V 1ch ON, Output open EN1 = 0.8 V, EN2 = 2.0 V 2ch ON, Output open EN1 = EN2 = 2.0 V Standby mode EN1 = EN2 = 0.5 V Min Typ. Max Unit ICC1 ICC2 ICC3 Supply current IM1 IM2 IM3 VINH Input voltage VINL1 VINL2 Control circuit Hysteresis voltage Input current VIN (HIS) IINH IINL Output saturating voltage Output constant-current detection level Reference voltage Reference voltage current capacity Input current at winding current setting pin Output leakage current Vsat (U + L) VRF Vref Iref IIN (limit) IL (U) IL (L) Diode forward voltage Oscillation frequency Capacitor charge current Capacitor discharge current Thermal shutdown circuit operating temperature Thermal shutdown hysterisis VF (U) VF (L) f osc IC1 IC2 TSD ∆TSD ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2 −0.2 1.4 1.4 7 1.9 1.9 ⎯ ⎯ ⎯ ⎯ 0.2 15 ⎯ 0.3 0.9 0.6 0.6 ⎯ ⎯ ⎯ ⎯ 1 1 530 115 115 170 20 3 3 15 3.0 mA mA µA mA 3.0 1 VCC + 0.2 0.8 V 0.5 µA 2 2 2 ⎯ 2 2 3 4 5 5 6 7 7 8 9 10 11 11 ⎯ (Design target value) ⎯ Standby mode (Design target value) VIN = 3 V VIN = GND IO = 0.2 A IO = 0.6 A RRF = 0.1 Ω, Vref = 0.6 V No load Source (∆Vref = 50 mV) Vlimit = GND V M = 15 V IO = 0.6 A IO = 0.6 A Cosc = 220 pF Vosc = 0 V Vosc = 2 V −0.2 ⎯ 5 ⎯ ⎯ ⎯ 0.565 0.57 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 430 ⎯ ⎯ ⎯ ⎯ ⎯ 30 1 0.4 V 1.2 0.635 0.63 100 1 1 1 1.2 V 1.2 630 ⎯ ⎯ ⎯ ⎯ kHz µA µA °C °C V V µA µA µA µA µA 6 2006-3-6 TB6598FN/FNG Test Circuit 1: ICC1, ICC2, ICC3, IM1, IM2, IM3 1 AO2 2 RFA 3 AO1 4 Vref 1Ω 5 GND 6 VCC ICC A 8 EN1 3.0 V 0.8 V, 2.0 V, 0.5 V 7 Vlim BO1 16 RFB 15 BO2 14 IM OSC 12 IN2 11 IN1 10 EN2 9 2.0 V, 2.0 V, 0.5 V 1Ω VM 13 A 12 V ICC1, IM1: EN1 = 0.8 V, EN2 = 2.0 V ICC2, IM2: EN1 = 2.0 V, EN2 = 2.0 V ICC3, IM3: EN1 = 0.5 V, EN2 = 0.5 V 7 2006-3-6 TB6598FN/FNG Test Circuit 2: VINH, VINL1, VINL2, IINH, IINL 100 kΩ 100 kΩ 100 kΩ VB02 100 kΩ 100 kΩ 1Ω 100 kΩ VA01 VA02 VB01 100 kΩ 100 kΩ 1 AO2 2 RFA 3 AO1 4 Vref 1Ω 5 GND 6 VCC 7 Vlim 3.0 V 8 EN1 BO1 16 RFB 15 BO2 14 VM 13 12 V OSC 12 IN2 11 IN1 10 EN2 9 IINL A A 8 2006-3-6 VINH VINL IINH TB6598FN/FNG Test Circuit 3: VSAT (U + L) VO (Note1) VO (Note1) 1 AO2 RL (Note2) V 2 RFA 3 AO1 4 Vref 5 GND 6 VCC 7 Vlim 8 EN1 3V BO1 16 RFB 15 BO2 14 VM 13 OSC 12 IN2 11 IN1 10 EN2 9 RL (Note2) V Note1: VSAT (U + L) =12 − VO Note2: Calibrate IO to 0.2 A / 0.6 A by RL. Test Circuit 4: VRF 5 mH 1 AO2 1Ω 1Ω 2 RFA 3 AO1 4 Vref 5 GND 6 VCC 7 Vlim 8 EN1 BO1 16 RFB 15 BO2 14 VM 13 220 pF OSC 12 IN2 11 IN1 10 EN2 9 1Ω 1Ω 5 mH V 12 V V 12 V 9 2006-3-6 TB6598FN/FNG Test Circuit 5: Vref, Iref 1 AO2 2 RFA 3 AO1 SW (Note) 0.1 µF 4 Vref 5 GND 6 VCC 100 µA 7 Vlim 8 EN1 3V BO1 16 RFB 15 BO2 14 VM 13 220 pF 12 V OSC 12 IN2 11 IN1 10 EN2 9 Vref Note: 1. Vref: SW = OFF 2. Iref: The Vref voltage descent at the time of SW = ON checks below 50 mV. Test Circuit 6: IIN (limit) 1 AO2 2 RFA 3 AO1 4 Vref 5 GND 6 VCC 7 Vlim 8 EN1 A 3V BO1 16 RFB 15 BO2 14 VM 13 OSC 12 IN2 11 IN1 10 EN2 9 12 V V 10 2006-3-6 TB6598FN/FNG Test Circuit 7: IL (U), IL (L) IL (U) IL (U) IL (U) IL (U) A A A A IL (L) IL (L) IL (L) A A 1 AO2 2 RFA 3 AO1 4 Vref 5 GND 6 VCC 7 Vlim 8 EN1 BO1 16 RFB 15 BO2 14 V M 13 220 pF OSC 12 IN2 11 IN1 10 EN2 9 A A Test Circuit 8: VF (U) 1 AO2 2 RFA 0.6 A 3 AO1 4 Vref 5 GND 6 VCC 7 Vlim 8 EN1 BO1 16 RFB 15 BO2 14 V M 13 OSC 12 IN2 11 IN1 10 EN2 9 V 0.6 A V IL (L) 15 V 11 2006-3-6 TB6598FN/FNG Test Circuit 9: VF (L) 1 AO2 0.6 A 2 RFA V VF (L) 3 AO1 4 Vref 5 GND 6 VCC 7 Vlim 8 EN1 RFB 15 BO2 14 V M 13 OSC 12 IN2 11 IN1 10 EN2 9 V VF (L) BO1 16 0.6 A Test Circuit 10: fOSC 1 AO2 2 RFA 3 AO1 4 Vref 5 GND 6 VCC 7 Vlim 8 EN1 3V BO1 16 RFB 15 BO2 14 VM 13 220 pF OSC 12 IN2 11 IN1 10 EN2 9 F.C 12 V 12 2006-3-6 TB6598FN/FNG Test Circuit 11: IC1, IC2 12 V IC2 IC1 A A 0.65 V 1.35 V 1 AO2 2 RFA 3 AO1 4 Vref 5 GND 6 VCC 7 Vlim 8 EN1 BO1 16 RFB 15 BO2 14 VM 13 OSC 12 IN2 11 IN1 10 EN2 9 13 2006-3-6 TB6598FN/FNG Application Circuit Example 3V VDD 3 V to 5 V (Note 1) VM (Note 1) VM VCC AO1 M EN1 EN2 MCU IN1 IN2 TB6598FNG BO1 M BO2 RFB AO2 RFA GND GND Vref Vlim OSC (Note 1) (Note 1) Note 1: Noise suppression capacitors and oscillator capacitors should be connected as close as possible to the IC. Note 2: Utmost care is necessary in the design of the output, VCC, VM, and GND lines since the IC may be destroyed by short-circuiting between outputs, air contamination faults, or faults due to improper grounding, or by short-circuiting between contiguous pins. 14 2006-3-6 TB6598FN/FNG Package Dimensions Weight: 0.07 g (typ.) 15 2006-3-6 TB6598FN/FNG Notes on Contents 1. Block Diagrams Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. Timing charts may be simplified for explanatory purposes. The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. 2. Equivalent Circuits 3. Timing Charts 4. Application Circuits 5. Test Circuits IC Usage Considerations Notes on handling of ICs [1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. [4] Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time. 16 2006-3-6 TB6598FN/FNG Points to remember on handling of ICs (1) Thermal Shutdown Circuit Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation. (2) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (TJ) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (3) Back-EMF When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design. 17 2006-3-6 TB6598FN/FNG 18 2006-3-6