TB6674FAG
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TB6674FAG
Stepping Motor Driver IC
TB6674FAG is a stepping motor driver IC with MOS output
transistors.
The IC can control two-phase stepping motor forward and reverse
by bipolar driving. A power-saving circuit and a standby circuit are
included.
SSOP16-P-225-1.00A
Features
One-chip two-phase bipolar stepping motor driver (including two
bridge drivers)
Weight: 0.14 g (Typ.)
Power saving operation is available.
Standby operation is available.
Current consumption ≤ 20 μA (typ.)
Built-in punch-through current restriction circuit for system reliability and noise suppression.
TTL-compatible inputs INA, INB, PS, and Vs2B terminals
ON resistance PS = L : 2.9 Ω (Typ.)
PS = H: 7.9 Ω (Typ.)
High driving ability.
: IO (START) 100 mA (MAX) : VS1 ENABLE
: IO (HOLD) 50 mA (MAX)
Typical PKG
SSOP16 pin
: VS2 ENABLE
Over current shutdown circuit (ISD).
Thermal shutdown circuit (TSD).
Under voltage lockout circuit (UVLO).
Pull-down resistance for input terminal (250 kΩ).
© 2014 TOSHIBA Corporation
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TB6674FAG
Block Diagram
(B-ch)
Bridgelogic
driverand
Control
Bridge driver
(A-ch)
Control logic and
Bridge driver
Pin Description
Pin No.
Symbol
Functional Description
1
VS2A
Low-voltage power supply terminal
2
VCC
Power voltage supply terminal for control
3
IN A
A-ch forward rotation / reverse rotation signal input
terminal, Truth Table 1
4
GND
GND terminal (Logic GND)
5
GND
GND terminal (Logic GND)
6
IN B
B-ch forward rotation / reverse rotation signal input
terminal, Truth Table 1
7
PS
8
VS2B
Standby signal input terminal, Truth Table 2
9
VS1B
High-voltage power supply terminal
10
ΦB
Output B
11
ΦB
Output B
12
GND
GND terminal (Power GND)
13
GND
GND terminal (Power GND)
14
ΦA
Output Α
15
ΦA
Output A
16
VS1A
Power saving signal input terminal
High-voltage power supply terminal.
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TB6674FAG
Truth Table 1.
Input
Output
PS
IN
Φ
Φ
Mode
L
L
L
H
ENABLE VS1
L
H
H
L
ENABLE VS1
H
L
L
H
ENABLE VS2 (Power saving)
H
H
H
L
ENABLE VS2 (Power saving)
Truth Table 2.
VS2B
Mode
L
POWER OFF (Standby mode)
H
OPERATION
Note: Apply 5 V to VS2A as a supply terminal.
Input terminal
(INA, INB, PS, and VS2B)
Vcc
250 kΩ
15 kΩ
The diagram is partly-provided and omitted or simplified for explanatory purposes.
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TB6674FAG
Absolute Maximum Ratings (Ta = 25°C)
Characteristic
Symbol
Rating
VCC
6.0
VS1
24.0
VS2
Up to VCC
IO (PEAK)
±200
IO (START)
±100
IO (HOLD)
±50
Input voltage
VIN
Up to VCC
V
Power dissipation
PD
0.78 (Note)
W
Operating temperature
Topr
-30 to 75
°C
Storage temperature
Tstg
-55 to 150
°C
Supply voltage
Output current
Unit
V
mA
Note: This value is obtained if mounting is on a 50 mm × 50 mm × 1.6 mm PCB, 40 % or more of which is occupied
by copper.
Operating Conditions (Ta = 25°C)
Characteristic
Symbol
Min
Typ.
Max
VCC
4.5
－
5.5
VS1
8.0
－
22.0
VS2A
2.7
－
5.5
Output current
IO
－
－
±100
mA
Input voltage
VIN
0
－
VCC
V
Maximum frequency of input pulse
fIN
－
－
25
kHz
Minimum resolution of input pulse
tw
20
－
－
μs
Supply voltage
Unit
V
Value of ON resistance tends to increase when the difference between Vs1 and Vs2A becomes 5 V or less.
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TB6674FAG
Electrical Characteristics (Unless otherwise specified, Ta = 25°C, VCC = 5 V, VS1 = 12 V,
and VS2A = 5 V)
Characteristic
Symbol
Test
Cir−
cuit
ICC1
Supply current
ICC2
1
ICC3
High
Input voltage
Low
Input hysteresis voltage*
Input current
Diode forward voltage
Delay time
Thermal shutdown circuit*
TSD hysteresis *
Min
Typ.
Max
PS: H, VS2B: H
―
3
5
PS: L, VS2B: H
―
3
5
VS2B: L
―
1
20
2.0
―
Vcc
-0.2
―
0.8
―
90
―
mV
INA, INB, PS, VS2B
VIN = 5.0 V
Built in pull-down resistance.
5
20
38
μA
VIN = 0 V
―
―
1
μA
VIN H
VIN L
VINhys
IIN (H)
―
INA, INB, PS, VS2B
1
1
IIN (L)
Output ON resistance
Test Condition
Ron 1H
2
PS: L, VS2B: H
IOUT = 200 mA
―
2
5
Ron 2H
3
PS: H, VS2B: H
IOUT = 50 mA
―
7
16
Ron L
2
VS2B: H
IOUT = 200 mA
―
0.9
3.5
4
IF = 350 mA, PS = L
―
1.2
2.5
―
1.0
2.2
―
IN − Φ
TSD
―
TSDhys
―
VF U
VF L
tpLH
tpHL
Unit
mA
μA
V
Ω
V
―
0.5
―
―
0.5
―
(Design target only)
―
160
―
°C
(Design target only)
―
20
―
°C
μs
*: Toshiba does not implement testing before shipping.
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TB6674FAG
Under voltage Lockout Circuit (UVLO)
An under voltage lockout circuit is included.
Outputs are turned off (Hi-Z) under the conditions as follows;
VCC ≤ 4.0 V (Design target) or
VS1A ≤ 6.0 V (Design target) and VS1B ≤ 6.0 V (Design target) or
VS2A ≤ 2.2 V (Design target)
The UVLO circuit has a hysteresis and the function recovers under the conditions as follows;
VCC = 4.1 V (Design target), VS1A/ VS1B = 6.5 V (Design target), VS2A = 2.3 V (Design target)
Vcc voltage
4.1 V (design target only)
4.0 V (design target only)
UVLO operation
H
UVLO internal signal
Output pin
L
H
L
Normal operation
OFF (Hi-Z)
VS1A, VS1B voltage
6.5 V (design target only)
6.0 V (design target only)
UVLO operation
H
UVLO internal signal
Output pin
L
H
L
Normal operation
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OFF (Hi-Z)
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TB6674FAG
VS2A voltage
2.3 V (design target only)
2.2 V (design target only)
UVLO operation
H
UVLO internal signal
L
H
Output pin
L
Normal operation
7
OFF (Hi-Z)
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TB6674FAG
Over Current Protection (ISD) Circuit
The IC has the over current protection circuit that monitors the current flowing through each output
power transistor. If a current, which is out of the detecting current, is sensed at any one of these
transistors, all output transistors are turned off (Hi-Z). (However, ISD is not included in upper PchDMOS
when PS is high level (Vs2A is 5 V usage) because ON resistance is large.
Masking time is 20 μs. The operation does not recover automatically (latch method). There are two
recovery methods written below.
(1) Power monitor turns on when any of the power supply decreases and reaches the specified voltage.
(2) Vs2B is set low level for 20 μs or more and then set high. The operation recovers in 10 μs.
Reference design target of detecting current is as follows;
PS = L, VS1A (12 V) :PchDMOS = 1.1 A
PS = H/PS = L in common :Lower NchDMOS = 1.4 A
Please reduce the external noise to prevent malfunction for ISD.
ISD detecting value
Output current
0
20 μs
(Design target)
ISD internal signal
OFF time
H
L
20 μs
(Design target)
10 μs
(Design target)
VS2B
Operation recovers by
one of two cases.
Power monitoring: ON
UVLO (Power monitor)
)
Power monitoring: OFF
Power monitoring: ON
Output terminal
Normal operation
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OFF (Hi-Z)
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TB6674FAG
Thermal Shutdown Circuit (TSD)
The TB6674FAG has a thermal shutdown circuit. If the junction temperature (Tj) exceeds 160°C (design
target only), all the outputs are tuned off (Hi-Z).
It recovers automatically at 140°C. It has a hysteresis width of 20°C.
TSD = 160°C (design target only)
< TSD operation >
160°C (typ.)
Chip temperature
140°C (typ.)
TSD operation
Internal TSD signal
H
L
H
Output terminal
L
Normal operation
9
OFF (Hi-Z)
2014-10-15
TB6674FAG
Test Circuit 1.
ICC1, ICC2, ICC3, IIN A, IIN B, and IPS
Measuring method
16
2
15
3
14
4
5
6
TB6674FAG
1
13
12
11
7
10
8
9
Item
SW 1
SW 2
SW 3
SW 4
ICC1
b
b
a
a
ICC2
b
b
b
a
ICC3
b
b
―
b
IIN A
a
―
―
a
IIN B
―
a
―
a
IPS
―
―
a
a
All terminals of INA, INB, and PS should output low or be connected to the ground terminal in measuring ICC3.
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TB6674FAG
Ron 1H1, Ron 1H2, Ron L2, and Ron L3
1
16
2
15
3
14
4
5
6
*:
TB6674FAG
Test Circuit 2.
13
12
11
7
10
8
9
Adjust RL to correspond to IL.
Item
VSAT 1H1
VSAT 1H2
VSAT L2
VSAT L3
SW 1
SW 2
SW 3
SW 4
a
―
b
―
―
a
―
b
c
a
―
a
b
―
―
a
―
b
c
a
―
b
b
―
―
a
SW 5
IL (mA)
a
100
a
400
b
100
b
400
a
b
b
―
b
d
b
d
a
c
―
b
d
a
―
b
b
―
―
a
―
b
b
a
c
d
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TB6674FAG
Ron 2H1, Ron 2H2, and Ron L1
1
16
2
15
3
14
TB6674FAG
Test Circuit 3.
4
5
6
*:
13
12
11
7
10
8
9
Adjust RL to correspond to IL.
Item
VSAT 2H1
VSAT 2H2
VSAT L1
SW 1
SW 2
SW 3
SW 4
a
―
b
―
―
a
―
b
d
a
―
a
b
―
―
a
―
b
d
a
―
b
b
―
―
a
―
b
SW 5
IL (mA)
a
20
a
100
b
20
a
a
a
a
b
c
b
c
a
c
d
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TB6674FAG
Test Circuit 4.
VF U, and VF L
16
2
15
3
4
5
6
TB6674FAG
TB6674PG,/FG/FAG
1
Item
SW 1
a
14
VF U
13
b
c
a
11
10
8
9
e
d
12
7
SW 2
VF L
e
b
c
d
Timing Chart (two-phase excitation)
tpLH : 0.5μs (typ.)
tpHL : 0.5μs (typ.)
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TB6674FAG
Thermal Performance Characteristics
TB6674FAG
Mounting on a PCB of 50 mm
x 50 mm x 1.6 mm, 40% or
more of which is occupied by
copper
Power Dissipation
PD (W)
Thermal resistance
Rth(j-a)=160°C/W
Ambient Temperature
Ta (°C)
Application Circuit
3
6
7
15
8
9
16
1
2
10
TB6674FAG
14
11
4
5
12
13
Note 1: Connect the VS2A terminal to the lower supply voltage (5 V).
Note 2: Supply smoothing capacitor* should be connected between each supply terminal (Vcc, VS2A, and VS1A/B)
and GND terminal. *: (Ex.): Capacitors of tens of μF and 0.1 μF which are connected in parallel.
Note 3: Utmost care is necessary in the design of the output, VCC, VS1A/B, and GND lines since the IC may be
destroyed by short-circuiting between outputs, air contamination faults, or faults due to improper grounding,
or by short-circuiting between contiguous terminals.
Note 4: By our short-circuited examination of neighboring terminals, when 9 and 10 terminals or 15 and 16 terminals
are short-circuited, the TB6674FAG might to be destroyed and cause the trouble of smoking etc. Please use
an appropriate fuse to the power supply line.
Note 5: Connect VS1A terminal and VS1B terminal externally.
Note 6: Connect each GND terminal externally.
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TB6674FAG
Package Dimensions
Unit: mm
Weight: 0.14 g (Typ.)
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TB6674FAG
Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified
for explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for
explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough
evaluation is required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of
application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These
components and circuits are not guaranteed to prevent malfunction or failure from occurring in the
application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be
exceeded, even for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combustion.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in
case of over current and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal
pulse noise occurs from the wiring or load, causing a large current to continuously flow and the
breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case
of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location,
are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into
the design to prevent device malfunction or breakdown caused by the current resulting from the
inrush current at power ON or the negative current resulting from the back electromotive force at
power OFF. IC breakdown may cause injury, smoke or ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is
unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause
injury, smoke or ignition.
[4] Do not insert devices in the wrong orientation or incorrectly.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation
or incorrectly even just one time.
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TB6674FAG
Points to remember on handling of ICs
(1) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the
device so that heat is appropriately radiated, not to exceed the specified junction temperature (Tj) at
any time and condition. These ICs generate heat even during normal use. An inadequate IC heat
radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown.
In addition, please design the device taking into considerate the effect of IC heat radiation with
peripheral components.
(2) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to
the motor’s power supply due to the effect of back-EMF. If the current sink capability of the power
supply is small, the device’s motor power supply and output terminals might be exposed to
conditions beyond absolute maximum ratings. To avoid this problem, take the effect of back-EMF
into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
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TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
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responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
APPLICATIONS.
• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH
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limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for
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Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES
OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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