TB67H400AFTG
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TB67H400AFTG
PWM Chopper-Type Brushed DC Motor driver
The TB67H400AFTG is brushed DC motor driver of a PWM chopper-type.
The TB67H400AFTG is a dual channel H-SW driver which can control two
brushed DC motors. Moreover, the parallel control function (Large mode) of an
output part is built in, and 1ch high current drive is also possible. Fabricated
with the BiCD process, the TB67H400AFTG is rated at 50 V, 4.0 A (2ch)/8.0 A
(1ch).
P-WQFN48-0707-0.50-003
Weight: 0.10 g (typ.)
Features
Monolithic motor driver using BiCD process.
Capable of controlling two brushed DC motor.
2 drive modes (PWM controlled constant current/ direct PWM)
4 operation modes (Clock-wise/Counter clock-wise/Brake/Stop (Off))
Low on-resistance output stage (High side+Low side:0.49 Ω (typ.))
High voltage and current (for specification, please refer to absolute
maximum ratings and operating ranges.)
Built-in error detection circuits (Thermal shutdown (TSD), over-current
detection (ISD), and power-on reset (POR)).
The VCC regulator for internal circuit operation is built in.
Able to customize PWM (internal chopping) frequency by external
components.
Note: Please be careful about the thermal conditions during use.
©2016 TOSHIBA CORPORATION
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TB67H400AFTG
NC
OUTB+
OUTB+
NC
RSB
RSB
NC
VM
NC
VCC
NC
NC
Pin assignment
36 35 34 33 32 31 30 29 28 27 26 25
NC
37
24 NC
NC
38
23 NC
NC
39
22 GND
GND
40
21 OUTB-
VREF
41
20 OUTB-
TB67H400AFTG
(Top View)
19 GND
45
16 OUTA-
PWMA
46
15 GND
PWMB
47
14 NC
NC
48
13 NC
5
6
7
8
9 10 11 12
NC
4
OUTA+
3
18 GND
OUTA+
2
NC
1
RSA
INA2
NC
17 OUTA-
RSA
44
GND
INA1
TBLKAB
43
INB2
OSCM
INB1
42
NC
HBMODE
Note: Please connect the WQFN package corner pad and the exposed pad to the PCB ground pattern.
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TB67H400AFTG
Block diagram
INA1
INA2
Standby
Control
+
Blank time
Selector
+
H-Bridge
Mode select
+
Signal Decode
Logic
INB1
INB2
PWMA
PWMB
TBLKAB
OSC-Clock
Converter
Motor
Oscillator
System
Oscillator
VCC
Regulator
VCC
VM
Power-on
Reset
Current
Level
Set
OSCM
Current
Reference
Setting
VREF
HBMODE
Current
Comp
Motor Control Logic
Predriver
TSD
Current
Comp
Predriver
RSA
RSB
ISD
H-bridge
H-bridge
GND
Please note that in the block diagram, functional blocks or constants may be omitted or simplified for explanatory
purposes.
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TB67H400AFTG
Notes:
All the grounding wires of the TB67H400AFTG must run on the solder mask of the PCB. It must also be externally
terminated at a single point. Also, the grounding method should be considered for efficient heat dissipation.
Careful attention should be paid to the layout of the output, VM and GND traces, to avoid short circuits across output
pins or to the power supply or ground. If such a short circuit occurs, the device may be permanently damaged.
Also, the utmost care should be taken for pattern designing and implementation of the device since it has power
supply pins (VM, RS, OUT, and GND) through which a particularly large current may run. If these pins are wired
incorrectly, an operation error may occur or the device may be destroyed.
The logic input pins must also be wired correctly. Otherwise, the device may be damaged owing to a current running
through the IC that is larger than the specified current. Careful attention should be paid to design patterns and
mountings.
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TB67H400AFTG
Pin description
TB67H400AFTG (WQFN48)
Pin No.1-28
Pin No.
Pin name
Function
1
NC
2
INB1
Motor Bch IN1 signal input pin
3
INB2
Motor Bch IN2 signal input pin
4
TBLKAB
5
GND
6
NC
7
RSA(*)
Motor Ach output current sense pin
8
RSA(*)
Motor Ach output current sense pin
9
NC
10
OUTA+(*)
Motor Ach+ output pin
11
OUTA+(*)
Motor Ach+ output pin
12
NC
Non connection
13
NC
Non connection
14
NC
Non connection
15
GND
16
OUTA-(*)
Motor Ach- output pin
17
OUTA-(*)
Motor Ach- output pin
18
GND
Ground pin
19
GND
Ground pin
20
OUTB-(*)
Motor Bch- output pin
21
OUTB-(*)
Motor Bch- output pin
22
GND
23
NC
Non connection
24
NC
Non connection
25
NC
Non connection
26
OUTB+(*)
Motor Bch+ output pin
27
OUTB+(*)
Motor Bch+ output pin
28
NC
Non connection
Motor Ach and Bch Digital tBLK setting pin
Ground pin
Non connection
Non connection
Ground pin
Ground pin
Non connection
Please do not connect any pattern to the NC pin.
* Please connect the pins with the same names, at the nearest point of the device.
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TB67H400AFTG
Pin No.29-48
Pin No.
Pin name
Function
29
RSB(*)
Motor Bch output current sense pin
30
RSB(*)
Motor Bch output current sense pin
31
NC
Non connection
32
VM
Motor Voltage supply pin
33
NC
Non connection
34
VCC
35
NC
Non connection
36
NC
Non connection
37
NC
Non connection
38
NC
Non connection
39
NC
Non connection
40
GND
Ground pin
41
VREF
Motor output current setting pin
42
HBMODE
43
OSCM
Oscillator frequency setting pin
44
INA1
Motor Ach IN1 signal input pin
45
INA2
Motor Ach IN2 signal input pin
46
PWMA
Motor Ach short brake signal input pin
47
PWMB
Motor Bch short brake signal input pin
48
NC
Internal regulator voltage monitor pin
H-Bridge operation mode setting pin
Non connection
Please do not connect any pattern to the NC pin.
* Please connect the pins with the same names, at the nearest point of the device.
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TB67H400AFTG
INPUT/OUTPUT Equivalent circuit
INA1
INA2
PWMA
INB1
INB2
PWMB
TBLKAB
HBMODE
Input/Output signal
Equivalent circuit
1kΩ
Logic
Input
Digital input (VIH/VIL)
100kΩ
Pin name
VIH: 2.0 V (min) to 5.5 V (max)
VIL: 0 V (min) to 0.8 V (max)
GND
VCC
VCC
VREF
VCC regulator specification
4.75 V (min) to 5.0 V (typ.) to 5.25 V
(max)
1kΩ
VREF
VREF input voltage range
0 V to 4.0 V
GND
OSCM setup frequency
0.64 MHz (min) to 1.12 MHz (typ.) to
2.4 MHz (max)
500Ω
OSCM
1kΩ
OSCM
GND
RS
OUTA+
OUTAOUTB+
OUTBRSA
RSB
VM operation range
10 V (min) to 47 V (max)
OUT+
OUTPUT pin voltage range
10 V (min) to 47 V (max)
OUT-
GND
Please note that in the equivalent input circuit, functional blocks or constants may be omitted or simplified for
explanatory purposes.
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TB67H400AFTG
Function mode (Small Mode condition)
Logic input function table
(1) INA1, INA2
These pins set the drive mode for Motor A ch.
PWMA
L
H
L
INPUT
H
L
H
L
H
INA1
INA2
OUTA+
OUTA-
Function
STANDBY MODE
(Note)
STOP (OFF)
L
L
OFF (Hi-Z)
OFF (Hi-Z)
L
H
L
L
L
H
H
L
L
L
Short brake
CCW (Counter
clock-wise)
Short brake
H
L
CW (Clock-wise)
H
H
L
L
Short brake
Function
STANDBY MODE
(Note)
STOP (OFF)
(2) INB1, INB2
These pins set the drive mode for Motor B ch.
PWMB
L
H
L
INPUT
H
L
H
L
H
INB1
INB2
OUTB+
OUTB-
L
L
OFF (Hi-Z)
OFF (Hi-Z)
L
H
L
L
L
H
H
L
L
L
Short brake
CCW (Counter
clock-wise)
Short brake
H
L
CW (Clock-wise)
H
H
L
L
Short brake
Note: The standby mode is only enabled when all 6 logic input pins (INA1, INA2, PWMA, INB1, INB2, and PWMB)
are set to Low level.
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TB67H400AFTG
(3) TBLKAB
This pin will set the noise rejection time.
TBLKAB
TBLK noise rejection time
L
Digital tBLK = fOSCM × 4 clk
H
Digital tBLK = fOSCM × 6 clk
Synchronous delay
IN1/IN2
OSCM
TBLK
count
Digital tBLK
signal
(TBLKAB=L)
Digital tBLK
signal
(TBLKAB=H)
0
1
2
3
5
4
6
Digital tBLK
Digital tBLK
Please note that the timing charts or constants may be omitted or simplified for explanatory.
* The Digital tBLK is used to avoid error judgment of varistor recovery current that occurs in charge drive mode when
H-bridges are used with DC motors. The Digital tBLK time can be controlled with TBLKAB pin.
By setting Digital tBLK, direct PWM control and constant current control is possible, but the motor current will rise
above the predefined current level (NF) while digital tBLK is active.
* Besides Digital tBLK, Analog tBLK (400 ns (typ.)) settled by an internal constant of IC is also attached.
Digital tBLK timing for Brushed DC Motor
IN1
IN2
Iout
Digital tBLK
The Digital tBLK is inserted at the beginning of each charge period of the constant current chopping, and also when
either of INA1, INA2, INB1, or INB2 is switched.
Please note that the timing charts or constants may be omitted or simplified for explanatory.
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TB67H400AFTG
(4) HBMODE
This pin sets the H-Bridge operation mode.
Pin name
Function
Input
Setting
HBMODE
H-Bridge
operation setting
L
Small mode
H
Large mode
Note: When using the Large mode, please make sure that the impedance between A channel and B channel is
balanced. Also, make sure that the output pins (OUTA+ and OUTA-, OUTB+ and OUTB-), RS pins (RSA and
RSB) are connected to each other when using the Large mode.
Note: Please set the HBMODE to Low or High with the PCB pattern. (Do not change the logic input level during
operation.)
Note: When the HBMODE pin is set to High level, the motor control will be controlled by the Ach inputs (INA1, INA2,
and PWMA). The Bch inputs (INB1, INB2, and PWMB) will be invalid. (When using the TB67H400AFTG in the
Large mode, setting the INB1, INB2, and PWMB to Low level is preferred.) TBLKAB pin is effective in both
Small and Large modes (HBMODE=L/H).
H-Bridge connection example in each mode
2 Small DC motor operation setting example (HBMODE=L)
H-Bridge A
VM
H-Bridge B
RRS
OUTA+
VM
RRS
OUTA-
OUTB+
OUTBLoad
Load
2 Small DC Motor operation
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TB67H400AFTG
1 Large DC motor operation setting example (HBMODE=H)
VM
RRS
H-Bridge A
OUTA+
H-Bridge B
OUTB+
OUTA-
OUTB-
Load
1 Large DC Motor operation
Please note that in the equivalent input circuit, functional blocks or constants may be omitted or simplified for
explanatory purposes.
DC Small mode: H-Bridge A and B will operate separately (for two brushed DC motor operation)
DC Large mode: H-Bridge A and B will operate as a single H-Bridge. (for one brushed DC motor operation)
* When the HBMODE is set to High level (Large mode), the pin function will be as follows.
Pin
HBMODE=H (Large mode)
INA1
INL1
INA2
INL2
PWMA
PWML
PWMB
INB1
INB2
TBLKAB
RSA
RSB
OUTA+
OUTAOUTB+
OUTB-
Don’t care (Motor will be
Controlled by INL1, INL2, and PWML pins)
TBLKL
RSL
OUTL+
OUTL-
Note: Please connect the “RSA and RSB”, “OUTA+ and OUTA-“, and “OUTB+ and OUTB-“when using the Large mode
operation.
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TB67H400AFTG
Motor control (constant current control)
Current waveform of Mixed Decay Mode, and a setting
In the case of constant current control, the rate of Mixed Decay Mode which determines the current ripple is fixed to 37.5%.
1/fchop
Internal
OSC waveform
IOUT
MDT (Mixed Decay Timing):37.5% fixed
NF detect
Setting
current value
37.5% Mixed Decay Mode
Charge Mode → NF detect → Slow Mode → Mixed Decay
Timing → Fast Mode → Charge Mode
6clk / 16clk
= 37.5% fchop
fchop 1 cycle: 16clk
Mixed Decay Mode current waveform
1/fchop
1/fchop
Internal
OSC waveform
37.5% Mixed Decay Mode
Setting
current value
NF detect
NF detect
IOUT
MDT (Mixed Decay Timing): 37.5% fixed
Please note that the timing charts or constants may be omitted or simplified for explanatory.
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TB67H400AFTG
Current waveform in Mixed (Slow + Fast) Decay Mode
When a current value increases (Mixed Decay point is fixed to 37.5%)
1/fchop
1/fchop
1/fchop
1/fchop
Internal OSC
waveform
NF
Setting
current value
Setting
current value
NF
NF
Slow
Charge
Fast
Charge
NF
Slow
Fast
Slow
Charge
Fast
Charge
Slow
Fast
When a current value decreases (Mixed Decay timing = 37.5%)
1/fchop
1/fchop
1/fchop
1/fchop
Internal OSC
waveform
Setting
current value
NF
Slow
Charge
The IC enters Charge mode for a moment at which
the internal RS comparator compares the values.
The IC immediately enters Slow Decay mode
because of the current value exceeding the
predefined current level.
NF
Fast
NF
Slow
Charge
Fast
Setting
current value
Charge
Slow
NF
Fast
Charge
NF
Slow
Fast
Charge
The Charge period starts as the internal oscillator clock starts counting. When the output current reaches the
predefined current level, the internal RS comparator detects the predefined current level (NF); as a result, the IC
enters Slow Decay mode.
The TB67H400AFTG transits from Slow Decay mode to Fast Decay mode at the point 37.5% of a PWM frequency
(one chopping frequency) remains in a whole PWM frequency period (on the rising edge of the 11th clock of the
OSCM clock).
When the OSCM pin clock counter clocks 16 times, the Fast Decay mode ends; and at the same time, the counter is
reset, which brings the TB67H400AFTG into Charge mode again.
Note: These figures are intended for illustrative purposes only. If designed more realistically, they would show
transient response curves.
Please note that the timing charts or constants may be omitted or simplified for explanatory.
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TB67H400AFTG
Output transistor operation mode
VM
RRS
RRS
RS Pin
U1
VM
VM
RRS
RS Pin
RS Pin
U2
U1
U2
U1
U2
OFF
OFF
OFF
OFF
ON
L1
L2
L1
OFF
ON
ON
ON
Load
Load
L2
ON
ON
L2
OFF
Fast mode
The energy of the motor coil
is fed back to the power
Slow mode
A current circulates around the
motor coil and this device.
Charge mode
A current flows into the motor coil.
Load
L1
Output transistor operational function
MODE
U1
U2
L1
L2
CHARGE
ON
OFF
OFF
ON
SLOW
OFF
OFF
ON
ON
FAST
OFF
ON
ON
OFF
Note: The parameters shown in the table above are examples when the current flows in the directions shown in the
figures above.
For the current flowing in the reverse direction, the parameters change as shown in the table below.
VM
VM
RRS
VM
RRS
RS pin
RRS
RS pin
U1
U2
U1
U2
U1
OFF
ON
OFF
OFF
ON
L2
L1
Load
L1
ON
OFF
Load
L2
ON
ON
Slow mode
A current circulates around the
motor coil and this device.
Charge mode
A current flows into the motor coil.
RS pin
U2
OFF
Load
L1
L2
ON
OFF
Fast mode
The energy of the motor coil
is fed back to the power
MODE
U1
U2
L1
L2
CHARGE
OFF
ON
ON
OFF
SLOW
OFF
OFF
ON
ON
FAST
ON
OFF
OFF
ON
This IC controls the motor current to be constant by 3 modes listed above.
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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TB67H400AFTG
Calculation of the predefined output current
For PWM constant current control, this IC uses a clock generated by the OSCM oscillator.
The peak output current (Setting current value) can be set via the current-sensing resistor (RRS) and the reference
voltage (Vref), as follows:
Vref (V)
Iout (max) = Vref (gain) ×
RRS (Ω)
Vref (gain): the Vref decay rate is 1 / 5.0 (typ.)
For example: In the case of a 100% setup
When Vref is 3.0 V and RSS is 0.51 Ω, the motor constant current (Peak current) will be calculated as:
Iout = 3.0 V / 5.0 / 0.51 Ω= 1.18 A
Calculation of the OSCM oscillation frequency (chopper reference frequency)
An approximation of the OSCM oscillation frequency (fOSCM) and chopper frequency (fchop) can be calculated by the
following expressions.
fOSCM = 1 / [0.56 × {COSC × (ROSC + 500)}]
* COSC, ROSC: External components for OSCM (When COSC is 270 pF and ROSC is 5.1 kΩ, fOSCM is about
1.12 MHz (typ.).)
fchop = fOSCM / 16
* When fOSCM is 1.12 MHz, fchop is about 70 kHz (typ.).
If chopping frequency is raised, the ripple of current will become small and wave-like reproducibility will improve.
However, the gate loss inside IC goes up and generation of heat becomes large.
The standard frequency is about 70 kHz. A setup in the range of 50 to 100 kHz is recommended.
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TB67H400AFTG
Absolute maximum ratings (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Remarks
Motor power supply
Motor output voltage
VM
Vout
50
50
V
V
Iout(S)
4.0
A
Iout(L)
8.0
A
VCC
VIN(H)
VIN(L)
Vref
PD
Topr
Tstg
Tj
6.0
6.0
-0.4
GND to 4.2
1.3
-20 to 85
-55 to 150
150
V
V
V
V
W
°C
°C
°C
―
―
Small mode
(Note1)
Large mode
(Note1)
―
―
―
―
(Note2)
―
―
―
Motor output current
VCC voltage
Digital input voltage
Vref input voltage
Power dissipation
Operating temperature
Storage temperature
Junction temperature
Note1: While in use, please make sure to take the heat generation matter into consideration, and use below 70% of the
absolute maximum ratings (Iout(S) ≤ 2.8 A, Iout(L) ≤ 5.6 A) as a reference. Operating conditions (such as
surrounding temperature or board conditions) may limit the operating current. (Depends on the heat
conditions.)
Note2: The value in the state where it is not mounted on the board. Ta exceeding 25°C would require derating at 10.4
mW/°C.
Ta : Ambient temperature.
Topr : Operating ambient temperature.
Tj
: Operating junction temperature. The maximum junction temperature is limited by the thermal shutdown
circuit (TSD).
Use the maximum junction temperature (Tj) at 120°C or less. The maximum current cannot be used under
certain thermal conditions.
Caution) Absolute maximum ratings
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings. Exceeding the rating (s) may cause device breakdown, damage or
deterioration, and may result in injury by explosion or combustion. The value of even one parameter of the absolute
maximum ratings should not be exceeded under any circumstances. The TB67H400AFTG does not have overvoltage
detection circuit. Therefore, the device is damaged if a voltage exceeding its rated maximum is applied. All voltage
ratings, including supply voltages, must always be followed. The other notes and considerations described later should
also be referred to.
Operating ranges (Ta=-20 to 85°C)
Characteristics
Symbol
Min
Typ.
Max
Unit
Remarks
VM power supply
VM
10
24
47
V
―
Iout(S)
―
1.5
3.0
A
Small mode
Motor output current
Logic input voltage
Iout(L)
―
3.0
6.0
A
Large mode
VIN(H)
2.0
―
5.5
V
Logic [High] level
VIN(L)
GND
―
0.8
V
Logic [Low] level
Logic input frequency
fLOGIC
―
―
400
kHz
IN1, IN2, PWM
PWM signal frequency
fchop(range)
40
70
150
kHz
―
Vref input voltage
Vref
GND
2.0
4.0
V
―
Note: The actual maximum current may be limited by the operating environment (operating conditions such operating
duration, or by the surrounding temperature or board heat dissipation). Determine a realistic maximum current
by calculating the heat generated under the operating environment.
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TB67H400AFTG
Electrical characteristics 1 (Ta=25°C and VM=24 V, unless otherwise specified)
Characteristics
High
Low
Logic input hysteresis voltage
High
Logic input current
Low
Logic input voltage
Symbol
Test conditions
Min
Typ.
Max
Unit
VIN(H)
VIN(L)
VIN(HYS)
IIN(H)
IIN(L)
2.0
0
100
―
―
―
―
―
33
―
5.5
0.8
300
―
1
V
V
mV
µA
µA
―
2
3.5
mA
―
3.5
5.5
mA
IM3
IOH
Logic input pins (Note)
Logic input pins (Note)
Logic input pins (Note)
Logic input pins:3.3 V
Logic input pins:0 V
Output: OPEN,
Standby mode
Output: OPEN, PWM=H,
IN1, IN2=Low
Output: OPEN
VRS=VM=50 V, Vout=0 V
―
―
5.5
―
7
1
mA
µA
IOL
VRS=VM=Vout=50 V
1
―
―
µA
ΔIout1
ΔIout2
IRS
Bridge A, B differential
Iout=1.5 A
VRS=VM=24 V
Tj=25°C, Forward direction
High side+Low side
Small mode
-5
-5
0
0
0
―
5
5
10
%
%
µA
―
0.49
0.6
Ω
IM1
Power consumption
Output leakage current
IM2
High
Low
Output current channel differential
Output current accuracy
RS pin current
Drain-source ON-resistance
(High side + low side)
Ron(H+L)
Note: VIN(H) is defined as the VIN voltage that causes the outputs (OUTA+, OUTA-, OUTB+ and OUTB-) to change
when a pin under test is gradually raised from 0 V. VIN(L) is defined as the VIN voltage that causes the outputs
(OUTA+, OUTA-, OUTB+ and OUTB-) to change when the pin is then gradually lowered.
The difference between VIN(H) and VIN(L) is defined as the VIN(HYS).
Note: The internal circuits are designed to avoid miss-function or leakage current; when the logic signal is applied
while the VM voltage is not supplied. But for fail-safe, please control the power supply and logic signal timing
correctly.
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TB67H400AFTG
Electrical characteristics 2 (Ta=25°C and VM=24 V, unless otherwise specified)
Characteristics
Symbol
Test conditions
Min
Typ.
Max
Unit
Vref input current
Iref
Vref=2.0 V
―
0
1
μA
Internal regulator voltage
VCC
ICC=5.0 mA
4.75
5.0
5.25
V
Internal regulator current
ICC
VCC=5.0 V
―
2.5
5
mA
Vref gain rate
Vref(gain)
Vref=2.0 V
1/5.2
1/5.0
1/4.8
―
TSD threshold (Note1)
TjTSD
―
145
160
175
°C
VM power on reset voltage
VMR
―
7.0
8.0
9.0
V
Over current threshold (Note2)
ISD
―
4.1
4.9
5.7
A
Note1: Thermal shutdown (TSD) circuit
When the junction temperature of the device reaches the TSD threshold, the TSD circuit is triggered; the
internal reset circuit then turns off the output transistors. In order to avoid malfunction by switching etc.,
detection mask time is prepared inside IC. Once the TSD circuit is triggered, the device will be set to standby
mode, and can be cleared by reasserting the VM power source, or setting to standby mode (INA1, INA2, INB1,
INB2, PWMA, and PWMB=All Low). The TSD circuit is a backup function to detect a thermal error, therefore
is not recommended to be used aggressively.
Note2: Over-current shutdown (ISD) circuit
When the output current reaches the threshold, the ISD circuit is triggered; the internal reset circuit then
turns off the output transistors. In order to avoid malfunction by switching etc., detection mask time is
prepared inside IC. Once the ISD circuit is triggered, the device will be set to standby mode, and can be
cleared by reasserting the VM power source, or setting to standby mode (INA1, INA2, INB1, INB2, PWMA,
and PWMB=All Low).
Back-EMF
While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the motor
current recirculates back to the power supply due to the effect of the motor back-EMF.
If the power supply does not have enough sink capability, the power supply and output pins of the device might rise
above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor
characteristics. It must be fully verified that there is no risk that the TB67H400AFTG or other components will be
damaged or fail due to the motor back-EMF.
Cautions on Overcurrent Shutdown (ISD) and Thermal Shutdown (TSD)
The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as an
output short-circuit; they do not necessarily guarantee the complete IC safety.
If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device
may be damaged due to an output short-circuit.
The ISD circuit is only intended to provide a temporary protection against an output short-circuit. If such a condition
persists for a long time, the device may be damaged due to overstress. Overcurrent conditions must be removed
immediately by external hardware.
IC Mounting
Do not insert devices incorrectly or in the wrong orientation. Otherwise, it may cause breakdown, damage and/or
deterioration of the device.
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AC electrical characteristics (Ta = 25°C, VM = 24 V, and 6.8 mH/5.7 Ω, unless otherwise
specified)
Characteristics
Minimum phase pulse width
Output transistor switching
characteristics
Analog blanking time
Symbol
Test conditions
Min
Typ.
Max
tLOGIC(min)
―
100
―
―
twp
―
50
―
―
twn
―
50
―
―
tr
―
30
80
130
tf
―
40
90
140
tpLH(LOGIC)
IN1, IN2, PWM - OUT
250
―
1200
tpHL(LOGIC)
IN1, IN2, PWM - OUT
250
―
1200
250
400
550
ns
VM=24 V, Iout=1.5 A
AtBLK
Analog tBLK
Unit
ns
ns
DtBLK(L)
TBLKAB:L, fOSCM=1120 kHz
―
3.6
―
μs
DtBLK(H)
TBLKAB:H, fOSCM=1120 kHz
―
5.4
―
μs
OSCM oscillation frequency
accuracy
ΔfOSCM
COSC= 270 pF, ROSC =5.1 kΩ
-15
―
+15
%
OSC oscillation reference
frequency
fOSCM
COSC= 270 pF, ROSC =5.1 kΩ
952
1120
1288
kHz
Chopping frequency
fchop
Output: Active(Iout=1.5 A),
fOSCM = 1120 kHz
―
70
―
kHz
Digital blanking time
AC characteristics timing chart
tLOGIC
twn
50%
50%
50%
twp
[LOGIC]
tpHL (LOGIC)
tpLH (LOGIC)
90%
90%
50%
50%
[OUT]
10%
10%
tf
tr
Please note that the timing charts or constants may be omitted or simplified for explanatory.
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(Reference) Relation between the power dissipation and the ambient temperature
Board mounting conditions
Device alone conditions
Board condition
Four layers of glass epoxy board
Cu thickness: 1-layer/4-layer=55mm, 2-layer and
3-layer=35mm.
Size: 100 mm×110 mm×1.6 mm
This value is dependent on a substrate pattern and mounting conditions. Moreover, when ambient temperature is
high, permissible power consumption becomes small.
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Package dimensions
P-WQFN48-0707-0.50-003
Unit: mm
Weight 0.10 g (typ.)
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Notes on Contents
Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Timing Charts
Timing charts may be simplified for explanatory purposes.
Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required at
the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these
examples of application circuits.
Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components and
circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause device breakdown, damage or
deterioration, and may result in injury by explosion or combustion.
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in the case of over-current
and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when
the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to
continuously flow and the breakdown can lead to smoke or ignition. To minimize the effects of the flow of a large current in
the case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required.
If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent
device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative
current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a
stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may
not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition.
Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power
supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating,
and exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by explosion or
combustion. In addition, do not use any device that has been inserted incorrectly.
Please take extra care when selecting external components (such as power amps and regulators) or external devices (for
instance, speakers). When large amounts of leak current occur from capacitors, the DC output level may increase. If the
output is connected to devices such as speakers with low resist voltage, overcurrent or IC failure may cause smoke or
ignition. (The over-current may cause smoke or ignition from the IC itself.) In particular, please pay attention when using a
Bridge Tied Load (BTL) connection-type IC that inputs output DC voltage to a speaker directly.
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TB67H400AFTG
Points to remember on handling of ICs
Over current detection circuit
Over current detection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all circumstances.
If the Over current detection circuits operate against the over current, clear the over current status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the over
current protection circuit to not operate properly or IC breakdown before operation. In addition, depending on the method of
use and usage conditions, if over current continues to flow for a long time after operation, the IC may generate heat
resulting in breakdown.
Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits operate
against the over temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the
thermal shutdown circuit to not operate properly or IC breakdown before operation.
Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is
appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition. These ICs generate
heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC
characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation
with peripheral components.
Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power supply
due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor power supply
and output pins might be exposed to conditions beyond maximum ratings. To avoid this problem, take the effect of
back-EMF into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
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this document, and related hardware, software and systems (collectively "Product") without notice.
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written permission, reproduction is permissible only if reproduction is without alteration/omission.
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or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or
incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant
TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product
and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the
application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or
applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b)
evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms,
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applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.
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