TB67S103AFTG/FNG
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TB67S103AFTG, TB67S103AFNG
Serial-in controlled Bipolar Stepping Motor Driver
The TB67S103A is a two-phase bipolar stepping motor driver
using a PWM chopper. The data bank setting function by serial
control I/F is built in.Fabricated with the BiCD process,
rating is 50 V/4.0 A .
Features
・BiCD process integrated monolithic IC.
・Capable of controlling 1 bipolar stepping motor.
・PWM controlled constant-current drive.
・Allows full, half, quarter, 1/8, 1/16, 1/32 step operation.
・ID (2 bits) setup is possible.
・Low on-resistance (High + Low side=0.49Ω(typ)) MOSFET
output stage.
・High efficiency motor current control mechanism (Advanced
Dynamic Mixed Decay)
・High voltage and current (For specification, please refer to absolute
maximum ratings and operation ranges)
・Error detection (TSD/ISD) signal output function
・Built-in error detection circuits (Thermal shutdown (TSD)、over-current
shutdown (ISD), and power-on reset (POR))
・Built-in VCC regulator for internal circuit use.
・Chopping frequency of a motor can be customized by external resistance
and condenser.
・Multi package lineup
TB67S103AFTG: P-WQFN48-0707-0.50-003
TB67S103AFNG: HTSSOP48-P-300-0.50
FTG
P-WQFN48-0707-0.50-003
Weight 0.10g (typ.)
FNG
HTSSOP48-P-300-0.50
Weight 0.21g (typ.)
Note) Please be careful about thermal conditions during use.
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TB67S103AFTG/FNG
NC
OUTB+
OUTB+
NC
RSB
RSB
NC
VM
NC
VCC
(Top View)
NC
NC
Pin assignment (TB67S103A)
36 35 34 33 32 31 30 29 28 27 26 25
NC
37
24 NC
LO
38
23 NC
ID
39
22 GND
GND
40
21 OUTB-
VREFB
41
20 OUTB-
VREFA
42
OSCM
43
SCLK
44
17 OUTA-
SO
45
16 OUTA-
SDATA
46
15 GND
SSET
47
14 NC
NC
48
13 NC
19 GND
FTG
5
6
7
8
CLK
ENABLE
RESET
GND
NC
RSA
RSA
9 10 11 12
NC
4
OUTA+
3
OUTA+
2
NC
1
NC
18 GND
Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB.
(Top View)
OSCM
NC
SCLK
SO
SDATA
NC
SSET
CLK
ENABLE
RESET
GND
NC
RSA
RSA
NC
OUTA+
OUTA+
NC
NC
GND
NC
OUTAOUTAGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
FNG
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VREFA
VREFB
GND
ID
LO
NC
NC
VCC
NC
VM
NC
NC
RSB
RSB
NC
OUTB+
OUTB+
NC
NC
GND
NC
OUTBOUTBGND
Please mount the exposed pad of the HTSSOP package to the GND area of the PCB.
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TB67S103AFTG/FNG
TB67S103A Block diagram
SSET
Serial
Bank
Set
+
Serial
Out
SDATA
SCLK
SO
ID
Motor
Oscillator
System
Oscillator
VCC
Regulator
CLK
Current
Level
Set
RESET
ENABLE
OSCM
VCC
VM
Power-on
Reset
Signal
Decode
Logic
ID select
OSC-Clock
Converter
Current
Reference
Setting
VREFA
VREFB
LO
Error Output
Current
Comp
Motor Control Logic
Predriver
TSD
Current
Comp
Predriver
RSA
RSB
ISD
GND
OUTA+
OUTA-
OUTB+
OUTB-
Functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes.
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TB67S103AFTG/FNG
Application Notes
All the grounding wires of the TB67S103A must run on the solder mask on the PCB and be externally terminated
at only one point. Also, a grounding method should be considered for efficient heat dissipation.
Careful attention should be paid to the layout of the output, VDD(VM) and GND traces, to avoid short circuits
across output pins or to the power supply or ground. If such a short circuit occurs, the device may be permanently
damaged.
Also, the utmost care should be taken for pattern designing and implementation of the device since it has power
supply pins (VM, RS, OUT, GND) through which a particularly large current may run. If these pins are wired
incorrectly, an operation error may occur or the device may be destroyed.
The logic input pins must also be wired correctly. Otherwise, the device may be damaged owing to a current
running through the IC that is larger than the specified current.
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TB67S103AFTG/FNG
Pin explanations
TB67S103AFTG (QFN48)
Pin No.1 – 28
Pin No.
Pin Name
Function
1
NC
Non-connection pin
2
CLK
CLK signal input pin
3
ENABLE
4
RESET
5
GND
6
NC
7
RSA (*)
Motor Ach current sense pin
8
RSA (*)
Motor Ach current sense pin
9
NC
10
OUTA+ (*)
Motor Ach (+) output pin
11
OUTA+ (*)
Motor Ach (+) output pin
12
NC
Non-connection pin
13
NC
Non-connection pin
14
NC
Non-connection pin
15
GND
16
OUTA- (*)
Motor Ach (-) output pin
17
OUTA- (*)
Motor Ach (-) output pin
18
GND
Ground pin
19
GND
Ground pin
20
OUTB- (*)
Motor Bch (-) output pin
21
OUTB- (*)
Motor Bch (-) output pin
22
GND
23
NC
Non-connection pin
24
NC
Non-connection pin
25
NC
Non-connection pin
26
OUTB+ (*)
Motor Bch (+) output pin
27
OUTB+ (*)
Motor Bch (+) output pin
28
NC
Ach/Bch output stage ON/OFF control pin
Electric angle reset pin
Ground pin
Non-connection pin
Non-connection pin
Ground pin
Ground pin
Non-connection pin
(*) Note: Please connect the pins with the same names, at the nearest point of the device.
・Please do not run patterns under NC pins.
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Pin No.29 – 48
Pin No.
Pin Name
Function
29
RSB (*)
Motor Bch current sense pin
30
RSB (*)
Motor Bch current sense pin
31
NC
Non-connection pin
32
VM
Motor power supply pin
33
NC
Non-connection pin
34
VCC
35
NC
Non-connection pin
36
NC
Non-connection pin
37
NC
Non-connection pin
38
LO
Error detect signal output pin
39
ID
ID set pin
Internal VCC regulator monitor pin
Ground pin
40
GND
41
VREFB
Motor Bch output set pin
42
VREFA
Motor Ach output set pin
43
OSCM
Oscillating circuit frequency for chopping set pin
44
SCLK
Serial clock input pin
45
SO
Serial data output pin
46
SDATA
Serial data input pin
47
SSET
Set signal input pin
48
NC
Non-connection pin
(*) Note: Please connect the pins with the same names, at the nearest point of the device.
・Please do not run patterns under NC pins.
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TB67S103AFTG/FNG
Pin explanations
TB67S103AFNG (HTSSOP48)
Pin No.1 – 28
Pin No.
Pin Name
Function
1
OSCM
2
NC
Non-connection pin
3
SCLK
Serial clock input pin
4
SO
Serial data output pin
5
SDATA
Serial data input pin
6
NC
Non-connection pin
7
SSET
Set signal input pin
8
CLK
CLK signal input pin
9
ENABLE
10
RESET
11
GND
12
NC
13
RSA (*)
Motor Ach current sense pin
14
RSA (*)
Motor Ach current sense pin
15
NC
16
OUTA+ (*)
Motor Ach (+) output pin
17
OUTA+ (*)
Motor Ach (+) output pin
18
NC
Non-connection pin
19
NC
Non-connection pin
20
GND
21
NC
22
OUTA- (*)
Motor Ach (-) output pin
23
OUTA- (*)
Motor Ach (-) output pin
24
GND
Ground pin
25
GND
Ground pin
26
OUTB- (*)
Motor Bch (-) output pin
27
OUTB- (*)
Motor Bch (-) output pin
28
NC
Oscillating circuit frequency for chopping set pin
Ach/Bch output stage ON/OFF control pin
Electric angle reset pin
Ground pin
Non-connection pin
Non-connection pin
Ground pin
Non-connection pin
Non-connection pin
(*) Note: Please connect the pins with the same names, at the nearest point of the device.
・Please do not run patterns under NC pins.
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Pin No.29 – 48
Pin No.
Pin Name
Function
29
GND
30
NC
Non-connection pin
31
NC
Non-connection pin
32
OUTB+ (*)
Motor Bch (+) output pin
33
OUTB+ (*)
Motor Bch (+) output pin
34
NC
35
RSB (*)
Motor Bch current sense pin
36
RSB (*)
Motor Bch current sense pin
37
NC
Non-connection pin
38
NC
Non-connection pin
39
VM
Motor power supply pin
40
NC
Non-connection pin
41
VCC
42
NC
Non-connection pin
43
NC
Non-connection pin
44
LO
Error detect signal output pin
45
ID
ID set pin
Ground pin
Non-connection pin
Internal VCC regulator monitor pin
Ground pin
46
GND
47
VREFB
Motor Bch output set pin
48
VREFA
Motor Ach output set pin
(*) Note: Please connect the pins with the same names, at the nearest point of the device.
・Please do not run patterns under NC pins.
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TB67S103AFTG/FNG
INPUT/OUTPUT equivalent circuit (TB67S103A)
SCLK
IN/OUT signal
Digital Input (VIH/VIL)
CLK
VIH: 2.0V(min)~5.5V(max)
ENABLE
RESET
1kΩ
Logic
SDATA
SSET
Equivalent circuit
Input
Pin
100kΩ
Pin name
VIL : 0V(min)~0.8V(max)
GND
Logic
SO
LO
Output
Digital Output (VOH/VOL)
Pin
(Pullup resistance :10k～100kΩ)
GND
VCC
VREFA
VREFB
VCC
VCC voltage range
4.75V(min)~5.0V(typ)~5.25V(max)
1kΩ
VREF
VREF voltage range
0V~3.6V
GND
1kΩ
OSCM
OSCM frequency setting range
500Ω
OSCM
0.64MHz(min)~1.12MHz(typ)~2.4MHz(max)
GND
RS
OUTA+
OUTA-
OUTB+
OUTBRSA
RSB
VM power supply voltage range
10V(min)~47V(max)
OUT+
OUT pin voltage
OUT-
10V(min)~47V(max)
GND
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TB67S103AFTG/FNG
Pin name
IN/OUT signal
Equivalent circuit
R_ID=Open (5V set)
R_ID=100kΩ (2.5V set)
R_ID=33kΩ (1.25V set)
ID
VCC
R_ID=GND (0V set)
100kΩ
ID
It is possible to change ID setup of a
device by attaching resistance (or GND
short-circuit / Open) to ID terminal.
1kΩ
R_ID
When set up with ID terminal
and of a serial input are in
agreement, the serial data inputted to the
device are made to reflect.
*The variation in resistance is ±30%.
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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TB67S103AFTG/FNG
Function explanation (Stepping motor)
1. CLK Function
Each up-edge of the CLK signal will shift the motor’s electrical angle per step.
CLK Input
Function
Up-edge
Shifts the electrical angle per step.
Down-edge
(State of the electrical angle does not change.)
2. ENABLE function
The ENABLE pin controls the ON and OFF of the corresponding output stage. This pin serves to select if the motor is
stopped in Off (High impedance) mode or activated. Please set the ENABLE pin to ‘L’ during VM power-on and
power-off sequence.
ENABLE Input
Function
H
Output stage=‘ON’ (Normal operation mode)
L
Output stage=’OFF) (High impedance mode)
3. RESET function
RESET Input
Function
H
Sets the electrical angle to the initial condition.
L
Normal operation mode
The current for each channel (while RESET is applied) is shown in the table below. MO will show ‘L’ at this time.
Step resolution setting
Ach current setting
Bch current setting
Default electrical angle
Full step
100%
100%
45°
Half step (Type (A))
100%
100%
45°
Half step (Type (B))
71%
71%
45°
Quarter step
71%
71%
45°
1/8 step
71%
71%
45°
1/16 step
71%
71%
45°
1/32 step
71%
71%
45°
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TB67S103AFTG/FNG
Step resolution setting and initial angle
[Full step resolution]
CLK
MO
H
L
H
L
+100%
Iout(A)
0%
-100%
+100%
Iout(B)
0%
-100%
CCW
CW
[Half step resolution (Type A)]
CLK
MO
H
L
H
L
+100%
Iout(A)
0%
-100%
+100%
Iout(B)
0%
-100%
CCW
CW
MO output shown in the timing chart is when the MO pin is pulled up.
Timing charts may be simplified for explanatory purpose.
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TB67S103AFTG/FNG
[Half step resolution (Type B)]
CLK
MO
H
L
H
L
+100%
+71%
Iout(A)
0%
-71%
-100%
+100%
+71%
Iout(B)
0%
-71%
-100%
CCW
CW
[Quarter step resolution]
CLK
MO
H
L
H
L
+100%
+71%
+38%
0%
Iout(A) -38%
-71%
-100%
+100%
+71%
+38%
Iout(B) 0%
-38%
-71%
-100%
CCW
CW
Timing charts may be simplified for explanatory purpose.
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TB67S103AFTG/FNG
[1/8 step resolution]
CLK
MO
MO
H
L
H
L
+100%
+98%
+96%
+83%
+71%
+56%
+38%
+20%
Iout(A)
0%
-20%
-38%
-56%
-71%
-83%
-96%
-98%
-100%
+100%
+98%
+96%
+83%
+71%
+56%
+38%
+20%
Iout(B)
0%
-20%
-38%
-56%
-71%
-83%
-96%
-98%
-100%
CCW
CW
Timing charts may be simplified for explanatory purpose.
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TB67S103AFTG/FNG
[1/16 step resolution]
CLK
MO
MO
H
L
H
L
+100%
+98%
+96%
+83%
+71%
+56%
+38%
+20%
Iout(A)
0%
-20%
-38%
-56%
-71%
-83%
-96%
-98%
-100%
+100%
+98%
+96%
+83%
+71%
+56%
+38%
+20%
Iout(B)
0%
-20%
-38%
-56%
-71%
-83%
-96%
-98%
-100%
CCW
CW
Timing charts may be simplified for explanatory purpose.
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TB67S103AFTG/FNG
[1/32 step resolution]
H
L
H
L
CLK
MO
MO
+100%
Iout(A)
0%
-100%
+100%
Iout(B)
0%
-100%
CCW
CW
Timing charts may be simplified for explanatory purpose.
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TB67S103AFTG/FNG
Device distinction circuit (ID_SELECT)
ID
R_ID=GND
○
-
-
-
R_ID=33kΩ(1.25V set)
-
○
-
-
R_ID=100kΩ(2.5V set)
-
-
○
-
R_ID=Open
-
-
-
○
It is possible to change ID setup of a device by attaching resistance (or GND short-circuit / Open) to ID terminal.
When set up with ID terminal and of a serial input are in agreement, the serial data inputted
to the device are made to reflect.
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TB67S103AFTG/FNG
About serial input data (TB67S103A)
A serial input is effective only when a SSET pin is "H". A setup of operation is possible by 3 line serial input of
"SCLK", "SDATA", and "SSET."
■Specification of Setup Mode (timing chart)
SSET
Initial setup
Data setup
Initial setup
SCLK
1
SDATA
0
1
Serial-data
input
distinction
1
ID1 ID0 A/D W/R D7
D6 D5
Address/
Data
Device
distinction
D4
D3
D2
D1 D0
Address setting
or
Data setting
Read/
Write
Timing charts may be simplified for explanatory purpose.
Input data is 16-bit composition (it decodes every 8 bits).
Please input serial data in order of the following.
(SSET input is switched to H from L)→ (Initial setup input) → (Data setup input)
In order that TB67S103A may prevent the incorrect input of serial data, it is checked whether serial data have been normally
inputted in Initial setup.
(Example) The case of IC of ID setup ='00'
Data setup is received when Initial setup='1011 0000' is inputted.
Data setup is not received when Initial setup='1011 0100' is inputted.
Data setup is not received when Initial setup='1010 0000' is inputted.
Please input “1011(S103 characteristic value)” into 4 bits of heads.
In 1 to 4 bits=”1011” and 5 to 6 bits=”ID setup”, serial data are received.
7 bits is an A/D setup. (0: Address Setup and 1: Data Setup)
8 bits is a W/R setup. (0: Write mode and 1: Read mode)
In Write mode, an address or data is set up by [Data setup].
In Read mode, it is possible to output the value (an address or data) of a register from SO pin.
SSET
Only the period of H has an effective serial input.
Initial setup
Data setup
Initial setup
The input of serial data becomes effective only in SSET=H. The serial data inputted between SSET=L are not
received.
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■About a serial input (Initial setup→Data setup Flow chart)
Serial input: Effective/Initial setup start
8bits input
Chip select check (6 bits of heads)
No
Data setup: Don't receive.
Chip select setup = 6 bits of input data heads?
Yes
A/D=0
Address set
Yes
A/D bit=?
A/D=1
W/R=0
Data set
SSET=High
Write mode
W/R bit=?
W/R=1
No
Read mode
Serial input: Don't receive.
The end of Initial setup
A/D of Initial setup?
A/D=0,W/R bit=0
A/D=0,W/R bit=1
A/D=1,W/R bit=1
A/D=1,W/R bit=0
8-bits
address
8-bits DATA
writing
The address currently written
in is outputted to SO pin.
19
The DATA currently written in is
outputted to SO pin.
2014-01-27
TB67S103AFTG/FNG
■The change of a Serial bank
[A2]
0
0
0
0
1
1
1
1
DATA Bit
[A1]
0
0
1
1
0
0
1
1
[A0]
0
1
0
1
0
1
0
1
Function
It is a serial-data input to BANK0.
It is a serial-data input to BANK1.
It is a serial-data input to BANK2.
It is a serial-data input to BANK3.
It is a serial-data input to BANK4.
It is a serial-data input to BANK5.
It is a serial-data input to BANK6.
It is a serial-data input to BANK7.
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TB67S103AFTG/FNG
BANK0: Motor drive: Setup 1 (basic setup)
[D7]
0
0
1
1
DATA Bit
fOSCM=1.6MHz(typ)
Function
[D6]
0
1
0
1
- Don’t care
- Don’t care
- Don’t care
- Don’t care
Motor drive：torque setting
[D5]
0
0
1
1
DATA Bit
Function
[D4]
0
1
0
1
Iout×40% (*Initial)
Iout×60%
Iout×80%
Iout×100%
< D3> Motor drive：CW/CCW setting
DATA Bit
[D3]
0
1
Function
CCW (At the time of charge OUT+pin：L, OUT-pin：H) (*Initial)
CW (At the time of charge OUT+pin：H, OUT-pin：L)
Motor drive：Step resolution setting
[D2]
DATA Bit
[D1]
[D0]
0
0
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
Function
Standby mode (Power-saving mode) (*Initial)
(Note)
Full step resolution
Half step resolution(Type (A))
Quarter step resolution
Half step resolution(Type (B))
1/8 step resolution
1/16 step resolution
1/32 step resolution
(Note) Standby mode : the OSCM is disabled and the output stage is set to ‘OFF’ status.
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BANK1: Motor drive: Setup 2 (basic setup)
< D7:D6> Motor drive：Decay mode setting
[D7]
0
0
1
1
DATA Bit
Function
[D6]
0
1
0
1
Mixed Decay mode (*Initial)
Slow Decay only
Fast Decay only
Auto Decay mode
*About a Decay mode setting：Please carry out change to Auto Decay mode(=[1,1]) after
stopping a motor.
（Please carry out the change of =[0,0]/[0,1]/[1,0]⇔[1,1] after stopping a motor.）
Motor drive：fchop setting
[D5]
0
0
1
1
DATA Bit
Function
[D4]
0
1
0
1
At the time of fOSCM=1.6MHz(typ) setting, fchop=100kHz
fchop=100kHz (*Initial)
fchop=50kHz
fchop=66.6kHz
Test mode (Don’t use)
< D3:D2> Motor drive：Mixed decay timing(MDT) setting
[D3]
0
0
1
1
DATA Bit
Function
[D2]
0
1
0
1
MDT=37.5% (*Initial)
MDT=50%
MDT=25%
MDT=12.5%
*About MDTsetting：Only in Mixed Decay mode(=[0,0]), this setup is effective.
Motor drive：revolving speed setting
[D1]
0
0
1
1
DATA Bit
Function
[D0]
0
1
0
1
fCLK×100% (*Initial)
fCLK×50%
fCLK×25%
fCLK×12.5%
*When a setup of BANK is changed during operation, it is reflected in the timing of the next fchop start.
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BANK2 Others: Option setup (Reference value)
< D7:D6> Error detection function：ISD Masking time setting
[D7]
0
0
1
1
DATA Bit
Function
[D6]
0
1
0
1
8×1/foscs (1.25μs) (*Initial)
4×1/foscs (0.625μs)
16×1/foscs (2.5μs)
32×1/foscs (5.0μs)
< D5:D4> Error detection function：TSD Masking time setting
[D5]
0
0
1
1
DATA Bit
Function
[D4]
0
1
0
1
16×1/foscs (2.5μs) (*Initial)
4×1/foscs (0.625μs)
8×1/foscs (1.25μs)
32×1/foscs (5.0μs)
< D3:D2> Error detection function：VRS Masking time setting
[D3]
0
0
1
1
DATA Bit
Function
[D2]
0
1
0
1
8×1/foscs (1.25μs) (*Initial)
4×1/foscs (0.625μs)
16×1/foscs (2.5μs)
32×1/foscs (5.0μs)
※foscs=6.4MHz(typ) internal clock
SERIAL DATA: BANK2 (ISD Masking time)/(VRS Masking time)
In the case of ”0,0”: About 1/foscs×7~8clk(1.09μs~1.25μs)
In the case of ”0,1”: About 1/foscs×3~4clk(0.47μs~0.63μs)
In the case of ”1,0”: About 1/(foscs/2) ×7~8clk=1/foscs×14~16clk(2.5μs~2.8μs)
In the case of ”1,1”: About 1/(foscs/4) ×7~8clk=1/foscs×32~36clk(5.0μs~5.6μs)
※foscs=6.4MHz(typ) internal clock
SERIAL DATA: BANK2 (TSD Masking time)
In the case of ”0,0”: About 1/(foscs/2) ×7~8clk=1/foscs×14~16clk(2.5μs~2.8μs)
In the case of ”0,1”: About 1/foscs×3~4clk(0.47μs~0.63μs)
In the case of ”1,0”: About 1/foscs×7~8clk(1.09μs~1.25μs)
In the case of ”1,1”: About 1/(foscs/4) ×7~8clk=1/foscs×32~36clk(5.0μs~5.6μs)
< D1:D0> Motor drive：Digital tblank setting
[D1]
0
0
1
1
DATA Bit
fOSCM=1.6MHz(typ)
Function
[D0]
0
1
0
1
2×1/fOSCM (*Initial)
3×1/fOSCM
4×1/fOSCM
6×1/fOSCM
*When a setup of BANK is changed during operation, it is reflected in the timing of the next fchop start.
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LO(Error detect signal) output function
When Thermal shutdown(TSD) or Over-current shutdown(ISD) is applied, the LO voltage will be switched to Low(GND) level.
3.3V
10kΩ
The LO is an open-drain output pin. LO pin needs to be pulled up to 3.3V/5.0V level for proper function. During regular operation, the
LO pin level will stay High(VCC level). When error detection (TSD, ISD) is applied, the LO pin will show Low (GND) level.
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Decay function
ADMD(Advanced Dynamic Mixed Decay) constant current control
The Advanced Dynamic Mixed Decay threshold, which determines the current ripple level during current feedback control, is
a unique value.
fchop
Internal
OSC
Setting
current value
NF detect
Detect
Advanced Dynamic Mixed
Decay threshold
ADMDth
Iout
Charge Mode→NF detect→Fast Decay→ADMDth detect→Slow
Decay→fchop 1 cycle→Charge mode
fchop 1 cycle：16clk
Auto Decay Mode current waveform
fchop
fchop
Internal
OSC
Setting
current value
NF detect
NF detect
Iout
Fast Decay
Slow Decay
ADMDth (Advanced Dynamic Mixed Decay threshold)
Timing charts may be simplified for explanatory purpose.
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ADMD current waveform
・When the next current step is higher :
fchop
fchop
fchop
fchop
Internal
OSC
Setting
current value
NF
NF
Fast
Charge
Setting
current value
NF
Charge
Slow
NF
Fast
Charge
Fast
Fast
Slow
Slow
Charge
Slow
・When Charge period is more than 1 fchop cycle :
fchop
fchop
fchop
fchop
Internal
OSC
Setting
current value
NF
Fast
Slow
Charge
Setting
current value
NF
Charge
NF
Fast
Charge
Slow
Fast
Slow
When the Charge period is longer than fchop cycle, the Charge period will be extended until the motor current reaches the
NF threshold. Once the current reaches the next current step, then the sequence will go on to decay mode.
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・When the next current step is lower :
fchop
Internal
OSC
Setting
current value
fchop
NF
Charge
The operation mode will be switched to ‘Charge’ to
monitor the motor current with the RS comparator;
then will be switched to ‘Fast’ because the motor
current is above the threshold.
NF
Fast
Charge
Fast
NF
Slow Charge
Slow
fchop
fchop
Fast
Setting
current value
Charge
Fast
Slow
・ When the Fast continues past
threshold during 1 fchop cycle)
fchop
Slow
1 fchop cycle (the motor current not reaching the ADMD
fchop
fchop
fchop
Internal
OSC
Setting
current value
NF
Charge
Fast
The operation mode will be switched to ‘Charge’ to
monitor the motor current with the RS comparator;
then will be switched to ‘Fast’ because the motor
current is above the threshold.
NF
Slow
Charge
If the motor current is still above the ADMD threshold
after reaching 1 fchop cycle, the output stage function
will stay ‘Fast’ until the current reaches the ADMDth.
Fast
Setting
current value
Charge
Slow
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Mixed Decay Mode current waveform
fchop
Internal
OSC
Decay Mode 1
Setting current value
NF
12.5%
MDT
MDT
25.0%
MDT
Charge Mode → NF detect → Slow Mode → MixedDecay
Timing(MDT) → Fast Mode → Charge Mode
37.5%
MDT
50.0%
MDT
Fast Decay (only) Mode current waveform
fchop
Internal
OSC
Decay Mode 1
Setting current value
NF
Charge Mode → NF detect
→ Fast Mode → Charge Mode
MDT does not occur.
Slow Decay (only) Mode current waveform
fchop
Internal
OSC
Decay Mode 1
Setting current value
NF
MDT does not occur.
Charge Mode → NF detect
→ Slow Mode → Charge Mode
Timing charts may be simplified for explanatory purpose.
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Output transistor function mode
VM
VM
RRS
VM
RRS
RSpin
RRS
RSpin
U1
RSpin
U2
U1
U2
U1
U2
OFF
OFF
OFF
OFF
ON
L1
L2
L1
OFF
ON
ON
ON
Load
Load
L2
L1
ON
PGND
L2
ON
PGND
Charge mode
A current flows into the motor coil.
Load
OFF
PGND
Fast mode
The energy of the motor coil
is fed back to the power
Slow mode
A current circulates around the
motor coil and this device.
Output transistor function
MODE
U1
U2
L1
L2
CHARGE
ON
OFF
OFF
ON
SLOW
OFF
OFF
ON
ON
FAST
OFF
ON
ON
OFF
Note: This table shows an example of when the current flows as indicated by the arrows in the figures shown above.
If the current flows in the opposite direction, refer to the following table.
MODE
U1
U2
L1
L2
CHARGE
OFF
ON
ON
OFF
SLOW
OFF
OFF
ON
ON
FAST
ON
OFF
OFF
ON
This IC controls the motor current to be constant by 3 modes listed above.
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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Calculation of the Predefined Output Current
For PWM constant-current control, this IC uses a clock generated by the OSCM oscillator.
The peak output current (Setting current value) can be set via the current-sensing resistor (RS) and the reference
voltage (Vref), as follows:
Vref(V)
Iout(max) = Vref(gain) ×
RRS(Ω)
Vref(gain) : the Vref decay rate is 1/ 5.0 (typ.)
For example : In the case of a 100% setup
when Vref = 3.0 V, Torque=100%,RS=0.51Ω, the motor constant current (Setting current value) will be
calculated as:
Iout = 3.0V / 5.0 / 0.51Ω= 1.18 A
Calculation of the OSCM oscillation frequency (chopper reference frequency)
An approximation of the OSCM oscillation frequency (fOSCM) and chopper frequency (fchop)
can be calculated by the following expressions.
fOSCM=1/[0.56x{Cx(R1+500)}]
………C,R1: External components for OSCM (C=270pF , R1=5.1kΩ => About fOSCM= 1.12MHz(Typ.))
fchop = fOSCM / 16
………fOSCM=1.12MHz => fchop =About 70kHz
If chopping frequency is raised, Rippl of current will become small and wave-like reproducibility will improve. However, the
gate loss inside IC goes up and generation of heat becomes large.
By lowering chopping frequency, reduction in generation of heat is expectable. However, Rippl of current may become large.
It is a standard about about 70 kHz. A setup in the range of 50 to 100 kHz is recommended.
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Absolute Maximum Ratings (Ta = 25°C)
Symbol
Characteristics
Rating
Unit
Remarks
Motor power supply
VM
50
V
-
Motor output voltage
Vout
50
V
-
Motor output current
Iout
4.0
A
(Note 1)
Internal Logic power supply
VCC
6.0
V
When externally applied.
VIN(H)
6.0
V
-
Logic input voltage
VIN(L)
-0.4
V
-
SO output voltage
VSO
6.0
V
-
LO output voltage
VLO
ISO
6.0
30
30
V
mA
mA
-
PD
HTSSOP48 PD
Operating temperature
TOPR
1.3
W
(Note 2)
1.3
W
(Note 2)
-20 to 85
°C
-
Storage temperature
TSTR
-55 to 150 °C
-
Junction temperature
Tj(max)
150
-
SO Inflow current
LO Inflow current
Power dissipation
ILO
WQFN48
°C
Note 1: Usually, the maximum current value at the time should use 70%(Iout≦2.8 A) or less of the absolute maximum
ratings for a standard on thermal rating. The maximum output current may be further limited in view of thermal
considerations, depending on ambient temperature and board conditions.
Note 2: Device alone (Ta =25°C)
When Ta exceeds 25oC, it is necessary to do the derating with 10.4 mW/oC.
Ta: Ambient temperature
Topr: Ambient temperature while the IC is active
Tj: Junction temperature while the IC is active. The maximum junction temperature is limited by the thermal
shutdown (TSD) circuitry. It is advisable to keep the maximum current below a certain level so that the
maximum junction temperature, Tj (MAX), will not exceed 120°C.
Caution）Absolute maximum ratings
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for
a moment. Do not exceed any of these ratings.
Exceeding the rating (s) may cause device breakdown, damage or deterioration, and may result in injury by
explosion or combustion.
The value of even one parameter of the absolute maximum ratings should not be exceeded under any
circumstances. This product does not have overvoltage detection circuit. Therefore, the device is damaged if a
voltage exceeding its rated maximum is applied.
All voltage ratings, including supply voltages, must always be followed. The other notes and considerations
described later should also be referred to.
Operation Ranges (Ta=-20 to 85°C)
Symbol
Min
Typ.
Max
Unit
Motor power supply
VM
10
24
47
V
-
Motor output current
Iout
-
1.5
3.0
A
(Note 1)
VIN(H)
VIN(L)
2.0
0
-
5.5
0.8
V
V
Logic input High Level
Logic input Low Level
VSO
VLO
-
3.3
3.3
5.0
5.0
V
V
fCLK
-
-
100
kHz
-
fchop(range)
40
70
150
kHz
-
Vref
GND
2.0
3.6
V
-
Characteristics
Logic input voltage
SO output pin voltage
LO output pin voltage
Clock input frequency
Chopper frequency
Vref input voltage
Remarks
Note 1: Maximum current for actual usage may be limited by the operating circumstances such as operating conditions
(exciting mode, operating time, and so on), ambient temperature, and heat conditions (board condition and so on).
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Electrical Specifications 1 (Ta = 25°C, VM = 24 V, unless specified otherwise)
Characteristics
HIGH
LOW
Logic input voltage
Logic input hysteresis voltage
HIGH
Logic input current
Symbol
Test condition
Min
Typ.
Max
Unit
VIN(H)
VIN(L)
VIN(HYS)
IIN(H)
Logic input (Note)
Logic input (Note)
2.0
0
-
5.5
0.8
V
V
Logic input (Note)
Logic input of
measurement=3.3V
Logic input of
measurement=0V
100
-
33
300
-
mV
µA
-
-
1
µA
LOW
IIN(L)
SO output pin voltage
LOW
VOL(SO)
IOL=24mA output=Low
-
0.2
0.5
V
LO output pin voltage
LOW
VOL(LO)
IOL=24mA output=Low
-
0.2
0.5
V
-
2
3.5
mA
-
3.5
5.5
mA
-
5.5
7
mA
-
-
1
µA
1
-5
0
5
µA
%
-5
0
0
-
5
10
%
µA
－
0.49
0.6
Ω
IM1
Power consumption
IM2
IM3
Output leakage current
High-side
IOH
Output pins=open
Standby mode
Output pins=open
Standby release ENABLE=Low
Output pins=open
Full step resolution
VRS=VM=50V,Vout=0V
Low-side
IOL
VRS=VM=Vout=50V
ΔIout1
Current differential between Ch
Motor current channel differential
Motor current setting accuracy
ΔIout2
Iout=1.5A
RS pin current
IRS
VRS=VM=24V
Motor output ON-resistance
Tj=25°C, Forward direction
Ron(H+L)
(High-side+Low-side)
(High-side+Low-side)
Note: VIN (H) is defined as the VIN voltage that causes the outputs (OUTA+/-,OUTB+/-) to change when a pin under
test is gradually raised from 0 V. V IN (L) is defined as the V IN voltage that causes the outputs (OUTA+/-, OUTB+/-)
to change when the pin is then gradually lowered. The difference between V IN (H) and V IN (L) is defined as the V
IN (HYS).
Note: When the logic signal is applied to the device whilst the VM power supply is not asserted; the device is designed
not to function, but for safe usage, please apply the logic signal after the VM power supply is asserted and the VM
voltage reaches the proper operating range.
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Electrical Specifications 2 (Ta =25°C, VM = 24 V, unless specified otherwise)
Characteristics
Symbol
Test condition
Min
Typ.
Max
Unit
Vref input current
Iref
Vref=2.0V
-
0
1
μA
VCC voltage
VCC
ICC=5.0mA
4.75
5.0
5.25
V
VCC current
ICC
VCC=5.0V
-
2.5
5
mA
Vref gain rate
Thermal shutdown(TSD)
threshold (Note1)
Vref(gain)
Vref=2.0V
1/5.2
1/5.0
1/4.8
－
TjTSD
－
145
160
175
°C
VM recovery voltage
Over-current detection (ISD)
threshold (Note2)
VMR
－
7.0
8.0
9.0
V
ISD
－
4.1
4.9
5.7
A
Note1: About TSD
When the junction temperature of the device reached the TSD threshold, the TSD circuit is triggered; the internal reset
circuit then turns off the output transistors. Noise rejection blanking time is built-in to avoid misdetection. Once the TSD
circuit is triggered, the device will be set to standby mode, and can be cleared by reasserting the VM power source, or
reinput of serial data after a STANDBY (BANK0 = [0, 0, 0]) setup. The TSD circuit is a backup function to detect a
thermal error, therefore is not recommended to be used aggressively.
Note2: About ISD
When the output current reaches the threshold, the ISD circuit is triggered; the internal reset circuit then turns off the output
transistors. Once the ISD circuit is triggered, the device keeps the output off until power-on reset (POR), is reasserted or
reinput of serial data after a STANDBY (BANK0 = [0, 0, 0]) setup. For fail-safe, please insert a fuse to avoid
secondary trouble.
Back-EMF
While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the
motor current recirculates back to the power supply due to the effect of the motor back-EMF.
If the power supply does not have enough sink capability, the power supply and output pins of the device might
rise above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor
characteristics. It must be fully verified that there is no risk that the IC or other components will
be damaged or fail due to the motor back-EMF.
Cautions on Overcurrent Shutdown (ISD) and Thermal Shutdown (TSD)
The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as an
output short-circuit; they do not necessarily guarantee the complete IC safety.
If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device
may be damaged due to an output short-circuit.
The ISD circuit is only intended to provide a temporary protection against an output short-circuit. If such a
condition persists for a long time, the device may be damaged due to overstress. Overcurrent conditions must be
removed immediately by external hardware.
IC Mounting
Do not insert devices incorrectly or in the wrong orientation. Otherwise, it may cause breakdown, damage and/or
deterioration of the device.
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AC Electrical Specification (Ta = 25°C, VM = 24 V, 6.8 mH/5.7 Ω)
Characteristics
Symbol
Test condition
Min
Typ.
Max
Unit
Inside filter of CLK input minimum
High width
tCLK(H)
The CLK(H) minimum pulse
width
300
-
-
ns
Inside filter of CLK input minimum
Low width
tCLK(L)
The CLK(L) minimum pulse
width
250
-
-
ns
tr
-
30
80
130
ns
Output transistor
tf
-
40
90
140
ns
switching specific
tpLH(CLK)
CLK-Output
-
1000
-
ns
tpHL(CLK)
CLK-Output
-
1500
-
ns
250
400
550
ns
VM=24V,Iout=1.5A
Analog noise blanking time
AtBLK
Oscillator frequency accuracy
∆fOSCM
COSC=270pF, ROSC=5.1 kΩ
-15
-
+15
%
Oscillator reference frequency
fOSCM
COSC= 270 pF, ROSC =5.1 kΩ
952
1120
1288
kHz
Chopping frequency
fchop
Output:Active(Iout =1.5 A),
fOSC = 1120 kHz
-
70
-
kHz
Analog tblank
AC Electrical Specification Timing chart
1/fCLK
tCLK(L)
50%
50%
50%
tCLK(H)
【CLK】
tpHL(CLK)
tpLH(CLK)
90%
90%
50%
50%
【OUT】
10%
tf
tr
10%
Timing charts may be simplified for explanatory purpose.
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Package Dimensions
P-WQFN48-0707-0.50-003
(unit :mm)
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Package Dimensions
HTSSOP48-P-300-0.50
(unit :mm)
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Notes on Contents
Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Timing Charts
Timing charts may be simplified for explanatory purposes.
Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass-production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application
circuits.
Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components and
circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
(1)
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not exceed any of these ratings.Exceeding the rating(s) may cause device
breakdown, damage or deterioration, and may result in injury by explosion or combustion.
(2)
Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative
terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding
the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by
explosion or combustion.
In addition, do not use any device inserted in the wrong orientation or incorrectly to which current is
applied even just once.
(3)
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in the
case of overcurrent and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse
noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can
lead to smoke or ignition. To minimize the effects of the flow of a large current in the case of breakdown,
appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required.
(4)
If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the
design to prevent device malfunction or breakdown caused by the current resulting from the inrush
current at power ON or the negative current resulting from the back electromotive force at power OFF.
IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in
protection functions. If the power supply is unstable, the protection function may not operate, causing IC
breakdown. IC breakdown may cause injury, smoke or ignition.
(5)
Carefully select external components (such as inputs and negative feedback capacitors) and load
components (such as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as from input or negative feedback condenser, the IC
output DC voltage will increase. If this output voltage is connected to a speaker with low input withstand
voltage, overcurrent or IC failure may cause smoke or ignition. (The overcurrent may cause smoke or
ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load (BTL)
connection-type IC that inputs output DC voltage to a speaker directly.
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Points to remember on handling of ICs
Overcurrent detection Circuit
Overcurrent detection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the overcurrent detection circuits operate against the overcurrent, clear the overcurrent status
immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the
overcurrent detection circuit to operate improperly or IC breakdown may occur before operation. In addition,
depending on the method of use and usage conditions, if overcurrent continues to flow for a long time after operation,
the IC may generate heat resulting in breakdown.
Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits
operate against the over-temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the thermal
shutdown circuit to operate improperly or IC breakdown to occur before operation.
Heat Radiation Design
When using an IC with large current flow such as power amp, regulator or driver, design the device so that heat is
appropriately radiated, in order not to exceed the specified junction temperature (TJ) at any time or under any
condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to
decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, when designing the device, take
into consideration the effect of IC heat radiation with peripheral components.
Back-EMF
When a motor rotates in the reverse direction, stops or slows abruptly, current flows back to the motor’s power
supply owing to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor
power supply and output pins might be exposed to conditions beyond the absolute maximum ratings. To avoid this
problem, take the effect of back-EMF into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in
this document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's
written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury
or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or
incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant
TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product
and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the
application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or
applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b)
evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms,
sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and
applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.
• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY
CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
("UNINTENDED USE"). Except for specific applications as expressly stated in this document, Unintended Use includes, without
limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for
automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions,
safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. IF YOU USE
PRODUCT FOR UNINTENDED USE, TOSHIBA ASSUMES NO LIABILITY FOR PRODUCT. For details, please contact your TOSHIBA
sales representative.
• Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
• Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any
applicable laws or regulations.
• The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any
infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any
intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.
• ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE
FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY WHATSOEVER,
INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING
WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND
(2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT,
OR INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
• Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation,
for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology
products (mass destruction weapons). Product and related software and technology may be controlled under the applicable export laws
and regulations including, without limitation, the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration
Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all
applicable export laws and regulations.
• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.
Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING
AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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