TB67S145FTG
Toshiba BiCD Process Integrated Circuit Silicon Monolithic
TB67S145FTG
Serial controlled unipolar stepping motor driver
The TB67S145 is a serial controlled PWM chopping type, 2 phase
unipolar stepping motor driver. Using the BiCD process, the TB67S
145 can be operated with VM voltage of 45V, output voltage of
84V, and output current of 3.0A at max (absolute maximum ratings).
FTG
P-WQFN48-0707-0.50-003
Weight: 0.1 g (Typ.)
Features
・BiCD process monolithic integrated circuit.
・Capable of operating one unipolar stepping motor
・PWM controlled constant current drive
・Full, half step resolution
・Low on resistance (0.25Ω(Typ.)) output MOSFET
・High voltage and current (for specification, please refer to the absolute maximum ratings and operation ranges).
・Brake mode function
・Standby (low power) mode function
・4 bit-16 setting torque adjust function
・Serial to parallel convert circuit (8bit shift register) built in.
・Capable of 3 line logic (Data/Clock/Latch signal) output function (controllable by cascade connection)
・Error detect feedback signal output function (Over current/Thermal shutdown).
・Error detect function (Thermal shutdown(TSD), Over current(ISD), and Low voltage(POR).
・Built-in VCC regulator for internal circuit use.
・Fixed off time can be adjusted by external components.
Note) Please be careful about the thermal conditions during use.
©2014 TOSHIBA CORPORATION
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TB67S145FTG
Pin assignment
(TB67S145FTG)
NC
VCOM
VCOM
NC
GND
NC
VM
NC
VCC
VCC
VREF
NC
(Top View)
36 35 34 33 32 31 30 29 28 27 26 25
OSCM
37
24 OUTB+
ERR
38
23 OUTB+
ALM
39
22 RSGNDB
NC
40
21 RSGNDB
LOUT
41
20 OUTB-
COUT
42
DOUT
43
18 OUTA-
NC
44
17 OUTA-
DATA
45
16 RSGNDA
CLOCK
46
15 RSGNDA
LATCH
47
14 OUTA+
NC
48
13 OUTA+
19 OUTB-
4
5
6
7
8
9 10 11 12
NC
CLR
NC
GATE
STANDBY
BRAKE
GND
NC
NC
3
NC
2
NC
1
NC
TB67S145FTG
(*) Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the
PCB.
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TB67S145 block diagram
DOUT
COUT
LOUT
CLOCK
DATA
Serial-Parallel
converter
LATCH
STANDBY
Serial data
register
control
Ach
Pre
drv
Ach
OUT
Nch×2
OUTA+
OUTARSGNDA
STANDBY
Control
RS Comp
VREF
OSCM
VM
VCC
GATE
Vref
Torque Control
External brake
BRAKE
Internal OSC
POR
VCC regulator
Error detect
(TSD/ISD)
ERR
Pre TSD
ALM
VCOM
RS Comp
CLR
Bch
Pre
drv
Bch
OUT
Nch×2
OUTB+
OUTBRSGNDB
Functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes.
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TB67S145FTG
Application Notes
All the grounding wires of the device must run on the solder mask on the PCB and be externally terminated at
only one point. Also, a grounding method should be considered for efficient heat dissipation.
Careful attention should be paid to the layout of the output, VM and GND traces, to avoid short circuits across
output pins or to the power supply or ground. If such a short circuit occurs, the device may be permanently
damaged.
Also, the utmost care should be taken for pattern designing and implementation of the device since it has power
supply pins (VM, RSGND, OUT, GND) through which a particularly large current may run. If these pins are
wired incorrectly, an operation error may occur or the device may be destroyed.
The logic input pins must also be wired correctly. Otherwise, the device may be damaged owing to a current
running through the IC that is larger than the specified current.
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Pin explanations
TB67S145FTG (WQFN48)
Pin No.1 to 28
Pin No.
Pin Name
Function
1
NC
Non connection
2
NC
Non connection
3
CLR
Serial register clear pin
4
NC
Non connection
5
GATE
6
STANDBY
7
BRAKE
8
GND
9
NC
Non connection
10
NC
Non connection
11
NC
Non connection
12
NC
Non connection
13
OUTA+
Motor output
A+ pin
14
OUTA+
Motor output
A+ pin
15
RSGNDA
Ach current sense ground pin
16
RSGNDA
Ach current sense ground pin
17
OUTA-
Motor output
A-pin
18
OUTA-
Motor output
A-pin
19
OUTB-
Motor output
B-pin
20
OUTB-
Motor output
B-pin
21
RSGNDB
Bch current sense ground pin
22
RSGNDB
Bch current sense ground pin
23
OUTB+
Motor output
B+ pin
24
OUTB+
Motor output
B+ pin
25
NC
26
VCOM
Common pin
27
VCOM
Common pin
28
NC
Register gate pin
Standby control pin
Brake control pin
Ground pin
Non connection
Non connection
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Pin No.29 to 48
Pin No.
Pin Name
Function
29
GND
30
NC
Non connection
31
VM
VM power supply pin
32
NC
Non connection
33
VCC
Internal VCC regulator monitor pin
34
VCC
Internal VCC regulator monitor pin
35
VREF
Constant current threshold set pin
36
NC
37
OSCM
38
ERR
Error detect feedback signal output pin
39
ALM
Thermal alarm output pin
40
NC
41
LOUT
Serial latch output pin
42
COUT
Serial clock output pin
43
DOUT
Shift register data output pin
44
NC
45
DATA
Serial data input pin
46
CLOCK
Serial clock input pin
47
LATCH
Serial latch input pin
48
NC
Ground pin
Non connection
Fixed off time set pin
Non connection
Non connection
Non connection
Note:
・Please do not run patterns under NC pins.
・Please connect the pins with the same pin name, while using the device.
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INPUT/OUTPUT Equivalent circuit
CLOCK
DATA
LATCH
CLR
STANDBY
BRAKE
Input / Output
Equivalent circuit
1kΩ
Logic
Input
Logic input (VIH/VIL)
100kΩ
Pin name
VIH: 3.0V(min) to 5.5V(max)
VIL : 0V(min) to 2.0V(max)
GND
100kΩ
VCC
Logic input (VIH/VIL)
GATE
Logic
Output
VIH: 3.0V(min) to 5.5V(max)
VIL : 0V(min) to 2.0V(max)
1kΩ
GND
ERR
ALM
Logic
Output
Logic output (VOH/VOL)
(Pullup resistance :10k to 100kΩ)
GND
VCC
DOUT
Logic output
COUT
High level: VCC-0.3V(Typ.)
Low level: GND+0.3V(Typ.)
LOUT
Logic
Output
GND
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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TB67S145FTG
Pin name
Input / Output
Equivalent circuit
VCC
VCC voltage range
4.75V(min) to 5.0V(Typ.) to 5.25V(max)
VCC
VREF
1kΩ
VREF
VREF input voltage range
0V to 4.0V (Constant current control)
VCC short(Constant current control : off)
GND
1kΩ
500Ω
OSCM
OSCM frequency setup (reference)
0.82MHz(min) to 3.2MHz(Typ.) to
8.2MHz(max)
OSCM
(R_OSCM=3.9kΩ to 10kΩ to 39kΩ)
GND
VCOM
OUTA+
OUTAOUTB+
OUTBRSGNDA
RSGNDB
VCOM
OUTPUT
(-) pin
OUTPUT
(+) pin
VM voltage range
10V(min) to 40V(max)
OUT pin voltage range
10V(min) to 80V(max)
RSGND
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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TB67S145 function explanation
Serial input (8bit shift register + 8bit storage register)
CLR
DATA
D
CLOCK
R
Q
SCK
D
LATCH
D
R
Q
D
Q
RCK
D
Q
D
SCK
SCK
R
R
R
Q
RCK
D
R
Q
D
SCK
R
Q
RCK
R
Q
D
SCK
D
R
Q
RCK
D
R
Q
D
SCK
R
Q
RCK
D
R
Q
D
SCK
R
Q
RCK
D
R
Q
D
SCK
R
Q
RCK
D
R
Q
NSCK
R
DOUT
COUT
Q
RCK
LOUT
GATE
PHASEA
PHASEB
ENABLEA
Settings
LSB
PHASEA
ENABLEA
PHASEB
TRQ 3
TRQ 1
ENABLEB
ENABLEB
TRQ 2
-
TRQ1
TRQ 4
TRQ2
TRQ3
MSB
TRQ4
Functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes.
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Serial logic input/output timing chart example
LATCH
DATA
1
0
1
0
1
0
1
1
CLOCK
(Register
data)
TRQ
TRQ
TRQ
TRQ
4
3
2
1
1
0
1
0
ENB
PHB
1
1
IC1
PHA
ENA
1
0
(CLOCK)
DOUT
1
0
0
1
1
0
1
1
COUT
(Register
data)
TRQ
TRQ
TRQ
TRQ
4
3
2
1
0
1
1
0
ENB
1
PHB
1
ENA
PHA
0
IC2
1
LOUT
Timing charts may be simplified for explanatory purpose.
IC1:
Serial data(DATA) is imported to the shift register with the up-edge of Serial clock signal.
Finally, when the serial latch signal(LATCH) is asserted, the data in the shift register is
exported to the storage register to be reflected to the motor control.
COUT(CLOCK-OUT) and LOUT(LATCH-OUT) signal will be output through a buffer.
IC2:
The motor can be controlled by using IC1 DOUT signal as IC2 DATA, IC1 COUT signal
as IC2 CLOCK, and IC1 LOUT signal as IC2 LATCH.
Note that the DOUT(DATA-OUT) will be output by down-edge of CLOCK signal; to assure
the setup-hold time with COUT. (Delayed by half cycle of CLOCK.)
Therefore make sure that the CLOCK signal is set to Low after the serial transfer.
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・Truth table
Input
Function
DATA
CLOCK
CLR
LATCH
GATE
X
X
X
X
H
PHASEA,PHASEB,ENABLEA,ENABLEB,TRQ1,TRQ2,TRQ3,TRQ4
data = disable.
X
X
X
X
L
PHASEA,PHASEB,ENABLEA,ENABLEB,TRQ1,TRQ2,TRQ3,TRQ4
data = enable
X
X
L
X
X
Shift register and storage register is initialized
L
↑
H
X
X
The first data of the shift register is L, and the other register will be stored
with the data before.
H
↑
H
X
X
The first data of the shift register is H, and the other register will be stored
with the data before.
X
↓
H
X
X
The shift register data will maintain its status. The data after the shift
register(Qh) will be output from D_OUT pin.
X
X
H
↑
X
Shift register data will be stored to the storage register.
X
X
H
↓
X
The storage register data will maintain its status.
X: Don’t care
・Logic signal explanation
Internal
signal
High
Low
Notes
ENABLE
OUTPUT: ON
OUTPUT: OFF
High: The corresponding channel’s OUTPUT will be ON
Low: The corresponding channel’s OUTPUT will be OFF(Hi-Z)
PHASE
OUTX+: ON
OUTX-: OFF(Hi-Z)
OUTX+: OFF(Hi-Z)
OUTX-: ON
High: Current flows through VM-OUT(+) coil during charge status.
Low: Current flows through VM-OUT(-) coil during charge status.
STANDBY
Motor operational
IC all functions off
The internal oscillator as well as motor output will stop when
STANDBY is set to Low. (The motor cannot be operated.)
TRQ function current ratio
TRQ1
TRQ2
TRQ3
TRQ4 (MSB)
Current ratio (%)
L
L
L
L
L
L
0
L
H
L
5
L
H
L
10
L
L
H
H
15
L
H
L
L
25
L
H
L
H
29
L
H
H
L
38
L
H
H
H
43
H
L
L
L
52
H
L
L
H
60
H
L
H
L
67
H
L
H
H
74
H
H
L
L
80
H
H
L
H
86
H
H
H
L
94
H
H
H
H
100
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TB67S145FTG
BRAKE mode function
OUTA-
OUTA+
OUTB-
OUTB+
VCOM
RSGNDA
RSGNDB
Equivalent circuit(s) may be omitted for explanatory purpose.
BRAKE
Function
H
Brake mode: ON
L
Brake mode OFF (Normal operation)
(During Constant current control; VREF≤4.0V)
Phase status when BRAKE is set to ‘High’
PHASE=L
PHASE=H
IOUT
-100%
+100%
Note) When the PHASE signal is switched during BRAKE=H, the current flow will also be switched, as shown in the
graph above. (For example, when PHASE is switched from ‘Low’ to ‘High’, the current control will be switched from
OUT(-) side to OUT(+) side.)
Note) When BRAKE is set to High, the current setting will be set to 100%; regardless of IN1 and IN2 input.
Note) Current polarity in the graph is defined as ‘plus’ when the current flows from VM to OUT+ during charge status
(OUT+ side MOSFET is turned on), and is defined as ‘minus’ when the current flows from VM to OUT- during
charge status (OUT- side MOSFET is turned on).
(During Constant current control “off”; VREF-VCC direct connected)
When BRAKE is set to ‘High’; All four output MOSFETs (OUTA+,OUTA-,OUTB+,OUTB-) will turn on.
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TB67S145FTG
Standby mode function
Setting the STANDBY pin will enable the device to be set to Standby mode (=Low power mode) which will cut all
unneccesary internal bais current to reduce power consumption. The ISD(over current)/TSD(Thermal shutdown)
status can also be reseted by STANDBY.
STANDBY
Function
H
Standby mode: OFF(normal operation)
L
Standby mode: ON(Low power mode)
The ISD(over current)/TSD(Thermal shutdown) status will be reseted when STANDBY is set to Low or reasserting the
VM power source.
Note) After STANDBY is set to High, the internal circuit will restart from low power mode. Therefore it is preferable not
to input any logic signal for 10μs, after the STANDBY is set to High. (If the logic signal is input to the device during
wake-up period, the device may not be able to receive the signal correctly.)
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TB67S145FTG
Monitor pin functions (ERR feedback)
ERR
Function
Hi-Z (*)
Normal operation
Low
Error detected (TSD or ISD)
(*) The ERR pin is an open drain logic output. To use the function correctly, please make sure the ERR
pin is connected to 3.3V or 5.0V with a pull-up resistance. During normal operation, the pin level will be
Hi-Z (internal MOSFET:OFF) (it will show High level when pulled up), and once an error (TSD or ISD) has
been detected, the pin level will be Low (internal MOSFET: ON).
Reasserting the VM power supply or using the STBY function, the ERR pin will return to the initial status
(internal MOSFET: OFF).
ERR pin should be left open; when not using the ERR feedback function.
3.3V or 5V
Pull-up resistance
(10kΩ to 100kΩ)
ERR pin
ERR logic
[ERR MOSFET]
ON: TSD or ISD detected
OFF: Normal operation
Equivalent circuit(s) may be omitted for explanatory purpose.
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TB67S145FTG
Monitor pin functions (Thermal ALM feedback)
ALM
Function
Hi-Z (*)
Normal operation
Low
Thermal Alarm detected
(*) The ALM pin is an open drain logic output. To use the function correctly, please make sure the ALM
pin is connected to 3.3V or 5.0V with a pull-up resistance. During normal operation, the pin level will be
Hi-Z (internal MOSFET: OFF) (it will show High level when pulled up), and once the device detects a
temperature rise, the pin level will be Low (internal MOSFET: ON).
The ALM is an auto recovery type output. Once the device reaches the ALM detect threshold(120°C±15°C),
the pin level will show Low (internal MOSFET: ON), and after the device reaches the ALM release threshold
(‘detect threshold’-30°C), the pin level will show Hi-Z (internal MOSFET: OFF) (it will show High level when
pulled up)
ALM pin should be left open; when not using the thermal ALM feedback function.
Pull-up voltage
(3.3V or 5V)
ALM pin
GND
90°C(±15°C)
120°C(±15°C)
3.3V or 5V
Pull-up resistance
(10kΩ to 100kΩ)
ALM pin
ALM logic
[ALM MOSFET]
ON: ALM detect threshold
OFF: Normal operation
or ALM release threshold
Timing charts may be simplified for explanatory purpose.
Equivalent circuit(s) may be omitted for explanatory purpose.
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TB67S145FTG
TB67S145 setup
Constant-current threshold setting
The constant-current threshold can be set by VREF voltage.
IOUT(max)=VREF × 3/4
Example: Current setting 100%, VREF=2.0V: The constant current thredhold(peak current) will be as shown below.
IOUT = 2.0×3/4=1.5A
To set the constant-current function ‘off’, connect the VCC and VREF pin directly (do not use any external power supply).
Also, please be careful about the thermal conditions during use.
Fixed off time setting
To set the fixed off time for constant-current PWM control, please connect a pull-down resistance to the OSCM pin.
The relation between the pull-down resistance(ROSCM) and fixed off time is as shown below.
(For reference)
Pull-down resistance
(ROSCM)
Fixed off time (toff)
3.9kΩ
4.7kΩ
5.6kΩ
6.8kΩ
8.2kΩ
10kΩ
15kΩ
18kΩ
22kΩ
27kΩ
39kΩ
4.1μs
4.9μs
5.8μs
7.0μs
8.3μs
10μs
15μs
18μs
21μs
26μs
37μs
(*) The value shown in the graph above does not include any dispersion of the device / external components.
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TB67S145FTG
OFF TIME for PHASE switching
OUT-
OUT+
VCOM
L2
L1
RSGND
Constant-current control with L2 side MOSFET
Constant-current control with L1 side MOSFET
L1
(OUT+ MOSFET)
L2
(OUT- MOSFET)
ON
OFF
ON
OFF
ON
OFF
ON
OFF
OFF
ON
OFF
ON
L1, L2 both off time
Timing charts may be simplified for explanatory purpose.
When the internal PHASE signal is switched from Low to High or High to Low (the above timing chart is one example), there is an
off time, to avoid both OUT+ and OUT- MOSFET to turn ON at the same time.
Using the internal system oscillator (fOSCS=6.4MHz), the switching time is about 3CLK (including the synchronous time
difference; 1+3CLK=4CLK at the most): the off time is about 470 to 625ns.
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TB67S145FTG
Absolute maximum ratings (Ta=25°C)
Characteristics
Symbol
Rating
Unit
VM(max)
45
V
VM-VCOM voltage differential
VDIFF(max)
45
V
Motor output voltage
VOUT(max)
84
V
Motor output current (per channel)
IOUT(max)
3.0
A
Internal logic power supply
VCC(max)
6.0
V
VIN(H)(max)
6.0
V
VIN(L)(min)
-0.4
V
VREF input voltage
VREF(max)
6.0
V
Open drain output pin (ERR,ALM) voltage
VOD(max)
6.0
V
Open drain output pin (ERR,ALM) inflow current
IOD(max)
20
mA
Power dissipation (WQFN48; device alone)
PD
1.3
W
Operating temperature
Topr
-20 to 85
°C
Storage temperature
Tstg
-55 to 150
°C
Junction temperature
Tj(max)
150
°C
Motor power supply
Logic input voltage
Caution)Absolute maximum ratings
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not exceed any of these ratings.
Exceeding the rating (s) may cause device breakdown, damage or deterioration, and may result in
injury by explosion or combustion.
The value of even one parameter of the absolute maximum ratings should not be exceeded under
any circumstances. The device does not have overvoltage detection circuit. Therefore, the device is
damaged if a voltage exceeding its rated maximum is applied.
All voltage ratings, including supply voltages, must always be followed. The other notes and
considerations described later should also be referred to.
Note : About the power dissipation
If the ambient temperature is above 25°C, the power dissipation must be de-rated by 10.4mW/°C.
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Operation ranges
Characteristics
Symbol
Test condition
Min
Typ.
Max
Unit
Motor power supply
VM
-
10
-
40
V
Motor output voltage
VOUT
-
10
-
80
V
Motor output current (per channel)
IOUT
Ta=25°C
-
1.5
3.0
A
Internal logic power supply
VCC
-
4.75
5.0
5.25
V
VIN(H)
Logic input high level
3.0
-
5.5
V
VIN(L)
Logic input low level
0
-
2.0
V
VREF input voltage range
VREF(range)
-
GND
-
5.5
V
Open drain pin voltage range
VOD(range)
ERR,ALM pin
3.0
-
5.5
V
Open drain pin inflow current range
IOD(range)
ERR,ALM pin
-
-
10
mA
Internal oscillator frequency range
fOSCM(range)
-
820
3200
8200
kHz
tOFF(range)
-
5
10
40
μs
Logic input voltage
Fixed off time range
Note) Please use the device with extra margin regarding the absolute maximum ratings.
Note) Please be careful about the thermal conditions during use.
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Electrical Specifications 1 (Ta = 25°C, VM = 24 V, unless specified otherwise)
Characteristics
Symbol
Test condition
Min
Typ.
Max
Unit
VIH
Logic input pin (*) High level
3.0
-
5.5
V
VIL
Logic input pin (*) Low level
GND
-
2.0
V
VIN(HYS)
Logic input pin (*)
300
-
500
mV
High
IIN(H)
Logic input voltage High level (VIN=VIH)
-
33
55
μA
Low
IIN(L)
Logic input voltage Low level (VIN=VIL)
-
-
1
μA
-
-
1.0
mA
-
3.0
5.0
mA
0
-
0.5
V
-5
0
+5
%
Logic input voltage
Logic input hysteresis voltage
Logic input current
Output pins=open
VIN=VIL
IM1
Standby mode
Power consumption
Output pins=open
IM2
Normal operation
mode, Full step resolution
Open drain output pin voltage
VOD(L)
IOD=10mA
Motor current channel
⊿IOUT1
Current differential between channels
differential
Motor current setting accuracy
(IOUT=1.0A)
⊿IOUT2
IOUT=1.0A
-6
0
+6
%
VFN
IOUT=2.0A
1.0
-
1.6
V
Ileak
VOUT=80V, Output MOSFET:OFF
-
-
1
μA
RON(D-S)
IOUT=2.0A
-
0.25
0.35
Ω
Source-drain diode
forward voltage
Motor output off leak current
Motor output ON-resistance
(Low side)
(*): VIN (H) is defined as the VIN voltage that causes the outputs (OUTA, OUTB) to change when a pin
under test is gradually raised from 0 V. VIN (L) is defined as the VIN voltage that causes the outputs (OUTA,
OUTB) to change when the pin is then gradually lowered. The difference between VIN (L) and VIN (H) is
defined as the input hysteresis (VIN(HYS)).
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Electrical Specifications 2 (Ta =25°C, VM = 24 V, unless specified otherwise)
Characteristics
Symbol
Min
Typ.
Max
Unit
VCC regulator voltage
VCC
ICC=5.0mA
4.75
5
5.25
V
VCC regulator current
ICC
4.75V≤VCC≤5.25V
-
2.5
5.0
mA
VREF input current
IREF
VREF=2.0V
-
0
1.0
μA
TjTSD
-
140
155
170
°C
VCC recovery voltage
VCCR
-
3.5
4.0
4.5
V
VM recovery voltage
VMR
-
7.0
8.0
9.0
V
ISD
-
3.1
4.0
5.0
A
Thermal shutdown(TSD) threshold
Test condition
(Note1)
Over-current detection(ISD) threshold
(Note2)
Note1) About Thermal shutdown (TSD)
When the junction temperature of the device reached the TSD threshold, the TSD circuit is triggered; the internal
reset circuit then turns off the output transistors. Noise rejection blanking time is built-in to avoid misdetection.
Once the TSD circuit is triggered; the detect latch signal can be cleared by reasserting the VM power source, or
setting the device to standby mode. The TSD circuit is a backup function to detect a thermal error, therefore
is not recommended to be used aggressively.
Note2) About Over-current detection (ISD)
When the output current reaches the threshold, the ISD circuit is triggered; the internal reset circuit then turns
off the output transistors. Once the ISD circuit is triggered, the detect latch signal can be cleared by reasserting
the VM power source, or setting the device to standby mode. For fail-safe, please insert a fuse to avoid secondary
trouble.
Cautions on Overcurrent Shutdown (ISD) and Thermal Shutdown (TSD)
The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as an
output short-circuit; they do not necessarily guarantee the complete IC safety.
If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device
may be damaged due to an output short-circuit.
The ISD circuit is only intended to provide a temporary protection against an output short-circuit. If such condition
persists for a long time, the device may be damaged due to overstress. Overcurrent conditions must be removed
immediately by external hardware.
Back-EMF
While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the
motor current recirculates back to the power supply due to the effect of the motor back-EMF.
If the power supply does not have enough sink capability, the power supply and output pins of the device might
rise above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor
characteristics. It must be fully verified that there is no risk that the device or other components will
be damaged or fail due to the motor back-EMF.
IC Mounting
Do not insert devices incorrectly or in the wrong orientation. Otherwise, it may cause breakdown, damage and/or
deterioration of the device.
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AC Electrical Specifications 2 (Ta =25°C, VM = 24 V, unless specified otherwise)
Characteristics
Symbol
Test condition
Min
Typ.
Max
Unit
tlogic(twp)
DATA,CLOCK,LATCH
50
-
-
ns
tlogic(twn)
DATA,CLOCK,LATCH
50
-
-
ns
tcyc
DATA,CLOCK,LATCH
100
-
-
ns
tset1
CLR→CLOCK
50
-
-
ns
tset2
DATA→CLOCK
50
-
-
ns
tset3
CLOCK→LATCH
50
-
-
ns
thold1
CLOCK→DATA
50
-
-
ns
thold2
CLR→internal serial register
50
-
-
ns
Minimum serial signal pulse width
Minimum serial signal cycle
Minimum setup time
Minimum hold time
Output MOSFET switching specific
tr
-
50
100
150
ns
(rise time, fall time)
tf
-
50
100
150
ns
Analog noise blanking time
AtBLK
Analog tblank time
250
400
550
ns
OSCM frequency
fOSCM
ROSC=10kΩ
2720
3200
3680
kHz
OSCS frequency
fOSCS
-
5120
6400
7680
kHz
fOSCM=3.2MHz
8.5
10
11.5
μs
tISD(mask)
fOSCS(=6.4MHz)*8clk
1.0
1.25
1.5
tTSD(mask)
fOSCS(=6.4MHz)*32clk
4.0
5.0
6.0
tALM(mask)
fOSCS(=6.4MHz)*16clk
2.0
2.5
3.0
Fixed off time
tOFF
Over current (ISD) detect
μs
masking time
Thermal shutdown (TSD) detect
μs
masking time
Thermal Alarm(ALM) detect
μs
masking time
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Application circuit example
0.1μF
24V
3.3V
0.1μF
ZD
2.0V
100μF
3.3V
10kΩ
36
37
25
24
10kΩ
10kΩ
M
13
12
48
1
Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB.
The application circuit above is an example; therefore, mass-production design is not guaranteed.
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(For reference) PD-Ta graph
PD-Ta Graph of TB67S145FTG
4.5
4.0
Power dissipation PD [W]
3.5
(2)
3.0
2.5
2.0
1.5
(1)
1.0
0.5
0.0
0
25
50
75
100
125
150
Ambient temperature Ta [℃]
(1) … Device alone
(2) … When mounted to a 4 layer glass epoxy board (power dissipation example of
Rth(j-a)=25°C/W (when mounted); dependent of board and mount condition.)
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Package dimensions: P-WQFN48-0707-0.50-003
(Unit: mm)
Weight: 0.1 g (Typ.)
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Notes on Contents
Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for
explanatory purposes.
Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Timing Charts
Timing charts may be simplified for explanatory purposes.
Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass-production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application
circuits.
Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components
and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
(1)
(2)
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not exceed any of these ratings.Exceeding the rating(s) may cause device
breakdown, damage or deterioration, and may result in injury by explosion or combustion.
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in the
case of overcurrent and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal
pulse noise occurs from the wiring or load, causing a large current to continuously flow and the
breakdown can lead to smoke or ignition. To minimize the effects of the flow of a large current in the
case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit
location, are required.
(3)
If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the
design to prevent device malfunction or breakdown caused by the current resulting from the inrush
current at power ON or the negative current resulting from the back electromotive force at power OFF.
IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in
protection functions. If the power supply is unstable, the protection function may not operate, causing
IC breakdown. IC breakdown may cause injury, smoke or ignition.
(4)
Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative
terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in
injury by explosion or combustion.
In addition, do not use any device inserted in the wrong orientation or incorrectly to which current is
applied even just once.
(5) Carefully select external components (such as inputs and negative feedback capacitors) and load
components (such as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as from input or negative feedback condenser, the IC
output DC voltage will increase. If this output voltage is connected to a speaker with low input
withstand voltage, overcurrent or IC failure may cause smoke or ignition. (The overcurrent may cause
smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load
(BTL) connection-type IC that inputs output DC voltage to a speaker directly.
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TB67S145FTG
Points to remember on handling of ICs
Overcurrent detection Circuit
Overcurrent detection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the overcurrent detection circuits operate against the overcurrent, clear the overcurrent status
immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the
overcurrent detection circuit to operate improperly or IC breakdown may occur before operation. In addition,
depending on the method of use and usage conditions, if overcurrent continues to flow for a long time after
operation, the IC may generate heat resulting in breakdown.
Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits
operate against the over-temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the
thermal shutdown circuit to operate improperly or IC breakdown to occur before operation.
Heat Radiation Design
When using an IC with large current flow such as power amp, regulator or driver, design the device so that heat is
appropriately radiated, in order not to exceed the specified junction temperature (Tj) at any time or under any
condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to
decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, when designing the device, take
into consideration the effect of IC heat radiation with peripheral components.
Back-EMF
When a motor rotates in the reverse direction, stops or slows abruptly, current flows back to the motor’s power
supply owing to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s
motor power supply and output pins might be exposed to conditions beyond the absolute maximum ratings. To
avoid this problem, take the effect of back-EMF into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
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in this document, and related hardware, software and systems (collectively "Product") without notice.
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or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all
relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for
Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for
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design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or
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