TB67S511FTAG
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TB67S511FTAG
Phase-in controlled Bipolar Stepping Motor Driver
The TB67S511FTAG is a two-phase bipolar stepping motor driver using a
PWM chopper. An interface is phase-in control.
Fabricated with the BiCD process, rating is 40 V/2.0 A.
Features
P-WQFN36-0606-0.50-002
•
Monolithic IC integrated by BiCD process
•
Capable of controlling bipolar stepping motor by single IC
•
PWM controlled constant-current drive
•
Supporting full, half, and quarter step resolutions
•
Built-in output MOSFET with low ON resistance (Upper + Lower side = 0.8 Ω (typ.))
•
Weight: 0.10 g (typ.)
High voltage and current drive (For specifications, please refer to the absolute maximum ratings and the
operation ranges)
•
Built-in output functions of error detection (TSD and ISD) flags
•
Built-in error detection circuits (Thermal shutdown (TSD), over-current detection circuit (ISD), and power-on
reset (POR))
•
Built-in VCC regulator for internal circuit drive
•
Chopping frequency of a motor can be customized by external components
•
Package: P-WQFN36-0606-0.50-002
Note: Please be careful about thermal conditions during use.
©2016 TOSHIBA CORPORATION
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TB67S511FTAG
OUT_B2+
OUT_B1+
RS_B2
VM
RS_B1
NC
VCC
NC
NC
Pin assignment
27 26 25 24 23 22 21 20 19
18 GND
NC 28
GND
29
17 OUT_B1-
VREF_B
30
16 OUT_B2-
VREF_A
31
15 GND
OSCM
32
IN_A1
33
TB67S511FTAG
14 NC
(Top View)
13 GND
IN_A2 34
12 OUT_A2-
4
5
6
NC
RS_A1
7
8
9
OUT_A2+
3
OUT_A1+
2
RS_A2
1
GND
10 GND
STANDBY
PHASE_B 36
IN_B1
11
IN_B2
PHASE_A 35
OUT_A1-
*: Please mount the four-corner pins of the QFN package and the exposed pad to the GND area of the PCB.
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TB67S511FTAG
Block diagram
IN_A1
IN_A2
Standby
Control
+
Phase/Step
Selector
+
Signal Decode
Logic
IN_B1
IN_B2
PHASE_A
PHASE_B
Motor
Oscillator
System
Oscillator
VCC
Regulator
Current
Level
Set
Current
Reference
Setting
Motor Control Logic
Predriver
TSD
OSCM
VCC
VM
Power-on
Reset
STANDBY
Current
Comp
OSC-Clock
Converter
VREF_A
VREF_B
Current
Comp
Predriver
RS_A*
RS_B*
ISD
GND
OUT_A*+
OUT_A*-
OUT_B*+
OUT_B*Note: * means 1 or 2.
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
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TB67S511FTAG
Note:
All the grounding wires of the TB67S511FTAG should run on the solder mask on the PCB and be externally
terminated at only one point. Also, a grounding method should be considered for efficient heat dissipation.
Utmost care is necessary in the design of the output, VM, and GND lines since the IC may be destroyed by
short-circuiting between outputs, or by short-circuiting to the power supply or ground. Especially, if power supply
pins (VM, RS, OUT, and GND), through which a particularly large current may run, are wired incorrectly, an
operation error may occur or the device may be destroyed.
Also, if logic input pins are wired incorrectly, an operation error may occur or the device may be destroyed.
In this case, the IC may be destroyed because over rating current flows. Pay enough attention in designing
patterns and mounting the IC.
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TB67S511FTAG
Pin descriptions
Pin No.
Pin Name
Function
1
IN_B1
Bch step resolution control 1
2
IN_B2
Bch step resolution control 2
3
STANDBY
4
GND
5
NC
6
RS_A1
Sense resistor connection pin for setting current of Ach output
7
RS_A2
Sense resistor connection pin for setting current of Ach output
8
OUT_A1+
Motor Ach (+) output pin
9
OUT_A2+
Motor Ach (+) output pin
10
GND
Power ground pin of Ach
11
OUT_A1-
Motor Ach (-) output pin
12
OUT_A2-
Motor Ach (-) output pin
13
GND
Power ground pin of Ach
14
NC
Standby mode set pin
Ground pin
Non-connection pin
Non-connection pin
15
GND
Power ground pin of Bch
16
OUT_B2-
Motor Bch (-) output pin
17
OUT_B1-
Motor Bch (-) output pin
18
GND
Power ground pin of Bch
19
OUT_B2+
Motor Bch (+) output pin
20
OUT_B1+
Motor Bch (+) output pin
21
RS_B2
Sense resistor connection pin for setting current of Bch output
22
RS_B1
Sense resistor connection pin for setting current of Bch output
23
VM
VM power supply pin
24
NC
Non-connection pin
25
VCC
26
NC
Non-connection pin
27
NC
Non-connection pin
28
NC
Non-connection pin
29
GND
30
VREF_B
Motor Bch current threshold set pin
31
VREF_A
Motor Ach current threshold set pin
32
OSCM
Internal oscillator frequency set pin for chopping
33
IN_A1
Ach step resolution control 1
34
IN_A2
Ach step resolution control 2
35
PHASE_A
Signal input pin of PWM current direction for Ach
36
PHASE_B
Signal input pin of PWM current direction for Bch
Internal VCC regulator monitor pin
Ground pin
*: Please keep NC pins open.
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TB67S511FTAG
Equivalent circuit
6, 7
21, 22
1 kΩ
100 kΩ
1, 2, 3,
33, 34, 35, 36
8, 9
19, 20
11, 12
16, 17
GND
GND
25
1 kΩ
1 kΩ
32
500 Ω
30, 31
GND
GND
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Pin No
1
2
3
6, 7
8, 9
11, 12
16, 17
19, 20
21, 22
23
25
30
31
32
33
34
35
36
Pin name
IN_B1
IN_B2
STANDBY
RS_A*
OUT_A*+
OUT_A*OUT_B*OUT_B*+
RS_B*
VM
VCC
VREF_B
VREF_A
OSCM
IN_A1
IN_A2
PHASE_A
PHASE_B
Note: * means 1 or 2.
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TB67S511FTAG
Function description (Stepping motor modes)
Motor output current (Iout): The flow from OUT+ to OUT- is defined as the plus current. The flow from OUT- to OUT+
is defined as the minus current.
A ch
B ch
Input
Output
Input
Output
PHASE_A
IN_A1
IN_A2
Iout (A)
PHASE_B
IN_B1
IN_B2
Iout (B)
H
H
H
+100 %
H
H
H
+100 %
L
H
H
-100 %
H
H
H
+100 %
L
H
H
-100 %
L
H
H
-100 %
H
H
H
+100 %
L
H
H
-100 %
Please set IN_A1, IN_A2, IN_B1, and IN_B2 low in supplying a power.
A ch
B ch
Input
Output
Input
Output
PHASE_A
IN_A1
IN_A2
Iout (A)
PHASE_B
IN_B1
IN_B2
Iout (B)
H
H
H
+100 %
H
H
H
+100 %
X
L
L
0%
H
H
H
+100 %
L
H
H
-100 %
H
H
H
+100 %
L
H
H
-100 %
X
L
L
0%
L
H
H
-100 %
L
H
H
-100 %
X
L
L
0%
L
H
H
-100 %
H
H
H
+100 %
L
H
H
-100 %
H
H
H
+100 %
X
L
L
0%
X: Don't care
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TB67S511FTAG
A ch
B ch
Input
Output
Input
Output
PHASE_A
IN_A1
IN_A2
Iout (A)
PHASE_B
IN_B1
IN_B2
Iout (B)
H
H
L
+71 %
H
H
L
+71 %
H
L
H
+38 %
H
H
H
+100 %
X
L
L
0%
H
H
H
+100 %
L
L
H
-38 %
H
H
H
+100 %
L
H
L
-71 %
H
H
L
+71 %
L
H
H
-100 %
H
L
H
+38 %
L
H
H
-100 %
X
L
L
0%
L
H
H
-100 %
L
L
H
-38 %
L
H
L
-71 %
L
H
L
-71 %
L
L
H
-38 %
L
H
H
-100 %
X
L
L
0%
L
H
H
-100 %
H
L
H
+38 %
L
H
H
-100 %
H
H
L
+71 %
L
H
L
-71 %
H
H
H
+100 %
L
L
H
-38 %
H
H
H
+100 %
X
L
L
0%
H
H
H
+100 %
H
L
H
+38 %
X: Don't care
Others
Pin Name
IN_A1, IN_A2
IN_B1, IN_B2
H
L
Notes
The current value of each ch is set up with 2
inputs and 4 values.
PHASE_A
OUT+: H
OUT+: L
PHASE_B
OUT-: L
OUT-: H
STANDBY
Standby release
Standby mode
8
Please refer to the above-mentioned current value
setting table.
When PHASE is set high, the charge current flows
from OUT+ to OUT-.
When STANDBY is set low, operations of an internal
oscillating circuit and a motor output block stop. (The
motor cannot drive.)
2016-12-08
TB67S511FTAG
Current vector (Full step resolution)
100%
D
A
CCW
Current of A ch [%]
CW
-100%
100%
0%
C
B
-100%
Current of B ch [%]
A
B
C
D
A
B
C
D
A
B
C
D
A
B
100%
Iout (A)
0%
-100%
100%
Iout (B)
0%
-100%
PHASE_A
IN_A1
IN_A2
PHASE_B
IN_B1
IN_B2
H
L
H
L
H
L
H
L
H
L
H
L
CCW
CW
Timing charts may be simplified for explanatory purpose.
Please set IN_A1, IN_A2, IN_B1, and IN_B2 low in supplying a power.
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TB67S511FTAG
Current vector (Half step resolution)
G
100%
A
H
CCW
Current of A ch [%]
CW
F
B
-100%
0%
E
100%
C
D
-100%
Current of B ch [%]
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
100%
Iout (A)
0%
-100%
100%
Iout (B)
0%
-100%
PHASE_A
IN_A1
IN_A2
PHASE_B
IN_B1
IN_B2
H
L
H
L
H
L
H
L
H
L
H
L
CCW
CW
Timing charts may be simplified for explanatory purpose.
Please set IN_A1, IN_A2, IN_B1, and IN_B2 low in supplying a power.
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TB67S511FTAG
Current vector (Quarter step resolution)
N
O
P
100%
M
A
71%
Current of A ch [%]
L
CCW
38%
K
B
CW
0%
-100% -71%
38%
-38%
J
71% 100%
C
-38%
D
-71%
I
E
-100%
H
G
F
Current of B ch [%]
N O P A BCD E F G H I J K L MN O P A BCD E F G H I J K L MN O P A
Iout (A)
100%
71%
38%
0%
-38%
-71%
-100%
Iout (B)
100%
71%
38%
0%
-38%
-71%
-100%
PHASE_A
IN_A1
IN_A2
PHASE_B
IN_B1
IN_B2
H
L
H
L
H
L
H
L
H
L
H
L
CCW
CW
Timing charts may be simplified for explanatory purpose.
Please set IN_A1, IN_A2, IN_B1, and IN_B2 low in supplying a power.
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TB67S511FTAG
Mixed Decay Mode /Detecting zero point
fchop
CR pin
Internal CLK
waveform
DECAY MODE
Setting current
NF
37.5%
MIXED
DECAY
MODE
MDT
CHARGE MODE → NF: Reach setting current → SLOW MODE
→ MIXED DECAY TIMMING → FAST MODE → Monitoring current
→ (In case setting current > Outputting current) CHARGE MODE
Charge
Charge
RNF
Fast
Slow
Slow
Fast
Note
Iout = 0
Hi-Z
Note: When the motor current reaches zero level (Iout = 0 A), the output becomes “Hi-Z” state.
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TB67S511FTAG
Output transistor function mode
VM
VM
RRS
VM
RRS
RS pin
RRS
RS pin
U1
RS pin
U2
U1
U2
U1
U2
OFF
OFF
OFF
OFF
ON
L1
L2
L1
OFF
ON
ON
ON
Load
Load
L2
L1
ON
GND
L2
ON
GND
Charge mode
A current flows into
the motor coil.
Load
OFF
GND
Fast mode
The energy of the motor coil
is fed back to the power
Slow mode
A current circulates around the
motor coil and the IC.
Output transistor function
MODE
U1
U2
L1
L2
CHARGE
ON
OFF
OFF
ON
SLOW
OFF
OFF
ON
ON
FAST
OFF
ON
ON
OFF
Note: In case of the current direction shown in the above figures.
If the current flows in the opposite direction, refer to the following table.
MODE
U1
U2
L1
L2
CHARGE
OFF
ON
ON
OFF
SLOW
OFF
OFF
ON
ON
FAST
ON
OFF
OFF
ON
This IC controls the constant motor current by 3 modes listed above.
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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TB67S511FTAG
Calculation of setting current
This IC drives a motor by controlling the PWM constant current with the base of the OSCM oscillating frequency.
The peak output current (Setting current) can be determined by the current-sensing resistor (RS) and the reference
voltage (Vref) as follows;
Vref (V)
Iout (max) = Vref (gain) ×
RRS (Ω)
Vref (gain): Vref decay rate = 1/ 5.0 (typ.)
Example: In the case of a 100% setup,
When Vref = 3.0 V, Torque = 100%, and RS = 0.51 Ω, the constant output current (peak current) of the motor is
calculated as follows;
Iout = 3.0 V / 5.0 / 0.51 Ω = 1.18 A
Calculation of the OSCM oscillation frequency (chopper reference frequency)
An approximation of the OSCM oscillation frequency (fOSCM) and chopping frequency (fchop) can be calculated by
the following formula.
fOSCM = 1/ [0.56 × {Cx (R1+500)}]
*C and R1: External constant number for OSCM (When C = 270 pF and R1 = 3.6 kΩ, fOSCM = 1.6 MHz (typ.))
fchop = fOSCM / 16
*When fOSCM = 1.6 MHz, fchop is approximately 100 kHz.
If chopping frequency is raised, the ripple of the current decreases and the waveform reproducibility is improved.
However, the gate loss inside IC becomes large and the heat generation increases.
By lowering chopping frequency, reduction of heat generation is expectable. However, the ripple of the current may
increase. Generally, a frequency of about 70 kHz is set as a reference value. A setup in the range of 50 to 100 kHz is
recommended.
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TB67S511FTAG
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Motor power voltage
Motor output voltage
Motor output current
Internal logic power supply
Logic input voltage
Vref reference voltage
Power dissipation
Operating temperature
Storage temperature
Junction temperature
Symbol
VM
Vout
Iout
VCC
VIN(H)
VIN(L)
Vref
PD
Topr
Tstg
Tj(max)
Rating
40
40
2.0
6.0
6.0
-0.4
5.0
1.3
-20 to 85
-55 to 150
150
Unit
V
V
A
V
V
V
V
W
°C
°C
°C
Remarks
―
―
(Note 1)
When externally applied.
―
―
―
(Note 2)
―
―
―
Note 1: The maximum current value in the normal operation should be set 70% or less of the absolute maximum
ratings after thermal calculation. The maximum output current may be further limited in view of thermal
considerations, depending on the ambient temperature and the board conditions.
Note 2:
Device alone (Ta = 25°C)
When Ta exceeds 25°C, please correct the values by derating (10.4 mW/°C).
Ta: Ambient temperature
Topr: Ambient temperature while the IC is active
Tj: Junction temperature while the IC is active. The maximum junction temperature is limited by the thermal
shutdown (TSD) circuitry. It is recommended to keep the maximum current below a certain level so that the
maximum junction temperature (Tj (max)) will not exceed 120°C.
Caution) Absolute maximum ratings
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even
for a moment. Do not exceed any of these ratings.
Exceeding the rating (s) may cause device breakdown, damage or deterioration, and may result in injury by
explosion or combustion.
The value of even one parameter of the absolute maximum ratings should not be exceeded under any
circumstances. The TB67S511FTAG does not have overvoltage detection circuit. Therefore, the device is
damaged if a voltage exceeding its rated maximum is applied.
All voltage ratings, including supply voltages, must always be followed. The other notes and considerations
described later should also be referred to.
PD-Ta graph (Device alone / Mounted to board) (For reference only)
PD - Ta
Mounted to board
Device alone
Board conditions
4-layer glass epoxy board
μm 35 μm
Cu thickness: 1 layer and 4 layers:μm
55 μm, 2 layers and 3 layers:
Board size: 100 mm ×110 mm ×1.6 mm
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TB67S511FTAG
Operation Ranges (Ta = -20 to 85°C)
Characteristics
Symbol
Min
Typ.
Max
Unit
Remarks
Motor power supply
VM
10
24
35
V
―
Motor output current
Iout
―
―
2.0
A
(Note)
VIN(H)
2.0
―
5.5
V
Logic input High Level
VIN(L)
0
―
0.8
V
Logic input Low Level
Phase input frequency
fPHASE
―
―
400
kHz
―
Chopping frequency
fchop(range)
40
70
150
kHz
―
Vref input voltage
Vref
0.5
2.0
3.6
V
―
Logic input voltage
Note: Maximum current for actual usage may be limited by the operating circumstances such as operating conditions
(exciting mode, operating time, and so on), ambient temperature, and heat conditions (board condition and so
on). Please confirm the maximum usage current by thermal calculation under the usage circumstances.
Electrical characteristics 1 (Ta = 25°C and VM = 24 V, unless specified otherwise)
Characteristics
HIGH
LOW
Logic input hysteresis voltage
HIGH
Logic input current
LOW
Logic input voltage
Symbol
Test condition
Min
Typ.
Max
Unit
VIN(H)
VIN(L)
VIN(HYS)
IIN(H)
IIN(L)
Logic input (Note)
Logic input (Note)
Logic input (Note)
VIN(H) = 3.3 V
VIN(L) = 0 V
2.0
0
100
―
―
―
―
―
33
―
5.5
0.8
300
―
1
V
V
mV
µA
µA
―
2.5
3.5
mA
4.0
5.5
5
7
IM1
Power consumption
IM2
IM3
Output leakage current
Output pins = open
STANDBY = L
Output pins = open
STANDBY = H
Output pins = open
(Full step resolution)
―
―
mA
mA
Upper
IOH
VRS = VM = 40 V, Vout = 0 V
―
―
1
µA
Lower
IOL
VRS = VM = Vout = 40 V
Current differential between Ch
Iout = 1.0 A
Iout = 1.0 A
VRS = VM = 24 V
Tj = 25°C, Forward direction
(Upper-side + Lower-side)
Design value
1
―
―
µA
-5
0
5
%
-5
0
0
―
5
27
%
µA
―
0.8
0.88
Ω
Motor current channel differential
Motor current setting accuracy
RS pin current
Motor output ON-resistance between
drain and source
(Upper-side + Lower-side)
ΔIout1
ΔIout2
IRS
Ron(H+L)
Note: VIN(H) is defined as the VIN voltage that makes the outputs (OUT_A and OUT_B) change when the test pin
voltage is gradually raised from 0 V. VIN(L) is defined as the VIN voltage that makes the outputs (OUT_A and
OUT_B) change when the test pin voltage is gradually lowered from 5 V. The difference between VIN(H) and
VIN(L) is defined as the VIN (HYS).
Note: When the logic signal is input to the device while the VM is not supplied, the device is designed not to generate
EMF and the leakage current. However, for safe usage, please control the logic signal to prevent motor
operation by VM resupply.
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TB67S511FTAG
Electrical characteristics 2 (Ta =25°C and VM = 24 V, unless specified otherwise)
Symbol
Test condition
Min
Typ.
Max
Unit
Vref input current
Characteristics
Iref
VREF = 2.0 V
―
0
1
μA
VCC voltage
VCC
ICC = 5.0 mA
4.75
5.0
5.25
V
VCC current
ICC
VCC = 5.0 V
―
2.5
5
mA
Vref gain rate
Vref(gain)
VREF = 2.0 V
1/5.2
1/5.0
1/4.8
―
Thermal shutdown (TSD) threshold (Note1)
TjTSD
―
145
160
175
°C
VM recovery voltage
VMR
―
7.0
8.0
9.0
V
Over current detection (ISD)
threshold (Note2)
ISD
Design value
2.5
3.2
4.0
A
Note 1: Thermal shutdown circuit (TSD)
When the junction temperature of the device reaches the TSD threshold, the TSD circuit is triggered; the internal
reset circuit then turns off the output transistors. Noise rejection blanking time is built-in to avoid misdetection. Once
the TSD circuit is triggered, the device will be set to standby mode, and can be cleared by reasserting the VM power
source, or setting the STANDBY pin to standby mode. The TSD circuit is a backup function to detect a thermal error,
therefore is not recommended to be used aggressively.
Note 2: Over current detection (ISD)
When the output current reaches the threshold, the ISD circuit is triggered; the internal reset circuit then turns off
the output transistors. Noise rejection blanking time is built-in to avoid misdetection occurred by switching. Once the
ISD circuit is triggered, the device keeps the output off until power-on reset (POR), is reasserted or the device is set to
standby mode by STANDBY pin. For fail-safe, please insert a fuse to avoid secondary trouble.
Back-EMF
While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the motor
current recirculates back to the power supply due to the effect of the motor back-EMF.
If the power supply does not have enough sink capability, the power supply and output pins of the device might rise
above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor
characteristics.
Cautions on Overcurrent detection (ISD) and Thermal shutdown (TSD)
The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as an
output short-circuits; they do not necessarily guarantee the complete IC safety.
If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device
may be damaged due to an output short-circuit.
The ISD circuit is only intended to provide a temporary protection against an output short-circuit. If such a condition
persists for a long time, the device may be damaged due to overstress. Overcurrent conditions must be removed
immediately by external hardware.
IC Mounting
Do not insert devices incorrectly or in the wrong orientation. Otherwise, it may cause breakdown, damage and/or
deterioration of the device.
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AC electrical characteristics (Ta = 25°C, VM = 24 V, and 6.8 mH/5.7 Ω)
Characteristics
Symbol
Test condition
Min
Typ.
Max
tPHASE(min)
―
100
―
―
twp
―
50
―
―
twn
―
50
―
―
tr
―
150
200
250
Output transistor
tf
―
100
150
200
switching characteristics
tpLH(PHASE)
Between PHASE and OUT
250
750
1200
tpHL(PHASE)
Between PHASE and OUT
250
750
1200
450
700
950
ns
Minimum PHASE pulse width
VM = 24 V, IOUT = 1.5 A
Unit
ns
ns
Blanking time for noise
reduction
AtBLK
OSCM oscillation frequency
fOSCM
COSC = 270 pF, ROSC = 3.6 kΩ
1200
1600
2000
kHz
Chopping frequency
fchop
Output: Active (IOUT = 1.5 A),
fOSCM = 1600 kHz
―
100
―
kHz
Analog tblank
AC characteristics timing chart
1/fPHASE
twn
50%
50%
50%
twp
PHASE
tpHL(PHASE)
tpLH(PHASE)
90%
90%
50%
50%
OUT
10%
tf
tr
10%
Timing charts may be simplified for explanatory purpose.
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Application circuit example (TB67S511FTAG) (in case chopping frequency = 70 kHz)
The values in the following figure are recommended values.
OUT_B2+
RS_B2
VM
VCC
RS_B1
0.1 µF 0.51 Ω
100 µF
OUT_B1+
24 V
0.1 µF
GND
0.1 µF
GND
OUT_B1-
GND
VREF_B
OUT_B2GND
VREF_A
5.1 kΩ
M
GND
OSCM
270 pF
5V
3.3 V
OUT_A2+
OUT_A1+
0.51 Ω
RS_A2
RS_A1
PHASE_B
IN_B1
0V
5V
3.3 V
GND
PHASE_A
GND
0V
OUT_A1-
IN_A2
5V
3.3 V
STANDBY
0V
5V
3.3 V
OUT_A2IN_A1
IN_B2
0V
5V
5V
5V
3.3 V 3.3 V
3.3 V
0V
0V
0V
Note: The addition of a bypass capacitor is recommended if necessary. The GND wiring should be connected to one
point as much as possible.
The application circuit shown above is provided for reference purposes only. Thorough evaluation is required,
especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application
circuits.
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Package dimensions
P-WQFN36-0606-0.50-002
unit: mm
Weight: 0.10 g (typ.)
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for
explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory
purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass-production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application
circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components
and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
(1)
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause device
breakdown, damage or deterioration, and may result in injury by explosion or combustion.
(2)
Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative
terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding
the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by
explosion or combustion.
In addition, do not use any device inserted in the wrong orientation or incorrectly to which current is
applied even just once.
(3)
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in the
case of overcurrent and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse
noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can
lead to smoke or ignition. To minimize the effects of the flow of a large current in the case of breakdown,
appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required.
(4)
If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the
design to prevent device malfunction or breakdown caused by the current resulting from the inrush
current at power ON or the negative current resulting from the back electromotive force at power OFF.
IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in
protection functions. If the power supply is unstable, the protection function may not operate, causing IC
breakdown. IC breakdown may cause injury, smoke or ignition.
(5)
Carefully select external components (such as inputs and negative feedback capacitors) and load
components (such as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as from input or negative feedback capacitor, the IC
output DC voltage will increase. If this output voltage is connected to a speaker with low input
withstand voltage, overcurrent or IC failure may cause smoke or ignition. (The overcurrent may cause
smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load
(BTL) connection-type IC that inputs output DC voltage to a speaker directly.
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TB67S511FTAG
Points to remember on handling of ICs
Overcurrent detection Circuit
Overcurrent detection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the overcurrent detection circuits operate against the overcurrent, clear the overcurrent status
immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the
overcurrent detection circuit to operate improperly or IC breakdown may occur before operation. In addition,
depending on the method of use and usage conditions, if overcurrent continues to flow for a long time after operation,
the IC may generate heat resulting in breakdown.
Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits
operate against the over-temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the thermal
shutdown circuit to operate improperly or IC breakdown to occur before operation.
Heat Radiation Design
When using an IC with large current flow such as power amp, regulator or driver, design the device so that heat is
appropriately radiated, in order not to exceed the specified junction temperature (TJ) at any time or under any
condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to
decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, when designing the device, take
into consideration the effect of IC heat radiation with peripheral components.
Back-EMF
When a motor rotates in the reverse direction, stops or slows abruptly, current flows back to the motor’s power
supply owing to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor
power supply and output pins might be exposed to conditions beyond the absolute maximum ratings. To avoid this
problem, take the effect of back-EMF into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in
this document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's
written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury
or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or
incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant
TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product
and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the
application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or
applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b)
evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms,
sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and
applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.
• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY
CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
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limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for
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AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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