TC4027BP/BF/BFN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC4027BP,TC4027BF,TC4027BFN
TC4027B Dual J-K Master-Slave Flip Flop
TC4027B is J-K master-slave flip-flop having RESET and SET functions. In the case of J-K made, when the clock input is given with both RESET and SET at “L”, the output changes at rising edge of the clock according to the states of J and K. When SET input is placed at “H”, and RESET input is placed at “L”, outputs become Q = “H”, and Q = “L”. When RESET input is placed at “H”, and SET input is placed at “L”, outputs become Q = “L”, and Q = “H”. When both of RESET input and SET input are at “H”, outputs become Q = “H” and Q = “H”.
Note: xxxFN (JEDEC SOP) is not available in Japan. TC4027BP
TC4027BF
Pin Assignment
TC4027BFN
Block Diagram
Weight DIP16-P-300-2.54A SOP16-P-300-1.27A SOL16-P-150-1.27 : 1.00 g (typ.) : 0.18 g (typ.) : 0.13 g (typ.)
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Truth Table
Inputs RESET SET J * * * K * * * CLOCKΔ * * * Outputs Qn + 1
Qn + 1 L H H Qn* H L
Qn**
Qn *
L H H L L L L
L
H L H L L L L
L
H L H Qn* L H
Qn ** Qn*
L L H H
*
L H L H
*
*: Don’t care Δ: Level change
*: No change **: Change
Logic Diagram
1/2 TC4027B
Absolute Maximum Ratings (Note)
Characteristics DC supply voltage Input voltage Output voltage DC input current Power dissipation Operating temperature range Storage temperature range Symbol VDD VIN VOUT IIN PD Topr Tstg Rating VSS − 0.5 to VSS + 20 VSS − 0.5 to VDD + 0.5 VSS − 0.5 to VDD + 0.5
±10
Unit V V V mA mW °C °C
300 (DIP)/180 (SOIC)
−40 to 85 −65 to 150
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
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Operating Ranges (VSS = 0 V) (Note)
Characteristics DC supply voltage Input voltage Symbol VDD VIN Test Condition
⎯ ⎯
Min 3 0
Typ.
⎯ ⎯
Max 18 VDD
Unit V V
Note:
The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VDD or VSS.
Static Electrical Characteristics (VSS = 0 V)
Characteristics Symbol Test Condition VDD (V)
⎪IOUT⎪ < 1 μA −40°C
25°C Min 4.95 9.95 14.95
⎯ ⎯ ⎯ −0.51 −2.10 −1.30 −3.40
85°C Max
⎯ ⎯ ⎯
Min 4.95 9.95 14.95
⎯ ⎯ ⎯ −0.61 −2.50 −1.50 −4.00
Max
⎯ ⎯ ⎯
Typ. 5.00 10.00 15.00 0.00 0.00 0.00
−1.0 −4.0 −2.2 −9.0
Min 4.95 9.95 14.95
⎯ ⎯ ⎯ −0.42 −1.70 −1.10 −2.80
Max
⎯ ⎯ ⎯
Unit
5 10 15 5 10 15 5 5 10 15
High-level output voltage
VOH
VIN = VSS, VDD
⎪IOUT⎪ < 1 μA
V
0.05 0.05 0.05
⎯ ⎯ ⎯ ⎯
0.05 0.05 0.05
⎯ ⎯ ⎯ ⎯
0.05 0.05 0.05
⎯ ⎯ ⎯ ⎯
Low-level output voltage
VOL
VIN = VSS, VDD VOH = 4.6 V VOH = 2.5 V
V
Output high current
IOH
VOH = 9.5 V VOH = 13.5 V VIN = VSS, VDD VOL = 0.4 V
mA
5 10 15
0.61 1.50 4.00
⎯ ⎯ ⎯
0.51 1.30 3.40
1.2 3.2 12.0
⎯ ⎯ ⎯
0.42 1.10 2.80
⎯ ⎯ ⎯
Output low current
IOL
VOL = 0.5 V VOL = 1.5 V VIN = VSS, VDD VOUT = 0.5 V, 4.5 V
mA
5 10 15
3.5 7.0 11.0
⎯ ⎯ ⎯
3.5 7.0 11.0
2.75 5.50 8.25
⎯ ⎯ ⎯
3.5 7.0 11.0
⎯ ⎯ ⎯
Input high voltage
VIH
VOUT = 1.0 V, 9.0 V VOUT = 1.5 V, 13.5 V
⎪IOUT⎪ < 1 μA
V
VOUT = 0.5 V, 4.5 V Input low voltage VIL VOUT = 1.0 V, 9.0 V VOUT = 1.5 V, 13.5 V
⎪IOUT⎪ < 1 μA
5 10 15
⎯ ⎯ ⎯
1.5 3.0 4.0
⎯ ⎯ ⎯
2.25 4.50 6.75
1.5 3.0 4.0
⎯ ⎯ ⎯
1.5 3.0 4.0 V
Input current
“H” level “L” level
IIH IIL
VIH = 18 V VIL = 0 V VIN = VSS, VDD (Note)
18 18 5 10 15
⎯ ⎯ ⎯ ⎯ ⎯
0.1
−0.1
⎯ ⎯ ⎯ ⎯ ⎯
10−
−10
5
0.1
−0.1
⎯ ⎯ ⎯ ⎯ ⎯
1.0
−1.0
−5
μA
Quiescent supply current
1 2 4
0.002 0.004 0.008
1 2 4
30 60 120
μA
IDD
Note: All valid input combinations.
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Dynamic Electrical Characteristics (Ta = 25°C, VSS = 0 V, CL = 50 pF)
Characteristics Symbol Test Condition VDD (V) 5 tTLH
⎯
Min
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
Typ. 70 35 30 70 35 30 150 75 60 120 60 45 8 16 20
Max 200 100 80 200 100 80 300 130 90 300 130 90
⎯ ⎯ ⎯
Unit
Output transition time (low to high)
10 15 5
ns
Output transition time (high to low)
tTHL
⎯
10 15
ns
Propagation delay time (CLOCK-Q, Q )
tpLH tpHL
5
⎯
10 15 5
ns
Propagation delay time (SET, RESET-Q, Q )
tpLH tpHL
⎯
10 15 5
ns
3.5 8.0 12.0
Max clock frequency
fCL
⎯
10 15
MHz
Max clock input rise time Max clock input fall time
trCL tfCL
5
⎯
10 15 5
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
No limit
μs
Min pulse width (SET, RESET)
60 35 25 60 35 25 30 10 5
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
180 80 50 140 60 40 140 50 35 140 50 35 40 20 15 7.5 pF ns ns ns ns ns
tW
⎯
10 15 5
Min clock pulse width
tW
⎯
10 15
Min set-up time (J, K-CLOCK)
5 tSU
⎯
10 15 5
Min hold time (J, K-CLOCK)
tH
⎯
10 15 5
Min removal time (SET, RESET-CLOCK) Input capacitance
trem
⎯
10 15
CIN
⎯
5
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Waveforms for Measurement of Dynamic Characteristics
Waveform 1
Waveform 2
Waveform 3
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Package Dimensions
Weight: 1.00 g (typ.)
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Package Dimensions
Weight: 0.18 g (typ.)
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Package Dimensions (Note)
Note: This package is not available in Japan. Weight: 0.13 g (typ.)
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RESTRICTIONS ON PRODUCT USE
• The information contained herein is subject to change without notice.
20070701-EN GENERAL
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his document shall be made at the customer’s own risk. • The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties. • Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations.
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