TC551001

TOSHIBA TC551001BPL/BFL/BFTL/BTRL-70L/85L SILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM Description The TC551001BPL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits using CMOS technology, and operated from a single 5V power supply. Advanced circuit techniques provide both high speed and low power features with an operating current of 5mA/MHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2µA typically. The TC551001BPL has three control inputs. Chip Enable inputs (CE1, CE2) allow for device selection and data retention control, while an Output Enable input (OE) provides fast memory access. The TC551001BPL is suitable for use in microprocessor application systems where high speed, low power, and battery backup are required. The TC551001BPL is offered in a standard dual-in-line 32-pin plastic package, a small outline plastic package, and a thin small outline plastic package (forward, reverse type). Features • Low power dissipation: • Standby current: • 5V single power supply • Access time (max.) Pin Connection (Top View) 27.5mW/MHz (typ.) 4µA (max.) at Ta = 25°C TC551001BPL/BFL/BFTL/BTRL -70L Access Time CE1 Access Time CE2 Access Time OE Access Time 70ns 70ns 70ns 35ns -85L 85ns 85ns 85ns 45ns Power down feature: CE1, CE2 Data retention supply voltage: 2.0 ~ 5.5V Inputs and outputs directly TTL compatible Package TC551001BPL : DIP32-P-600 TC551001BFL : SOP32-P-525 TC551001BFTL : TSOP32-P-0820 TC551001BTRL : TSOP32-P-0820A Pin Names • • • • A0 ~ A16 R/W OE CE1, CE2 I/O1 ~ I/O8 VDD GND N.C. PIN NO. PIN NAME PIN NO. PIN NAME Address Inputs Read/Write Control Input Output Enable Input Chip Enable Inputs Data Input/Output Power (+5V) Ground No Connection 1 A11 17 A3 2 A9 18 A2 3 A8 19 A1 4 A13 20 A0 5 R/W 21 I/O1 6 CE2 22 I/O2 7 A15 23 I/O3 TSOP Pinout 8 VDD 24 GND 9 NC 25 I/O4 10 A16 26 I/O5 11 A14 27 I/O6 12 A12 28 I/O7 13 A7 29 I/O8 14 A6 30 CE1 15 A5 31 A10 16 A4 32 OE TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 1 TC551001BPL/BFL/BFTL/BTRL-70L/85L Block Diagram Static RAM SR01020795 Operating Mode OPERATION MODE Read Write Output Deselect Standby * H or L CE1 L L L H * CE2 H H H * L OE L * H * * R/W H L H * * I/O1 ~ I/O8 DOUT DIN High-Z High-Z High-Z POWER IDDO IDDO IDDO IDDS IDDS Maximum Ratings SYMBOL VDD VIN VI/O PD TSTRG TOPR ITEM Power Supply Voltage Input Voltage Input and Output Voltage Power Dissipation Storage Temperature Operating Temperature RATING -0.3 ~ 7.0 -0.3* ~ 7.0 -0.5 ~ VDD + 0.5 1.0/0.6** 260 -55 ~ 150 0 ~ 70 UNIT V V V W °C °C °C TSOLDER Soldering Temperature (10s) * -3.0V at pulse width of 50ns Max ** SOP 2 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. SR01020795 DC Recommended Operating Conditions SYMBOL VDD VIH VIL VDH PARAMETER Power Supply Voltage Input High Voltage Input Low Voltage Data Retention Supply Voltage MIN. 4.5 2.2 -0.3* 2.0 Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L TYP. 5.0 – – – MAX. 5.5 VDD + 0.3 0.8 5.5 UNIT V * -3.0V at pulse width of 50ns Max. DC and Operating Characteristics (Ta = 0 ~ 70ºC, VDD = 5V± 10%) SYMBOL ILI ILO IOH IOL IDDO1 PARAMETER Input Leakage Current Output Leakage Current Output High Current Output Low Current VIN = 0 ~ VDD CE1 = VIH or CE2 = VIL or R/W = VIL or OE = VIH, VOUT = 0 ~ VDD VOH = 2.4V VOL = 0.4V CE1 = VIL and CE2 = VIH and R/W = VIH, IOUT = 0mA Other Inputs = VIH/VIL Operating Current IDDO2 CE1 = 0.2V and CE2 = VDD - 0.2V R/W = VDD - 0.2V IOUT = 0mA Other Inputs = VDD - 0.2V/0.2V CE1 = VIH or CE2 = VIL Standby Current CE1 = VDD - 0.2V or CE2 = 0.2V VDD = 2.0V ~ 5.5V Ta = 0 ~ 70°C Ta = 25°C Min. tcycle 1µs Min. tcycle TEST CONDITION MIN. – – -1.0 4.0 – – – TYP. – – – – – – – MAX. ±1.0 ±1.0 – – 70 20 60 mA UNIT µA µA mA mA 1µs – – 10 IDDS1 IDDS2(1) – – – – – 2 3 30 4 mA µA Note: (1) In standby mode with CE1 ≥ VDD - 0.2V, these specification limits are guaranteed under the condition of CE2 ≥ VDD - 0.2V or CE2 ≤ 0.2V. Capacitance (Ta = 25ºC, f = 1MHz) SYMBOL CIN COUT PARAMETER Input Capacitance Output Capacitance VIN = GND VOUT = GND TEST CONDITION MAX. 10 10 UNIT pF Note: This parameter is periodically sampled and is not 100% tested. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 3 TC551001BPL/BFL/BFTL/BTRL-70L/85L Static RAM SR01020795 AC Characteristics (Ta = 0 ~ 70°C, VDD = 5V± 10%) Read Cycle TC551001BPL/BFL/BFTL/BTRL SYMBOL PARAMETER MIN. tRC tACC tCO1 tCO2 tOE tCOE tOEE tOD tODO tOH Read Cycle Time Address Access Time CE1 Access Time CE2 Access Time Output Enable to Output in Valid Chip Enable (CE1, CE2) to Output in Low-Z Output Enable to Output in Low-Z Chip Enable (CE1, CE2) to Output in High-Z Output Enable to Output in High-Z Output Data Hold Time 70 – – – – 10 5 – – 10 -70L MAX. – 70 70 70 35 – – 25 25 – MIN. 85 – – – – 10 5 – – 10 -85L MAX. – 85 85 85 45 – – 30 30 – ns UNIT Write Cycle TC551001BPL/BFL/BFTL/BTRL SYMBOL PARAMETER MIN. tWC tWP tCW tAS tWR tODW tOEW tDS tDH Write Cycle Time Write Pulse Width Chip Selection to End of Write Address Setup Time Write Recovery Time R/W to Output in High-Z R/W to Output in Low-Z Data Setup Time Data Hold Time 70 50 60 0 0 – 5 30 0 -70L MAX. – – – – – 25 – – – MIN. 85 60 75 0 0 – 5 35 0 -85L MAX. – – – – – 30 – – – ns UNIT AC Test Conditions Input Pulse Levels Input Pulse Rise and Fall Time Input Timing Measurement Reference Level Output Timing Measurement Reference Level Output Load 2.4V/0.6V 5ns 1.5V 1.5V 1 TTL Gate and CL = 100pF 4 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. SR01020795 Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L Timing Waveforms Read Cycle (1) Write Cycle 1 (4) (R/W Controlled Write) TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 5 TC551001BPL/BFL/BFTL/BTRL-70L/85L Write Cycle 2 (4) (CE1 Controlled Write) Static RAM SR01020795 Write Cycle 3 (4) (CE2 Controlled Write) 6 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. SR01020795 Notes: 1. R/W is High for Read Cycle. Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L 2. Assuming that CE1 Low transition or CE2 High transition occurs coincident with or after the R/W low transition, Outputs remain in a high impedance state. 3. Assuming that CE1 High transition or CE2 Low transition occurs coincident with or prior to the R/W high transition, Outputs remain in a high impedance state. 4. Assuming that OE is High for a Write Cycle, Outputs are in a high impedance state during this period. 5. The I/O may be in the output state during this time, input signals of opposite phase must not be applied. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 7 TC551001BPL/BFL/BFTL/BTRL-70L/85L Data Retention Characteristics (Ta = 0 ~ 70°C) SYMBOL VDH IDDS2 tCDR tR PARAMETER Data Retention Supply Voltage Standby Current Chip Deselect to Data Retention Mode Recovery Time Static RAM SR01020795 MIN. 2.0 VDD = 3.0V VDD = 5.5V – – 0 5 TYP. – – – – – MAX. 5.5 15* 30 – – UNIT V µA ns ms *3µA (max.) Ta = 0 ~ 40°C CE1 Controlled Data Retention Mode (1) CE2 Controlled Data Retention Mode (3) Notes: 1. In the CE1 controlled data retention mode, minimum standby current is achieved under the condition CE2 ≤ 0.2V or CE2 ≥ VDD - 0.2V. 2. If the VIH of CE1 is 2.2V in operation, during the period that the VDD voltage is going down from 4.5V to 2.4V, IDDS1 current flows. 3. In the CE2 controlled data retention mode, minimum standby current is achieved under the condition CE2 ≤ 0.2V. 8 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. SR01020795 Outline Drawing DIP32-P-600 Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L Unit in mm TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 9 TC551001BPL/BFL/BFTL/BTRL-70L/85L Outline Drawing SOP32-P-525 Static RAM SR01020795 Unit in mm 10 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. SR01020795 Outline Drawing TSOP32-P-0820 Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L Unit in mm TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 11 TC551001BPL/BFL/BFTL/BTRL-70L/85L Outline Drawing TSOP32-P-0820A Static RAM SR01020795 Unit in mm 1. This technical data may be controlled under U.S. Export Administration Regulations and may be subject to the approval of the U.S. Department of Commerce prior to export. Any export or re-export, directly or indirectly, in contravention of the U.S. Export Administration Regulations is strictly prohibited. 2. LIFE SUPPORT POLICY Toshiba products described in this document are not authorized for use as critical components in life support systems without the written consent of the appropriate officer of Toshiba America, Inc. Life support systems are either systems intended for surgical implant in the body or systems which sustain life. A critical component in any component of a life support system whose failure to perform may cause a malfunction of the life support system, or may affect its safety or effectiveness. 3. The information in this document has been carefully checked and is believed to be reliable; however no responsibility can be assumed for inaccuracies that may not have been caught. All information in this data book is subject to change without prior notice. Furthermore, Toshiba cannot assume responsibility for the use of any license under the patent rights of Toshiba or any third parties. 12 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. Back to Memory