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TC5565APL-10

TC5565APL-10

  • 厂商:

    TOSHIBA(东芝)

  • 封装:

  • 描述:

    TC5565APL-10 - 65,536 bit static random access memory organized as 8,192 words by 8 bits using CMOS ...

  • 数据手册
  • 价格&库存
TC5565APL-10 数据手册
TOSHIBA MOS MEMORY PRODUCTS TC5565APL-10, TC5565APL-12, TC5565APL-15 TC5565AFL-10, TC5565AFL-12, TC5565AFL-15 DESCRIPTION The TC5565APL/AFL is 65,536 bit static random access memory organized as 8,192 words by 8 bits using CMOS technology, and operates from a single 5V supply. Advanced circuit techniques provide both high speed and low power features with a maximum operating current of 5mA/MHz and maximum access time of 100ns/120ns/150ns. When CE2 is a logical low or \CEl is a logical high, the device is placed in low power standby mode in which standby current is 2uA typically. The TC5565APL/AFL has three control inputs. Two chip enable (\CE1, CE2) allow for device selection and data retention control, and an output enable input ( \OE) provides fast memory access. Thus the TC5565APL/AFL is suitable for use in various microprocessor application systems where high speed, low power, and battery back up are required. The TC5565APL also features pin compatibility with the 64K bit EPROM (TMM2764D). RAM and EPROM are then interchangeable in the same socket, resulting in flexibility in the definition of the quantity of RAM versus EPROM in microprocessor application systems. The TC5565APL is offered in a dual-in-line 28 pin standard plastic package. The TC5565AFL is offered in 28 pin mini Flat Package. FEATURES Low Power Dissipation 27.5mW/MHz(Max.) operating • Standby Current: 100uA(Max.) Ta=70°C • Access Time TC5565APL/AFL-10 : 100ns(Max.) TC5565APL/AFL-12 : 120ns(Max.) TC5565APL/AFL-15 : 150ns(Max.) • 5V Single Power Supply • Power Down Features: CE2, \CE1 • Fully Static Operation Data Retention Supply Voltage: 2.0-5.5V • • • • Directly TTL Compatible and Outputs Pin Compatible with 2764 type EPROM TC5565APL Family (Package Type) : All Inputs Package Type Device Name 600 mil DIP TC5565APL 300 mil DIP *TC5563APL (Slim Package) Flat Package TC5565AFL (SOP) * See TC5563APL Technical Data. BLOCK DIAGRAM PIN CONNECTION (TOP VIEW) AO-A12 R/W \OE \CE1, CE2 I/O1 – I/O8 VDD GND N.C. Address Inputs Read/Write Control Input Output Enable Input Chip Enable Inputs Data Input/Output Power (+5V) Ground No Connection TC5565APL-10, TC5565APL-12, TC5565APL-15 TC5565AFL-10, TC5565AFL-12, TC5565AFL-15 OPERATION MODE \CE1 CE2 \OE R/W 1/01-T/08 POWER Read Write Output Deselect Standby L L L H H H H * L L * H * * H L H * * DOUT DIN High-Z High-Z High-Z IDDO IDDO IDDO IDDS IDDS MAXIMUM RATINGS SYMBOL VDD VIN VI/O PD Tsolder Tstg ITEM Power Supply Voltage Input Voltage Input and Output Voltage Power Dissipation Soldering Temperature RATING -0.3~7.0 *-0.3~7.0 -0-5-VDD+0.5 1.0/0.6** 260-10 -55~150 0-70 UNIT v v v W °C sec °C °C Storage Temperature Topr Operating Temperature * -3.0V at pulse width 50ns MAX. **Flat package D.C RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER VDD Power Supply Voltage VIH Input High Voltage VIL VDH Input Low Voltage Data-Retention Supply Voltage MIN. 4.5 2.2 -0.3 2.0 Typ. 5.0 - MAX. 5.5 VDD+0.3 0.8 5.5 UNIT v v V V TC5565APL-10, TC5565APL-12, TC5565APL-15 TC5565AFL-10, TC5565AFL-12, TC5565AFL-15 D.C and OPERATING CHARACTERISTICS (Ta=0~70°C, VDD = 5V±10%) SYMBOL IIL IOH IOL ILO PARAMETER Input Leakage Current Output High Current Output Low Current Output Leakage Current TEST CONDITION VIN=O~VDD VOH-2-4V VOL-0.4V VIH or CE2-VOL or \CE1 = VIH or CE2=VOL 0r R/W = VIL or \OE=VIH VOUT=0~VDD tcycle =1.0us TC5565APL-10 tcycle TC556SAFL-10 =100ns VDD =5.5V \CE1=VIL CE2=VIH Other input= VIH/VIL MIN. TYP. MAX. UNIT -1.0 4.0 ±1.0 10 45 ±1.0 uA mA mA uA mA mA IDDO1 TC5565APL-12 tcycle TC5565AFL-12 =120ns - - 40 mA Operating Current TC5565A?L-15 tcycle TC5565AFL-15 =150ns tcycle=1.0us TC5565APL-10 tcycle =100ns VDD=5.5V \CEl=O.2V CE2=VDD – 0.2V Other lnput= VDD - 0.2V/0.2V TC5565AFL-10 TC5565AFL-12 tcycle =120ns TC5565AFL-12 TC5565APL-15 TC5565AFL-15 tcycle =150ns - - 35 mA - - 5 mA - - 40 mA IDD02 - - 35 mA - - 30 3 100 50 mA mA uA uA IDDS1 * IDDS2 Note * Standby Current \Cel = VIH or CE2 = VIL \CE1 = VDD – 0.2V or CE2 = 0.2V VDD = 5.5V VDD = 3.0V 2 1 In standby mode with \CE1>= VDD – 0.2V, these specification limits are guaranteed under the condition of CE2 >= VDD – 0.2V or CE2
TC5565APL-10 价格&库存

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