TC74AC163FN

TC74AC161,163P/F/FN/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC161P,TC74AC161F,TC74AC161FN,TC74AC161FT TC74AC163P,TC74AC163F,TC74AC163FN,TC74AC163FT Synchronous Presettable 4-Bit Binary Counter TC74AC161P/F/FN/FT Asynchronous Clear TC74AC163P/F/FN/FT Synchronous Clear The TC74AC161 and 163 are advanced high speed CMOS SYNCHRONOUS PRESETTABLE COUNTERs fabricated with silicon gate and double-layer metal wiring C2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The CK input is active on the rising edge. Both LOAD and CLR inputs are active on low logic level. Presetting of these IC’s is synchronous to the rising edge of CK. The clear function of the TC74AC163 is synchronous to CK, while the TC74AC161 are cleared asynchronously. Two enable inputs (ENP and ENT) and CARRY OUTPUT are provided to enable easy cascading of counters, which facilitates easy implementation of n-bit counters without using external gates. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Note: xxxFN (JEDEC SOP) is not available in Japan. TC74AC161P, TC74AC163P TC74AC161F, TC74AC163F TC74AC161FN, TC74AC163FN Features • • • • High speed: fmax = 170 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 8 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines. ∼ Balanced propagation delays: tpLH − tpHL Wide operating voltage range: VCC (opr) = 2 to 5.5 V Pin and function compatible with 74F161/163 • • • TC74AC161FT, TC74AC163FT Weight DIP16-P-300-2.54A SOP16-P-300-1.27A SOL16-P-150-1.27 TSSOP16-P-0044-0.65A : 1.00 g (typ.) : 0.18 g (typ.) : 0.13 g (typ.) : 0.06 g (typ.) 1 2007-10-01 TC74AC161,163P/F/FN/FT Pin Assignment CLR CK A B C D ENP GND 1 2 3 4 5 6 7 8 (top view) 16 15 14 13 12 11 10 9 VCC Carry Output QA QB QC QD ENT LOAD IEC Logic Symbol TC74AC161 CTRDIV 16 CT = 0 M1 M2 ENT ENP CK A B C D (10) (7) (2) (3) (4) (5) (6) G3 G4 C5/2, 3, 4+ 1, 5D (1) (2) (4) (8) (14) (13) (12) (11) QA QB QC QD 3CT = 15 (15) Carry Output CLR LOAD (1) (9) CLR LOAD ENT ENP CK A B (1) (9) (10) (7) (2) (3) (4) TC74AC163 CTRDIV 16 5CT = 0 M1 M2 3CT = 15 G3 G4 C5/2, 3, 4+ 1, 5D (1) (15) Carry Output (14) (13) QA QB QC C D (5) (6) (2) (4) (8) (12) (11) QD Truth Table (Note) Inputs CLR (161) CLR (163) LOAD Outputs ENT X X L X H X CK (161) X CK (163) QA L A QB L B QC L C QD L D Function Reset to “0” Preset Data No Count No Count Count No Count ENP X X X L H X L H H H H H L H H H H X X L H H H X No Change No Change Count Up No Change Note: X: Don’t care A, B, C, D: Logic level of data inputs Carry: Carry = ENT·QA·QB·QC·QD 2 2007-10-01 TC74AC161,163P/F/FN/FT Timing Chart CLR LOAD A B C D CK ENP ENT QA QB Outputs QC QD Carry Output DON’T CARE UNTIL LOAD GOES LOW Data Inputs 12 13 14 15 0 1 2 INHIBIT ASYNC SYNC PRESET CLEAR CLEAR (161) (163) COUNT 3 2007-10-01 TC74AC161,163P/F/FN/FT System Diagram CLR ENT ENP LOAD 1 10 7 9 L L E E 15 Carry Out (Note) (Note 2) A 3 L DRQ L E CK E B 4 L L E (Note) 2) (Note Q 14 QA DRQ E CK C 5 L L E (Note) 2) (Note Q 13 QB DRQ E CK D 6 L L E (Note) 2) (Note Q 12 QC DRQ E CK 2 CK Q 11 QD Note: Truth table of internal F/F TC74AC161 D X L H X CK X R H L L L Q L L H TC74AC163 Q H H L D X L H X CK R H L L L Q L L H Q H H L No Change No Change X: Don’t care 4 2007-10-01 TC74AC161,163P/F/FN/FT Absolute Maximum Ratings (Note 1) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating −0.5 to 7.0 −0.5 to VCC + 0.5 −0.5 to VCC + 0.5 ±20 ±50 ±50 ±125 500 (DIP) (Note 2)/180 (SOP/TSSOP) −65 to 150 Unit V V V mA mA mA mA mW °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C should be applied up to 300 mW. Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time Symbol VCC VIN VOUT Topr dt/dV Rating 2.0 to 5.5 0 to VCC 0 to VCC −40 to 85 0 to 100 (VCC = 3.3 ± 0.3 V) 0 to 20 (VCC = 5 ± 0.5 V) Unit V V V °C ns/V Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 5 2007-10-01 TC74AC161,163P/F/FN/FT Electrical Characteristics DC Characteristics Ta = 25°C Characteristics Symbol Test Condition VCC (V) 2.0 High-level input voltage VIH ― 3.0 5.5 2.0 Low-level input voltage VIL ― 3.0 5.5 2.0 IOH = −50 μA High-level output voltage VOH VIN = VIH or IOH = −4 mA VIL IOH = −24 mA IOH = −75 mA (Note) 3.0 4.5 3.0 4.5 5.5 2.0 IOL = 50 μA Low-level output voltage VOL VIN = VIH or IOL = 12 mA VIL IOL = 24 mA IOL = 75 mA Input leakage current Quiescent supply current IIN ICC VIN = VCC or GND VIN = VCC or GND (Note) 3.0 4.5 3.0 4.5 5.5 5.5 5.5 Min 1.50 2.10 3.85 ― ― ― 1.9 2.9 4.4 2.58 3.94 ― ― ― ― ― ― ― ― ― Typ. ― ― ― ― ― ― 2.0 3.0 4.5 ― ― ― 0.0 0.0 0.0 ― ― ― ― ― Max ― ― ― 0.50 0.90 1.65 ― ― ― ― ― ― 0.1 0.1 0.1 0.36 0.36 ― ±0.1 8.0 Ta = −40 to 85°C Min 1.50 2.10 3.85 ― ― ― 1.9 2.9 4.4 2.48 3.80 3.85 ― ― ― ― ― ― ― ― Max ― ― ― 0.50 0.90 1.65 ― ― ― ― ― ― 0.1 0.1 0.1 0.44 0.44 1.65 ±1.0 80.0 μA μA V V V V Unit Note: This spec indicates the capability of driving 50 Ω transmission lines. One output should be tested at a time for a 10 ms maximum duration. 6 2007-10-01 TC74AC161,163P/F/FN/FT Timing Requirements (input: tr = tf = 3 ns) Characteristics Symbol Test Condition VCC (V) Minimum pulse width (CK) Minimum pulse width ( CLR ) Minimum set-up time ( LOAD , ENP, ENT) Minimum set-up time (A, B, C, D) Minimum set-up time ( CLR ) Minimum hold time Minimum removal time ( CLR ) (Note 1) (Note 2) (Note 1) tw (L) tw (H) tw (L) Figure 1 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 Ta = 25°C Limit 7.0 5.0 7.0 5.0 11.0 7.0 8.0 4.0 6.0 4.0 1.0 1.0 6.0 4.0 Ta = −40 to 85°C Limit 7.0 5.0 7.0 5.0 13.0 7.0 8.0 4.0 6.0 4.0 1.0 1.0 6.0 4.0 ns Unit Figure 4 ns ts Figure 2, Figure 3 ns ts Figure 2 ns ts Figure 5 ns th Figure 2, Figure 3, Figure 5 ns trem Figure 4 ns Note 1: For TC74AC161 only Note 2: For TC74AC163 only 7 2007-10-01 TC74AC161,163P/F/FN/FT AC Characteristics (CL = 50 pF, RL = 500 Ω, input: tr = tf = 3 ns) Characteristics Propagation delay time (CK-Q) Propagation delay time (CK-carry, count mode) Propagation delay time (CK-carry, preset mode) Propagation delay time (ENT-carry) Propagation delay time ( CLR -Q) (Note 1) Symbol Test Condition VCC (V) tpLH tpHL tpLH tpHL Figure 1 3.3 ± 0.3 5.0 ± 0.5 Min ― ― Ta = 25°C Typ. 8.8 6.5 Max 15.8 9.6 Ta = −40 to 85°C Min 1.0 1.0 Max 18.0 11.0 ns Unit Figure 1 3.3 ± 0.3 5.0 ± 0.5 ― ― 10.4 8.1 18.4 11.8 1.0 1.0 21.6 13.5 ns tpLH tpHL tpLH tpHL Figure 2 3.3 ± 0.3 5.0 ± 0.5 ― ― 12.9 9.1 22.4 13.2 1.0 1.0 25.5 15.0 ns Figure 6 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 ― ― ― ― 7.5 5.8 10.6 7.7 13.2 8.3 18.4 11.4 1.0 1.0 1.0 1.0 15.0 9.5 21.0 13.0 ns tpHL Figure 4 ns Propagation delay time ( CLR -carry) (Note 1) Maximum clock frequency Input capacitance Power dissipation capacitance fmax CIN CPD ― ― tpHL Figure 4 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 ― ― 50 90 ― 12.0 8.6 110 140 5 85 21.0 12.7 ― ― 10 ― 1.0 1.0 50 90 ― ― 24.0 14.5 ― ― 10 ― ns MHz pF pF (Note 2 ― Note 1: For TC74AC161 only Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC When the outputs drive a capacitive load, total current consumption is the sum of CPD, and ΔICC which is obtained from the following formula: C C C ⎛C ⎞ C ΔICC = fCK ⋅ VCC ⎜ QA + QB + QC + QD + CO ⎟ ⎜2 4 8 16 16 ⎟ ⎝ ⎠ CQA to CQD and CCO are the capacitances at QA to QD and CARRY OUT, respectively. fCK is the input frequency of the CK. 8 2007-10-01 TC74AC161,163P/F/FN/FT Switching Characteristics Test Waveform twH CK 50% twL 50% GND VOH 50% tpLH tpHL Q, Carry 0.5 VCC tpHL VOL 50% VOL CK 50% trem GND VOH VCC CLR VCC 50% twL GND VCC Q, Carry Figure 1 Count Mode Figure 4 Clear Mode (TC74AC161) VCC LOAD 50% ts th 50% ts th 50% ts th GND VCC A to D CLR 50% ts th 50% 50% GND VCC VCC CK 50% tpLH, tpHL Q, Carry VOH 0.5 VCC VOL Q, Carry 50% GND CK GND VOH VOL Figure 2 Preset Mode Figure 5 Clear Mode (TC74AC163) ENP, ENT VCC 50% ts th 50% 50% ts th 50% GND VOH GND VCC ENT 50% 50% VCC GND VOH Carry tpLH 0.5 VCC 0.5 VCC tpHL VOL CK Q VOL Figure 3 Count Enable Mode Figure 6 Cascade Mode (fix maximum count) 9 2007-10-01 TC74AC161,163P/F/FN/FT Typical Application Parallel Carry N-Bit Counter H: COUNT L: DISABLE INPUTS INPUTS INPUTS LD A ENP H: COUNT L: DISABLE ENT CK B C D Carry LD A ENP ENT CK B C D Carry LD A ENP ENT CK B C D Carry NEXT STAGE CLR QA QB QC QD CLR QA QB QC QD CLR QA QB QC QD OUTPUTS CLR CK OUTPUTS OUTPUTS 10 2007-10-01 TC74AC161,163P/F/FN/FT Package Dimensions Weight: 1.00 g (typ.) 11 2007-10-01 TC74AC161,163P/F/FN/FT Package Dimensions Weight: 0.18 g (typ.) 12 2007-10-01 TC74AC161,163P/F/FN/FT Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.13 g (typ.) 13 2007-10-01 TC74AC161,163P/F/FN/FT Package Dimensions Weight: 0.06 g (typ.) 14 2007-10-01 TC74AC161,163P/F/FN/FT RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 20070701-EN GENERAL • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his document shall be made at the customer’s own risk. • The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties. • Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 15 2007-10-01