TC74AC273P_07

TC74AC273P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC273P,TC74AC273F,TC74AC273FT Octal D-Type Flip Flop with Clear TC74AC273P The TC74AC273 is an advanced high speed CMOS OCTAL D-TYPE FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q output on the positive going edge of the clock pulse. When the CLR input is held “L”, the Q outputs are at a low logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74AC273F Features • • • • High speed: fmax = 170 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 8 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines. Balanced propagation delays: tpLH ∼ tpHL − Wide operating voltage range: VCC (opr) = 2 V to 5.5 V Pin and function compatible with 74F273 TC74AC273FT • • • Weight DIP20-P-300-2.54A SOP20-P-300-1.27A TSSOP20-P-0044-0.65A : 1.30 g (typ.) : 0.22 g (typ.) : 0.08 g (typ.) 1 2007-10-01 TC74AC273P/F/FT Pin Assignment IEC Logic Symbol CLR CK (1) (11) R C1 CLR Q1 D1 D2 Q2 Q3 D3 D4 Q4 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 (top view) VCC Q8 D8 D7 Q7 Q6 D6 D5 Q5 CK D1 D2 D3 D4 D5 (3) D6 D7 D8 (4) (7) (8) (13) (14) (17) (18) 1D (2) (5) (6) (9) (12) (15) Q1 Q2 Q3 Q4 Q5 Q6 (16) (19) Q7 Q8 GND 10 Truth Table Inputs CLR Output CK X Q L L H Qn D X L H X Function Clear ― ― No Change L H H H X: Don’t care System Diagram D1 CLR 1 3 R D CK CK 11 Q D CK Q D2 4 R D CK Q D3 7 R D CK Q D4 8 R D CK Q D5 13 R D CK Q D6 14 R D CK Q D7 17 R D CK Q D8 18 R 2 Q1 5 Q2 6 Q3 9 Q4 12 Q5 15 Q6 16 Q7 19 Q8 2 2007-10-01 TC74AC273P/F/FT Absolute Maximum Ratings (Note 1) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating −0.5 to 7.0 −0.5 to VCC + 0.5 −0.5 to VCC + 0.5 ±20 ±50 ±50 ±200 Unit V V V mA mA mA mA mW °C 500 (DIP) (Note 2)/180 (SOP/TSSOP) −65 to 150 Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C should be applied up to 300 mW. Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time Symbol VCC VIN VOUT Topr dt/dV Rating 2.0 to 5.5 0 to VCC 0 to VCC −40 to 85 Unit V V V °C ns/V 0 to 100 (VCC = 3.3 ± 0.3 V) 0 to 20 (VCC = 5 ± 0.5 V) Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 3 2007-10-01 TC74AC273P/F/FT Electrical Characteristics DC Characteristics Test Condition Characteristics Symbol VCC (V) 2.0 High-level input voltage VIH ⎯ Ta = 25°C Min 1.50 2.10 3.85 ⎯ ⎯ ⎯ Ta = −40 to 85°C Max ⎯ ⎯ ⎯ Unit Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Min 1.50 2.10 3.85 ⎯ ⎯ ⎯ Max ⎯ ⎯ ⎯ 3.0 5.5 2.0 V 0.50 0.90 1.65 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 0.50 0.90 1.65 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Low-level input voltage VIL ⎯ 3.0 5.5 2.0 V 1.9 2.9 4.4 2.58 3.94 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2.0 3.0 4.5 ⎯ ⎯ ⎯ 1.9 2.9 4.4 2.48 3.80 3.85 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ IOH = −50 μA High-level output voltage VOH VIN = VIH or IOH = −4 mA VIL IOH = −24 mA IOH = −75 mA IOL = 50 μA Low-level output voltage VOL VIN = VIH or IOL = 12 mA VIL IOL = 24 mA IOL = 75 mA Input leakage current Quiescent supply current IIN ICC VIN = VCC or GND VIN = VCC or GND (Note) (Note) 3.0 4.5 3.0 4.5 5.5 2.0 3.0 4.5 3.0 4.5 5.5 5.5 5.5 V 0.0 0.0 0.0 ⎯ ⎯ ⎯ ⎯ ⎯ 0.1 0.1 0.1 0.36 0.36 ⎯ ±0.1 0.1 0.1 0.1 0.44 0.44 1.65 ±1.0 μA μA V 8.0 80.0 Note: This spec indicates the capability of driving 50 Ω transmission lines. One output should be tested at a time for a 10 ms maximum duration. Timing Requirements (input: tr = tf = 3 ns) Characteristics Symbol Test Condition VCC (V) Minimum pulse width (CK) Minimum pulse width ( CLR ) Minimum set-up time tw (L) tw (H) tw (L) ⎯ Ta = 25°C Limit 8.0 5.0 7.5 5.0 8.5 4.5 0.0 0.0 7.0 3.5 Ta = −40 to 85°C Limit 8.0 5.0 7.5 5.0 8.5 4.5 0.0 0.0 7.0 3.5 Unit 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 ns ⎯ ns ts ⎯ ns Minimum hold time Minimum removal time ( CLR ) th ⎯ ns trem ⎯ ns 4 2007-10-01 TC74AC273P/F/FT AC Characteristics (CL = 50 pF, RL = 500 Ω, input: tr = tf = 3 ns) Characteristics Propagation delay time (CK-Q) Propagation delay time ( CLR -Q) Maximum clock frequency Input capacitance Power dissipation capacitance fmax CIN CPD ⎯ ⎯ Symbol Test Condition VCC (V) Min ⎯ ⎯ ⎯ ⎯ Ta = 25°C Typ. 9.0 6.5 8.0 5.9 110 150 5 40 Max 15.8 9.6 14.0 9.2 ⎯ ⎯ Ta = −40 to 85°C Min 1.0 1.0 1.0 1.0 55 90 ⎯ ⎯ Unit Max 18.0 11.0 16.0 10.5 ⎯ ⎯ tpLH tpHL ⎯ 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 ns tpHL ⎯ ns 55 90 ⎯ MHz pF pF 10 ⎯ 10 ⎯ (Note) ⎯ Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC/8 (per F/F) And the total CPD when n pcs. of flip flop operate can be gained by the following equation: CPD (total) = 29 + 11·n 5 2007-10-01 TC74AC273P/F/FT Package Dimensions Weight: 1.30 g (typ.) 6 2007-10-01 TC74AC273P/F/FT Package Dimensions Weight: 0.22 g (typ.) 7 2007-10-01 TC74AC273P/F/FT Package Dimensions Weight: 0.08 g (typ.) 8 2007-10-01 TC74AC273P/F/FT RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 20070701-EN GENERAL • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 9 2007-10-01