TC74HC221AFN

TC74HC221AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC221AP,TC74HC221AF,TC74HC221AFN Dual Monostable Multivibrator The TC74HC221A is a high speed CMOS MONOSTABLE MULTIVIBRATOR fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. There are two trigger inputs, A input (negative edge), and B input (positive edge). These inputs are valid for a slow rise/fall time signal (tr = tf = 1 s) as they are schmitt trigger inputs. This device may also be triggered by using CLR input (positive edge). After triggering, the output stays in a MONOSTABLE state for a time period determined by the external resistor and capacitor (Rx, Cx ). A low level at the CLR input breaks this state. Limits for Cx and Rx are: External capacitor, Cx: No limit External resistor, Rx: VCC = 2.0 V more than 5 kΩ VCC ≥ 3.0 V more than 1 kΩ All inputs are equipped with protection circuits against static discharge or transient excess voltage. Note: xxxFN (JEDEC SOP) is not available in Japan. TC74HC221AP TC74HC221AF Features (Note) • • TC74HC221AFN High speed: tpd = 25 ns (typ.) at VCC = 5 V Low power dissipation Standy by State: ICC = 4 μA (max) at Ta = 25°C Active State: ICC = 700 μA (max) at Ta = 25°C • • • • • • High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 10 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 4 mA (min) ∼ Balanced propagation delays: tpLH − tpHL Wide operating voltage range: VCC (opr) = 2 to 6 V Pin and function compatible with 74LS221 Note: Weight DIP16-P-300-2.54A SOP16-P-300-1.27A SOL16-P-150-1.27 : 1.00 g (typ.) : 0.18 g (typ.) : 0.13 g (typ.) In the case of using only one circuit, CLR should be tied to GND, Rx/Cx･Cx･Q･ Q should be tied to OPEN, the other inputs should be tied to VCC or GND. 1 2007-10-01 TC74HC221AP/AF/AFN Pin Assignment IEC Logic Symbol Block Diagram (Note 1)(Note 2) Note 1: Cx, Rx, Dx are external capacitor, resistor, and diode, respectively. Note 2: External clamping diode, Dx; The external capacitor is charged to VCC level in the wait state, i.e. when no trigger is applied. If the supply voltage is turned off, Cx is discharges mainly through the internal (parasitic) diode. If Cx is sufficiently large and VCC drops rapidly, there will be some possibility of damaging the IC through in rush current or latch-up. If the capacitance of the supply voltage filter is large enough and VCC drops slowly, the in rush current is automatically limited and damage to the IC is avoided. The maximum value of forward current through the parasitic diode is ±20 mA. In the case of a large Cx, the limit of fall time of the supply voltage is determined as follows: tf > (VCC − 0.7) Cx/20 mA = (tf is the time between the supply voltage turn off and the supply voltage reaching 0.4 VCC.) In the even a system does not satisfy the above condition, an external clamping diode (Dx) is needed to protect the IC from rush current. 2 2007-10-01 TC74HC221AP/AF/AFN Truth Table Inputs A Outputs CLR B H Q Q Function Output Enable H H H H L L H H X H L L X L X Inhibit Inhibit Output Enable Output Enable H X L L H Inhibit X: Don’t care System Diagram 3 2007-10-01 TC74HC221AP/AF/AFN Timing Chart Functional Description (1) Stand-by state The external capacitor (Cx) is fully charged to VCC in the stand-by state. That means, before triggering, the QP and QN transistors which are connected to the Rx/Cx node are in the off state. Two comparators that relate to the timing of the output pulse, and two reference voltage supplies turn off. The total supply current is only leakage current. Trigger operation Trigger operation is effective in any of the following three cases. First the condition where the A input is low, and the B input has a rising signal; second, where the B input is high, and the A input has a falling signal; and third, where the A input is low and the B input is high, and the CLR input has a rising signal. After a trigger becomes effective, comparators C1 and C2 start operating, and QN is turned on. The external capacitor discharges through QN. The voltage level at the Rx/Cx node drops. If the Rx/Cx voltage level falls to the internal reference voltage Vref L, the output of C1 becomes low. The flip-flop is then reset and QN turns off. At that moment C1 stops but C2 continues operating. After QN turns off, the voltage at the Rx/Cx node starts rising at a rate determined by the time constant of external capacitor Cx and resistor Rx. Upon the triggering, output Q becomes high, following some delay time of the internal F/F and gates. It stays high even if the voltage of Rx/Cx changes from falling to rising. When Rx/Cx reaches the internal reference voltage Vref H, the output of C2 becomes low, the output Q goes low and C2 stops its operation. That means, after triggering, when the voltage level of the Rx/Cx node reaches Vref H, the IC returns to its MONOSTABLE state. With large values of Cx and Rx, and ignoring the discharge time of the capacitor and internal delays of the IC, the width of the output pulse, tw (OUT), is as follows: tw (OUT) = 1.0 Cx Rx Reset operation In normal operation, CLR input is held high. If CLR is low, a trigger has no effect because the Q output is held low and trigger control F/F is reset. Also, QP turns on and Cx is charge rapidly to VCC. This means if CLR input is set low, the IC goes into a wait state. (2) (3) 4 2007-10-01 TC74HC221AP/AF/AFN Absolute Maximum Ratings (Note 1) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating −0.5 to 7 −0.5 to VCC + 0.5 −0.5 to VCC + 0.5 ±20 ±20 ±25 ±50 500 (DIP) (Note 2)/180 (SOP) −65 to 150 Unit V V V mA mA mA mA mW °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C shall be applied until 300 mW. Operating Ranges (Note 1) Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time ( CLR only) Symbol VCC VIN VOUT Topr Rating 2 to 6 0 to VCC 0 to VCC −40 to 85 Unit V V V °C 0 to 1000 (VCC = 2.0 V) tr, tf 0 to 500 (VCC = 4.5 V) 0 to 400 (VCC = 6.0 V) Cx Rx No limitation (Note 2) F Ω ns External capacitor External resistor > 5 k (Note 5) (VCC = 2.0 V) = > 1 k (Note 5) (VCC > 3.0 V) = = Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 2 The maximum allowable values of Cx and Rx are a function of leakage of capacitor Cx, the leakage of TC74HC221A, and leakage due to board layout and surface resistance. Susceptibility to externally induced noise signals may occur for Rx > 1 MΩ. 5 2007-10-01 TC74HC221AP/AF/AFN Electrical Characteristics DC Characteristics Ta = 25°C Characteristics Symbol Test Condition VCC (V) 2.0 High-level input voltage VIH ⎯ Ta = −40 to 85°C Max ⎯ ⎯ ⎯ Min 1.50 3.15 4.20 ⎯ ⎯ ⎯ Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Min 1.50 3.15 4.20 ⎯ ⎯ ⎯ Max ⎯ ⎯ ⎯ Unit 4.5 6.0 2.0 V 0.50 1.35 1.80 ⎯ ⎯ ⎯ ⎯ ⎯ 0.50 1.35 1.80 ⎯ ⎯ ⎯ ⎯ ⎯ Low-level input voltage VIL ⎯ 4.5 6.0 2.0 V 1.9 4.4 5.9 4.18 5.68 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2.0 4.5 6.0 4.31 5.80 0.0 0.0 0.0 0.17 0.18 ⎯ ⎯ ⎯ 1.9 4.4 5.9 4.13 5.63 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ High-level output voltage (Q, Q ) VOH VIN = VIH or VIL IOH = −20 μA IOH = −4 mA IOH = −5.2 mA IOL = 20 μA IOL = 4 mA IOL = 5.2 mA 4.5 6.0 4.5 6.0 2.0 V 0.1 0.1 0.1 0.26 0.26 ±0.1 ±0.1 0.1 0.1 0.1 0.33 0.33 ±1.0 ±1.0 μA μA μA μA μA Low-level output voltage (Q, Q ) VOL VIN = VIH or VIL 4.5 6.0 4.5 6.0 6.0 6.0 6.0 2.0 4.5 6.0 V Input leakage current Rx/Cx terminal off-state current Quiescent supply current Active-state supply current (Note) IIN IIN ICC VIN = VCC or GND VIN = VCC or GND VIN = VCC or GND VIN = VCC or GND Rx/Cx = 0.5 VCC 4.0 200 500 1.0 40.0 260 650 1.3 45 400 0.7 ICC mA Note: Per circuit Timing Requirements (input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) tW (L) tW (H) 2.0 ⎯ Ta = 25°C Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Ta = −40 to 85°C Limit 95 19 16 95 19 16 Unit Limit 75 15 13 75 15 13 Minimum pulse width 4.5 6.0 2.0 ns Minimum clear width tW (L) ⎯ 4.5 6.0 ns 6 2007-10-01 TC74HC221AP/AF/AFN AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns) Characteristics Output transition time Propagation delay time ( A , B-Q, Q ) Propagation delay time ( CLR TRIGGER-Q, Q ) Propagation delay time ( CLR -Q, Q ) Symbol tTLH tTHL tpLH tpHL tpLH tpHL tpLH tpHL Test Condition ⎯ Min ⎯ Typ. 4 Max 8 Unit ns ⎯ ⎯ 25 36 ns ⎯ ⎯ 25 41 ns ⎯ ⎯ 16 27 ns 7 2007-10-01 TC74HC221AP/AF/AFN AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns) Ta = 25°C Characteristics Symbol Test Condition VCC (V) 2.0 ⎯ Ta = −40 to 85°C Max 75 15 13 210 42 36 235 47 40 160 32 27 2000 400 340 130 115 115 1.2 1.1 1.1 ⎯ Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Typ. 30 8 7 102 30 24 102 30 24 67 20 16 700 250 210 110 105 105 1.0 1.0 1.0 ±1 Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Max 95 19 16 265 53 45 295 59 50 200 40 34 2500 500 425 130 115 115 1.2 1.1 1.1 ⎯ Unit Output transition time tTLH tTHL tpLH tpHL 4.5 6.0 2.0 ns Propagation delay time ( A , B-Q, Q ) Propagation delay time ( CLR TRIGGER-Q, Q) Propagation delay time ( CLR -Q, Q ) ⎯ 4.5 6.0 2.0 ns tpLH tpHL ⎯ 4.5 6.0 2.0 ns tpLH tpHL Cx = 28 pF ⎯ 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 ns Rx = 6 kΩ (VCC = 2 V) Rx = 2 kΩ (VCC = 4.5 V, 6 V) Cx = 0.01 μF Rx = 10 kΩ ns 90 95 95 0.9 0.9 0.9 ⎯ ⎯ ⎯ 90 95 95 0.9 0.9 0.9 ⎯ ⎯ ⎯ Output pulse width twOUT μs Cx = 0.1 μF Rx = 10 kΩ Output pulse width error between circuits (in same package) Input capacitance Power dissipation capacitance CIN CPD (Note) ⎯ ⎯ ms ΔtwOUT ⎯ ⎯ % pF pF 5 174 10 ⎯ 10 ⎯ Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC’･duty/100 + ICC/2 (per circuit) (ICC’: active supply current) (duty: %) 8 2007-10-01 TC74HC221AP/AF/AFN Output Pulse Width Constant K – Supply Voltage (typical) tWOUT – Cx Characteristics (typ.) 9 2007-10-01 TC74HC221AP/AF/AFN Package Dimensions Weight: 1.00 g (typ.) 10 2007-10-01 TC74HC221AP/AF/AFN Package Dimensions Weight: 0.18 g (typ.) 11 2007-10-01 TC74HC221AP/AF/AFN Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.13 g (typ.) 12 2007-10-01 TC74HC221AP/AF/AFN RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 20070701-EN GENERAL • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. 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