TC74HC377AF

TC74HC377AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC377AP,TC74HC377AF Octal D-Type Flip-Flop The TC74HC377A is a high speed CMOS OCTAL D-TYPE FLIP-FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. This 8-bit D-type flip-flop is controlled by a clock input (CK) and an output enable input ( G ). The signal level applied to the D inputs are transferred to Q outputs during the positive going transition of CK. When the G is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74HC377AP TC74HC377AF Features • • • • • • • • High speed: fmax = 73 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 4 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 10 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 4 mA (min) ∼ Balanced propagation delays: tpLH − tpHL Wide operating voltage range: VCC (opr) = 2 to 6 V Pin and function compatible with 74LS377 Weight DIP20-P-300-2.54A SOP20-P-300-1.27A : 1.30 g (typ.) : 0.22 g (typ.) Pin Assignment 1 2007-10-01 TC74HC377AP/AF IEC Logic Symbol Truth Table Inputs Outputs D X L H X Q No Change L H No Change G H L L X CK X X: Don’t care 2 2007-10-01 TC74HC377AP/AF System Diagram Absolute Maximum Ratings (Note 1) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating −0.5 to 7 −0.5 to VCC + 0.5 −0.5 to VCC + 0.5 ±20 ±20 ±25 ±50 500 (DIP) (Note 2)/180 (SOP) −65 to 150 Unit V V V mA mA mA mA mW °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C shall be applied until 300 mW. 3 2007-10-01 TC74HC377AP/AF Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Symbol VCC VIN VOUT Topr Rating 2 to 6 0 to VCC 0 to VCC −40 to 85 0 to 1000 (VCC = 2.0 V) Input rise and fall time tr, tf 0 to 500 (VCC = 4.5 V) 0 to 400 (VCC = 6.0 V) ns Unit V V V °C Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Electrical Characteristics DC Characteristics Characteristics Symbol Test Condition VCC (V) 2.0 High-level input voltage VIH ⎯ 4.5 6.0 2.0 Low-level input voltage VIL ⎯ 4.5 6.0 2.0 IOH = −20 μA High-level output voltage VOH VIN = VIH IOH = −4 mA IOH = −5.2 mA IOL = 20 μA Low-level output voltage VOL VIN = VIL IOL = 4 mA IOL = 5.2 mA Input leakage current Quiescent supply current IIN ICC VIN = VCC or GND VIN = VCC or GND 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 Min 1.50 3.15 4.20 ⎯ ⎯ ⎯ 1.9 4.4 5.9 4.18 5.68 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Ta = 25°C Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2.0 4.5 6.0 4.31 5.80 0.0 0.0 0.0 0.17 0.18 ⎯ ⎯ Max ⎯ ⎯ ⎯ 0.50 1.35 1.80 ⎯ ⎯ ⎯ ⎯ ⎯ 0.1 0.1 0.1 0.26 0.26 ±0.1 4.0 Ta = −40 to 85°C Min 1.50 3.15 4.20 ⎯ ⎯ ⎯ 1.9 4.4 5.9 4.13 5.63 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Max ⎯ ⎯ ⎯ 0.50 1.35 1.80 ⎯ ⎯ ⎯ ⎯ ⎯ 0.1 0.1 0.1 0.33 0.33 ±1.0 40.0 μA μA V V V V Unit 4 2007-10-01 TC74HC377AP/AF Timing Requirements (input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) Minimum pulse width (CK) tW (H) tW (L) 2.0 ⎯ 4.5 6.0 2.0 ts ⎯ 4.5 6.0 2.0 ts ⎯ 4.5 6.0 2.0 Minimum hold time th ⎯ 4.5 6.0 2.0 Clock frequency f ⎯ 4.5 6.0 Ta = 25°C Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Limit 75 15 13 75 15 13 75 15 13 0 0 0 7 36 42 Ta = −40 to 85°C Limit 95 19 16 95 19 16 95 19 16 0 0 0 6 29 34 MHz ns ns ns ns Unit Minimum set-up time (D-CK) Minimum set-up time ( G -CK) AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns) Characteristics Output transition time Propagation delay time (CK-Q) Maximum clock frequency Symbol tTLH tTHL tpLH tpHL fmax Test Condition ⎯ Min ⎯ Typ. 4 Max 8 Unit ns ⎯ ⎯ ⎯ 38 14 73 24 ⎯ ns MHz 5 2007-10-01 TC74HC377AP/AF AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) tTLH tTHL 2.0 ⎯ 4.5 6.0 2.0 ⎯ 4.5 6.0 2.0 Maximum clock frequency Input capacitance Power dissipation capacitance fmax ⎯ 4.5 6.0 CIN CPD (Note) ⎯ ⎯ Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 7 36 42 ⎯ ⎯ Ta = 25°C Typ. 30 8 7 57 17 13 18 59 77 5 32 Max 75 15 13 140 28 24 ⎯ ⎯ ⎯ 10 ⎯ Ta = −40 to 85°C Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 6 29 34 ⎯ ⎯ Max 95 19 16 175 35 30 ⎯ ⎯ ⎯ 10 ⎯ pF pF MHz ns ns Unit Output transition time Propagation delay time (CK-Q) tpLH tpHL Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC/8 (per flip flop) And the total CPD when n pcs. of flip flop operate can be gained by the following equation: CPD (total) = 22 + 10･n 6 2007-10-01 TC74HC377AP/AF Package Dimensions Weight: 1.30 g (typ.) 7 2007-10-01 TC74HC377AP/AF Package Dimensions Weight: 0.22 g (typ.) 8 2007-10-01 TC74HC377AP/AF RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 20070701-EN GENERAL • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 9 2007-10-01