TC74LVXC3245FSEF

TC74LVXC3245FS TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LVXC3245FS Dual Supply Octal Configurable Voltage Interface Bus Transceiver The TC74LVXC3245FS is a dual supply, advanced high-speed CMOS octal configurable voltage interface bus transceiver fabricated with silicon gate CMOS technology. Designed for use as an interface between a 3.3 V bus and a 3.3V to 5 V bus in mixed 3.3 V/5 V supply systems’ it achieves high-speed operation while maintaining the CMOS low power dissipation. It is intended for 2 way asynchronous communication between data busses. The direction of data transmission is determined by the level of the DIR input. The enable input ( G ) can be used to disable the device Weight: 0.14 g (typ.) so that the buses are effectively isolated. The A-port interfaces with the 3.3-V bus, the B-port with the 3.3V to 5V bus. This device will allow the VCCB voltage source pin and I/O pins on the B port to float when G is “H”. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • Bi-directional interface between 3 V and 5 V buses • High-speed: tpd = 8.5 ns (max) (VCCA = 3.3 V, VCCB = 5.0 V) • Low power dissipation: ICC = 8 μA (max) (Ta = 25°C) • Symmetrical output impedance: IOUTA = ±24 mA (min) IOUTB = ±24 mA (min) (VCCA = VCCB = 3.0 V) • Low noise: VOLP = 1.5 V (max) • Flexible VCCB operating range • Allows B port and VCCB to float simultaneously when G is “H” • Package: SSOP (shrink small outline package) Note: Do not apply a signal to any bus pins when it is in the output mode. Damage may result. All floating (high impedance) bus pin must have their input levels fixed by means of pull-up or pull-down resistors. Start of commercial production 1996-03 1 2014-03-01 TC74LVXC3245FS Pin Assignment (top view) IEC Logic Symbol G VCCA 1 24 VCCB DIR 2 23 NC A1 3 22 G A2 4 21 B1 A3 5 20 B2 A2 A4 6 19 B3 A3 A5 7 18 B4 A6 8 17 B5 DIR 16 9 (2) G3 3 EN 1 (BA) 3 EN 2 (AB) A1 (3) (21) 1 B1 2 A4 A5 A7 (22) B6 A6 A8 10 15 B7 GND 11 14 B8 A7 GND 12 13 GND A8 (4) (20) (5) (19) (6) (18) (7) (17) (8) (16) (9) (15) (10) (14) B2 B3 B4 B5 B6 B7 B8 Truth Table Inputs G DIR L L L H Outputs Function A-Bus B-Bus A=B Output Input H B=A Input Output X Z High impedance X: Don’t care Z: High impedance 2 2014-03-01 TC74LVXC3245FS Block Diagram VCCA VCCB DIR Logic level converter G A1 B1 B8 Same as above block A8 Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating VCCA −0.5 to 7.0 (Note 2) VCCB −0.5 to 7.0 (DIR, G ) VIN −0.5 to VCCA + 0.5 VI/OA −0.5 to VCCA + 0.5 VI/OB −0.5 to VCCB + 0.5 IIK ±20 mA II/OK ±50 mA IOUTA ±50 IOUTB ±50 ICCA ±200 ICCB ±200 Supply voltage range DC input voltage DC bus I/O voltage Input diode current Output diode current DC output current DC VCC/ground current Unit V V V mA mA Power dissipation PD 180 mW Storage temperature Tstg −65 to 150 °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: Don’t supply a voltage to VCCB terminal when VCCA is in the OFF state. 3 2014-03-01 TC74LVXC3245FS Operating Ranges (Note 1) Characteristics Supply voltage range Input voltage Symbol Rating VCCA 2.7 to 3.6 (Note 2) VCCB 3.0 to 5.5 (DIR, G ) VIN 0 to VCCA Bus I/O voltage Operating temperature Input rise and fall time VI/OA 0 to VCCA VI/OB 0 to VCCB Topr −40 to 85 dt/dv 0 to 8 (VCCA = 2.7 to 3.6 V) 0 to 8 (VCCB = 3.0 to 5.5 V) Unit V V V °C ns/V Note1: The operating ranges are required to ensure the normal operation of the device. Unused inputs and bus inputs must be tied to either VCC or GND. Please connect both bus inputs and the bus outputs with VCC or GND when the I/O of the bus terminal changes by the function. In this case, please note that the output is not short-circuited. Note2: Don’t use in VCCA > VCCB. 4 2014-03-01 TC74LVXC3245FS Electrical Characteristics DC Characteristics VILA VIHB H-level (VCCB) L-level Input voltage VIHA H-level (VCCA) L-level Input voltage H-level Characteristics VILB Test Condition VCCA (V) VCCB (V) L-level (VCCA) VOLA Max Min Max 2.0 ⎯ ⎯ 2.0 ⎯ 3.0 3.6 2.0 ⎯ ⎯ 2.0 ⎯ 3.6 5.5 2.0 ⎯ ⎯ 2.0 ⎯ 2.7 3.0 ⎯ ⎯ 0.8 ⎯ 0.8 3.0 3.6 ⎯ ⎯ 0.8 ⎯ 0.8 3.6 5.5 ⎯ ⎯ 0.8 ⎯ 0.8 2.7 3.0 2.0 ⎯ ⎯ 2.0 ⎯ 3.0 3.6 2.0 ⎯ ⎯ 2.0 ⎯ 3.6 5.5 3.85 ⎯ ⎯ 3.85 ⎯ 2.7 3.0 ⎯ ⎯ 0.8 ⎯ 0.8 3.0 3.6 ⎯ ⎯ 0.8 ⎯ 0.8 3.6 5.5 ⎯ ⎯ 1.65 ⎯ 1.65 IOH = −100 μA 3.0 3.0 2.9 3.0 ⎯ 2.9 ⎯ IOH = −12 mA 3.0 3.0 2.56 ⎯ ⎯ 2.46 ⎯ IOH = −24 mA 3.0 3.0 2.35 ⎯ ⎯ 2.25 ⎯ IOH = −12 mA 2.7 3.0 2.3 ⎯ ⎯ 2.2 ⎯ IOH = −24 mA 2.7 4.5 2.1 ⎯ ⎯ 2.0 ⎯ IOL = 100 μA 3.0 3.0 ⎯ 0 0.1 ⎯ 0.1 IOL = 24 mA 3.0 3.0 ⎯ ⎯ 0.36 ⎯ 0.44 IOL = 12 mA 2.7 3.0 ⎯ ⎯ 0.36 ⎯ 0.44 IOL = 24 mA 2.7 4.5 ⎯ ⎯ 0.42 ⎯ 0.5 Bn Bn VINB = VIHB or VILB Typ. 3.0 DIR, G , An VINA = VIHA or VILA Min 2.7 DIR, G , An VOHA Output voltage Ta = −40 to 85°C Ta = 25°C Symbol 5 Unit V V V 2014-03-01 TC74LVXC3245FS DC Characteristics (continued) H-level Characteristics Symbol Test Condition VCCA (V) VCCB (V) ⎯ 2.9 ⎯ IOH = −12 mA 3.0 3.0 2.56 ⎯ ⎯ 2.46 ⎯ IOH = −24 mA 3.0 3.0 2.35 ⎯ ⎯ 2.25 ⎯ IOH = −24 mA 3.0 4.5 3.86 ⎯ ⎯ 3.76 ⎯ IOL = 100 μA 3.0 3.0 ⎯ 0 0.1 ⎯ 0.1 IOL = 24 mA 3.0 3.0 ⎯ ⎯ 0.36 ⎯ 0.44 IOL = 24 mA 3.0 4.5 ⎯ ⎯ 0.36 ⎯ 0.44 VINA = VIHA or VILA 3.6 3.6 ⎯ ⎯ ±0.5 ⎯ ±5.0 VINB = VIHB or VILB 3.6 5.5 ⎯ ⎯ ±0.5 ⎯ ±5.0 VI/OA = VCCA or GND 3.6 3.6 ⎯ ⎯ ±0.5 ⎯ ±5.0 VI/OB = VCCB or GND 3.6 5.5 ⎯ ⎯ ±0.5 ⎯ ±5.0 VIN (DIR, G ) = VCCA or GND 3.6 3.6 ⎯ ⎯ ±0.1 ⎯ ±1.0 3.6 5.5 ⎯ ⎯ ±0.1 ⎯ ±1.0 3.6 3.6 ⎯ ⎯ 0.35 ⎯ 0.5 3.6 Open ⎯ ⎯ 5 ⎯ 50 VINA = VIHA or VILA 3.6 3.6 ⎯ ⎯ 5 ⎯ 50 VINB = VIHB or VILB 3.6 5.5 ⎯ ⎯ 5 ⎯ 50 VINA = VIHA or VILA 3.6 3.6 ⎯ ⎯ 5 ⎯ 50 VINB = VIHB or VILB 3.6 5.5 ⎯ ⎯ 8 ⎯ 80 L-level VOLB IIN ICCT Max 3.0 (VCCB) Input leakage current Min 2.9 VINB = VIHB or VILB IOZB Max 3.0 Output voltage Off-state current Typ. 3.0 VOHB IOZA Min IOH = −100 μA VINA = VIHA or VILA 3-state output Ta = −40 to 85°C Ta = 25°C PER INPUT: VIN = 3.0 V Unit V μA μA mA An = VCCA or GND Bn = Open, ICCA1 Quiescent supply current G = VCCA DIR = VCCA, VCCB = Open ICCA2 ICCB μA 6 2014-03-01 TC74LVXC3245FS AC Characteristics (input: tr = tf = 3 ns, CL = 50 pF, RL = 500 Ω, VCCA=2.7 to 3.6 V) Ta = −40 to 85°C Ta = 25°C Characteristics Symbol Test Condition VCCB (V) Min Typ. Max Min Max tpLH 5.0 ± 0.5 ⎯ 5.7 8.0 1.0 8.5 (An → Bn) tpHL 3.3 ± 0.3 ⎯ 6.2 8.5 1.0 9.0 3-state output enable time tpZL 5.0 ± 0.5 ⎯ 6.5 9.5 1.0 10.0 ( G → Bn) tpZH 3.3 ± 0.3 ⎯ 7.4 10.5 1.0 11.5 3-state output disable time tpLZ 5.0 ± 0.5 ⎯ 7.3 9.5 1.0 10.0 ( G → Bn) tpHZ 3.3 ± 0.3 ⎯ 6.6 9.5 1.0 10.0 tpLH 5.0 ± 0.5 ⎯ 4.6 7.5 1.0 8.0 (Bn → An) tpHL 3.3 ± 0.3 ⎯ 5.2 7.5 1.0 8.0 3-state output enable time tpZL 5.0 ± 0.5 ⎯ 7.0 10.5 1.0 11.5 ( G → An) tpZH 3.3 ± 0.3 ⎯ 7.0 10.5 1.0 11.5 3-state output disable time tpLZ 5.0 ± 0.5 ⎯ 6.1 9.5 1.0 10.0 ( G → An) tpHZ 3.3 ± 0.3 ⎯ 6.0 9.5 1.0 10.0 5.0 ± 0.5 ⎯ ⎯ 1.5 ⎯ 1.5 3.3 ± 0.3 ⎯ ⎯ 1.5 ⎯ 1.5 ⎯ 5 10 ⎯ 10 ⎯ 8 ⎯ ⎯ ⎯ ⎯ 4 ⎯ ⎯ ⎯ ⎯ 38 ⎯ ⎯ ⎯ ⎯ 88 ⎯ ⎯ ⎯ ⎯ 7 ⎯ ⎯ ⎯ Propagation delay time Propagation delay time Output to output skew Input: An Output: Bn (DIR = “H”) Input: Bn Output: An (DIR = “L”) tosLH (Note 1) tosHL Input capacitance CINA DIR, G Bus input capacitance CI/O An, Bn CPDA Power dissipation capacitance (Note 2) CPDB 5.0 ± 0.5 A → B (DIR = “H”) 5.0 ± 0.5 B → A (DIR = “L”) A → B (DIR = “H”) 5.0 ± 0.5 B → A(DIR = “L”) Unit ns ns ns ns ns ns ns pF pF Note 1: Parameter guaranteed by design. (tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|) Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC / 8 (per bit) 7 2014-03-01 TC74LVXC3245FS Noise Characteristics (Ta = 25°C, input: tr = tf = 3 ns, CL = 50 pF, RL = 500 Ω) Characteristics Quiet output maximum dynamic Symbol VOL (A) VOLPA Test Condition Input: Bn Output: An Quiet output mimimum dynamic Quiet output maximum dynamic VOL (A) VOL (B) VOLVA VOLPB (DIR = “L”) Input: An Output: Bn Quiet output mimimum dynamic VOL (B) VOLVB (DIR = “H”) Minimum high level dynamic input voltage VIH (A) VIHDA Input: An Maximum low level dynamic input Voltage VIL (A) VILDA Input: An Minimum high level dynamic input voltage VIH (B) VIHDB Input: Bn Maximum low level dynamic input voltage VIL (B) VILDB Input: Bn 8 Typ. Limit 3.3 ⎯ 0.9 3.3 5.0 ⎯ 0.9 3.3 3.3 ⎯ −0.9 3.3 5.0 ⎯ −0.9 3.3 3.3 ⎯ 0.8 3.3 5.0 ⎯ 1.5 3.3 3.3 ⎯ −0.8 3.3 5.0 ⎯ −1.2 3.3 3.3 ⎯ 2.0 3.3 5.0 ⎯ 2.0 3.3 3.3 ⎯ 0.8 3.3 5.0 ⎯ 0.8 3.3 3.3 2.0 ⎯ 3.3 5.0 3.5 ⎯ 3.3 3.3 0.8 ⎯ 3.3 5.0 1.5 ⎯ VCCA (V) VCCB (V) 3.3 Unit V V V V V 2014-03-01 TC74LVXC3245FS Package Dimensions Weight: 0.14 g (typ.) 9 2014-03-01 TC74LVXC3245FS RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. 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