TC74VCX16843FT_07

TC74VCX16843FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VCX16843FT Low-Voltage 18-Bit D-Type Latch with 3.6-V Tolerant Inputs and Outputs The TC74VCX16843FT is a high-performance CMOS 18-bit D-type latch. Designed for use in 1.8-V, 2.5-V or 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. It is also designed with overvoltage tolerant inputs and outputs up to 3.6 V. The TC74VCX16843FT can be used as two 9-bit latches or one 18-bit latch. The 18 latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, Weight: 0.25 g (typ.) the Q outputs of the corresponding 9-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. CLR and PR are independent of the LE and are accomplished by setting the appropriate input low. When the OE input is high, the outputs are in a high-impedance state. This device is designed to be used with 3-state memory address drivers, etc. All inputs are equipped with protection circuits against static discharge. Features • • Low-voltage operation: VCC = 1.8 to 3.6 V High-speed operation : tpd = 3.0 ns (max) (VCC = 3.0 to 3.6 V) : tpd = 3.7 ns (max) (VCC = 2.3 to 2.7 V) : tpd = 7.4 ns (max) (VCC = 1.8 V) • Output current: IOH/IOL = ±24 mA (min) (VCC = 3.0 V) : IOH/IOL = ±18 mA (min) (VCC = 2.3 V) : IOH/IOL = ±6 mA (min) (VCC = 1.8 V) • • • • Latch-up performance: −300 mA ESD performance: Machine model ≥ ±200 V Human body model ≥ ±2000 V Package: TSSOP 3.6-V tolerant function and power-down protection provided on all inputs and outputs 1 2007-10-19 TC74VCX16843FT Pin Assignment (top view) IEC Logic Symbol 2 56 55 1 27 29 30 28 54 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 31 3D 4 1CLR 1OE 1 2 3 4 5 6 7 8 9 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1LE 1PR 1D1 GND 1D2 1D3 VCC 1D4 1D5 1D6 GND 1D7 1D8 1D9 2D1 2D2 2D3 GND 2D4 2D5 2D6 VCC 2D7 2D8 GND 2D9 2PR 2LE 1Q1 GND 1Q2 1Q3 VCC 1Q4 1Q5 1OE 1LE 1PR 1CLR 2OE 2LE 2PR 2CLR 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 1D9 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8 2D9 EN2 C1 S2 R2 EN4 C3 S4 R4 1D 2 3 5 6 8 9 10 12 13 14 15 16 17 19 20 21 23 24 26 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 1Q9 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q8 2Q9 1Q6 10 GND 11 1Q7 12 1Q8 13 1Q9 14 2Q1 15 2Q2 16 2Q3 17 GND 18 2Q4 19 2Q5 20 2Q6 21 VCC 22 2Q7 23 2Q8 24 GND 25 2Q9 26 2OE 2CLR 27 28 2 2007-10-19 TC74VCX16843FT Truth Table (each 9-bit latch) Inputs PR L H H H H X CLR X L H H H X OE L L L L L H LE X X H H L X D X X L H X X Output Q H L L H Qn Z X: Don’t care Z: High impedance Qn : Q outputs are latched at the time when the LE input is taken to a low logic level. System Diagram 2 55 1 56 1OE 1PR 1CLR 1LE 1D1 54 S LE D R 3 1Q1 To eight other channels 2OE 2PR 2CLR 2LE 27 30 28 29 2D1 42 S LE D R 15 2Q1 To eight other channels 3 2007-10-19 TC74VCX16843FT Absolute Maximum Ratings (Note 1) Characteristics Power supply voltage DC input voltage Symbol VCC VIN Rating −0.5 to 4.6 −0.5 to 4.6 −0.5 to 4.6 Unit V V (Note 2) DC output voltage VOUT −0.5 to VCC + 0.5 V (Note 3) Input diode current Output diode current DC output current Power dissipation DC VCC/ground current per supply pin Storage temperature IIK IOK IOUT PD ICC/IGND Tstg −50 ±50 ±50 mA (Note 4) mA mA mW mA °C 400 ±100 −65 to 150 Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: OFF state Note 3: High or low state. IOUT absolute maximum rating must be observed. Note 4: VOUT < GND, VOUT > VCC Operating Ranges (Note 1) Characteristics Power supply voltage Input voltage Output voltage Symbol VCC VIN VOUT Rating 1.8 to 3.6 1.2 to 3.6 (Note 2) −0.3 to 3.6 Unit V V V 0 to 3.6 (Note 3) 0 to VCC (Note 4) ±24 (Note 5) (Note 6) (Note 7) °C (Note 8) ns/V mA Output current IOH/IOL ±18 ±6 Operating temperature Input rise and fall time Topr dt/dv −40 to 85 0 to 10 Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 2: Data retention only Note 3: OFF state Note 4: High or low state Note 5: VCC = 3.0 to 3.6 V Note 6: VCC = 2.3 to 2.7 V Note 7: VCC = 1.8 V Note 8: VIN = 0.8 to 2.0 V, VCC = 3.0 V 4 2007-10-19 TC74VCX16843FT Electrical Characteristics < DC Characteristics (Ta = −40 to 85°C, 2.7 V < VCC = 3.6 V) Characteristics H-level L-level Symbol VIH VIL Test Condition ⎯ ⎯ VCC (V) 2.7 to 3.6 2.7 to 3.6 Min 2.0 ⎯ Max ⎯ Unit Input voltage 0.8 ⎯ ⎯ ⎯ ⎯ V IOH = −100 μA H-level VOH VIN = VIH or VIL IOH = −12 mA IOH = −18 mA Output voltage IOH = −24 mA IOL = 100 μA L-level VOL VIN = VIH or VIL IOL = 12 mA IOL = 18 mA IOL = 24 mA Input leakage current 3-state output OFF state current Power-off leakage current Quiescent supply current Increase in ICC per input IIN IOZ IOFF ICC ΔICC 2.7 to 3.6 2.7 3.0 3.0 2.7 to 3.6 2.7 3.0 3.0 2.7 to 3.6 2.7 to 3.6 0 2.7 to 3.6 2.7 to 3.6 2.7 to 3.6 VCC − 0.2 2.2 2.4 2.2 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ V 0.2 0.4 0.4 0.55 ±5.0 ±10.0 μA μA μA VIN = 0 to 3.6 V VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V VIN = VCC or GND VCC < (VIN, VOUT) < 3.6 V = = VIH = VCC − 0.6 V 10.0 20.0 ±20.0 μA 750 < < DC Characteristics (Ta = −40 to 85°C, 2.3 V = VCC = 2.7 V) Characteristics H-level L-level Symbol VIH VIL Test Condition ⎯ ⎯ VCC (V) 2.3 to 2.7 2.3 to 2.7 Min 1.6 ⎯ Max ⎯ Unit Input voltage 0.7 ⎯ ⎯ ⎯ ⎯ V IOH = −100 μA H-level Output voltage VOH VIN = VIH or VIL IOH = −6 mA IOH = −12 mA IOH = −18 mA IOL = 100 μA L-level VOL VIN = VIH or VIL IOL = 12 mA IOL = 18 mA Input leakage current 3-state output OFF state current Power-off leakage current Quiescent supply current IIN IOZ IOFF ICC VIN = 0 to 3.6 V VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V VIN = VCC or GND VCC < (VIN, VOUT) < 3.6 V = = 2.3 to 2.7 2.3 2.3 2.3 2.3 to 2.7 2.3 2.3 2.3 to 2.7 2.3 to 2.7 0 2.3 to 2.7 2.3 to 2.7 VCC − 0.2 2.0 1.8 1.7 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ V 0.2 0.4 0.6 ±5.0 ±10.0 μA μA μA μA 10.0 20.0 ±20.0 5 2007-10-19 TC74VCX16843FT < DC Characteristics (Ta = −40 to 85°C, 1.8 V = VCC < 2.3 V) Characteristics Symbol Test Condition ⎯ ⎯ VCC (V) 1.8 to 2.3 1.8 to 2.3 Min 0.7 × VCC ⎯ Max ⎯ Unit H-level Input voltage L-level VIH VIL 0.2 × VCC ⎯ ⎯ V H-level Output voltage L-level Input leakage current 3-state output OFF state current Power-off leakage current Quiescent supply current VOH VIN = VIH or VIL IOH = −100 μA IOH = −6 mA 1.8 1.8 1.8 1.8 1.8 1.8 0 1.8 1.8 VCC − 0.2 1.4 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ V VOL IIN IOZ IOFF ICC VIN = VIH or VIL VIN = 0 to 3.6 V VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V VIN = VCC or GND IOL = 100 μA IOL = 6 mA 0.2 0.3 ±5.0 ±10.0 μA μA μA μA 10.0 20.0 ±20.0 VCC < (VIN, VOUT) < 3.6 V = = 6 2007-10-19 TC74VCX16843FT AC Characteristics (Ta = −40 to 85°C, input: tr = tf = 2.0 ns, CL = 30 pF, RL = 500 Ω) (Note 1) Characteristics Symbol Test Condition VCC (V) 1.8 Figure 1, Figure 2 2.5 ± 0.2 3.3 ± 0.3 1.8 Figure 1, Figure 2 2.5 ± 0.2 3.3 ± 0.3 1.8 tpLH Figure 1, Figure 3 2.5 ± 0.2 3.3 ± 0.3 1.8 tpHL Figure 1, Figure 3 2.5 ± 0.2 3.3 ± 0.3 tpZL tpZH 1.8 Figure 1, Figure 4 2.5 ± 0.2 3.3 ± 0.3 1.8 Figure 1, Figure 4 2.5 ± 0.2 3.3 ± 0.3 1.8 Figure 1, Figure 2, Figure 3 2.5 ± 0.2 3.3 ± 0.3 1.8 Minimum setup time ts Figure 1, Figure 2 2.5 ± 0.2 3.3 ± 0.3 1.8 Minimum hold time th Figure 1, Figure 2 2.5 ± 0.2 3.3 ± 0.3 1.8 Minimum removal time trem Figure 1, Figure 5 2.5 ± 0.2 3.3 ± 0.3 tosLH tosHL 1.8 (Note 2) 2.5 ± 0.2 3.3 ± 0.3 Min 1.5 0.8 0.6 1.5 0.8 0.6 1.5 0.8 0.6 1.5 0.8 0.6 1.5 0.8 0.6 1.5 0.8 0.6 4.0 1.5 1.5 2.5 1.5 1.5 1.0 1.0 1.0 4.0 3.0 2.0 ⎯ ⎯ ⎯ Max 7.4 3.7 3.0 8.8 4.4 3.5 9.8 5.6 4.0 9.2 4.6 3.7 9.8 4.9 3.8 7.6 4.2 3.7 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Unit Propagation delay time (D-Q) tpLH tpHL ns Propagation delay time (LE-Q) tpLH tpHL ns Propagation delay time ( PR -Q) ns Propagation delay time ( CLR -Q) ns 3-state output enable time ns 3-state output disable time tpLZ tpHZ ns Minimum pulse width (LE, PR , CLR ) tW (H) tW (L) ns ns ns ns 0.5 0.5 0.5 ns Output to output skew Note 1: For CL = 50 pF, add approximately 300 ps to the AC maximum specification. Note 2: Parameter guaranteed by design. (tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|) 7 2007-10-19 TC74VCX16843FT Dynamic Switching Characteristics (Ta = 25°C, input: tr = tf = 2.0 ns, CL = 30 pF, RL = 500 Ω) Characteristics Symbol Test Condition VCC (V) VIH = 1.8 V, VIL = 0 V Quiet output maximum dynamic VOL VOLP VIH = 2.5 V, VIL = 0 V VIH = 3.3 V, VIL = 0 V VIH = 1.8 V, VIL = 0 V Quiet output minimum dynamic VOL VOLV VIH = 2.5 V, VIL = 0 V VIH = 3.3 V, VIL = 0 V VIH = 1.8 V, VIL = 0 V Quiet output minimum dynamic VOH VOHV VIH = 2.5 V, VIL = 0 V VIH = 3.3 V, VIL = 0 V (Note) (Note) (Note) (Note) (Note) (Note) (Note) (Note) (Note) 1.8 2.5 3.3 1.8 2.5 3.3 1.8 2.5 3.3 0.25 0.6 0.8 −0.25 −0.6 −0.8 Typ. Unit V V 1.5 1.9 2.2 V Note: Parameter guaranteed by design. Capacitive Characteristics (Ta = 25°C) Characteristics Input capacitance Output capacitance Power dissipation capacitance Symbol CIN COUT CPD fIN = 10 MHz Test Condition ⎯ ⎯ VCC (V) 1.8, 2.5, 3.3 1.8, 2.5, 3.3 (Note) 1.8, 2.5, 3.3 Typ. 6 7 20 Unit pF pF pF Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC/18 (per bit) 8 2007-10-19 TC74VCX16843FT AC Test Circuit 6.0 V or VCC × 2 Open GND Measure CL RL Switch RL Parameter tpLH, tpHL tpLZ, tpZL tpHZ, tpZH 6.0 V VCC × 2 Switch Open @VCC = 3.3 ± 0.3 V @VCC = 2.5 ± 0.2 V @VCC = 1.8 V GND Output CL = 30 pF RL = 500 Ω Figure 1 AC Waveform tf 2.0 ns Input (LE) tr 2.0 ns Input (D) 90% 10% ts (H) Output (Q) VM tpLH tpHL VM th (H) tr 2.0 ns 90% VM VIH VM GND tw (H) VIH VM GND ts (L) th (L) VOH VM tpHL tpLH VOL 10% tf 2.0 ns Figure 2 tpLH, tpHL, tw, ts, th Input ( CLR ) VIH VM tw (L) GND Input ( PR ) VIH VM tw (L) GND Output (Q) VOH VM tpHL VM tpLH VOL Figure 3 tpLH, tpHL, tw 9 2007-10-19 TC74VCX16843FT tr 2.0 ns Output Enable Control ( OE ) tpLZ Output (Q) Low to Off to Low tpHZ Output (Q) High to Off to High Outputs enabled tf 2.0 ns 90% VM VIH 10% tpZL 3.0 V or VCC VM VX tpZH VOL VOH VM GND Outputs disabled Outputs enabled GND VY Figure 4 tpLZ, tpHZ, tpZL, tpZH tr 2.0 ns Input ( CLR , PR ) 90% 10% VM GND tf 2.0 ns Input (LE) 90% VM trem VIH 10% GND VIH Figure 5 trem VCC 3.3 ± 0.3 V 2.7 V 1.5 V VOL + 0.3 V VOH − 0.3 V 2.5 ± 0.2 V VCC VCC/2 VOL + 0.15 V VOH − 0.15 V 1.8 V VCC VCC/2 VOL + 0.15 V VOH − 0.15 V Symbol VIH VM VX VY 10 2007-10-19 TC74VCX16843FT Package Dimensions Weight: 0.25 g (typ.) 11 2007-10-19 TC74VCX16843FT RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 20070701-EN GENERAL • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 12 2007-10-19