TC74VHC4040F(E,K,F

TC74VHC4040F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC4040F, TC74VHC4040FK 12-Stage Ripple Carry Binary Counter The TC74VHC4040 is an advanced high speed CMOS 12-STAGE BINARY COUNTER/DIVIDER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Setting CLR to high resets the counter to low. A negative transition on the CK input brings one increment into the counter. This counter provides all divided output stages, and at Q12, a 1/4096 divided frequency will be output. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. TC74VHC4040F TC74VHC4040FK Features Weight SOP16-P-300-1.27A VSSOP16-P-0030-0.50  High speed: fmax = 210 MHz (typ.) at VCC = 5 V  Low power dissipation: ICC = 4 μA (max) at Ta = 25°C : 0.18 g (typ.) : 0.02 g (typ.)  High noise immunity: VNIH = VNIL = 28% VCC (min)  Power down protection is provided on all inputs.  Balanced propagation delays: tpLH ∼ − tpHL  Wide operating voltage range: VCC (opr) = 2 V to 5.5 V  Low noise: VOLP = 1.5 V (max)  Pin and function compatible with 74HC4040 Start of commercial production 1992-05 © 2019 Toshiba Electronic Devices & Storage Corporation 1 2019-01-31 TC74VHC4040F/FK Pin Assignment IEC Logic Symbol Q12 1 16 VCC Q6 2 15 Q11 Q5 3 14 Q10 Q7 4 13 Q8 Q4 5 12 Q9 Q3 6 11 CLR Q2 7 10 GND 8 9 RCTR 12 CLR (11) (10) 0 CT = 0 + CT 11 (9) (7) (6) (5) (3) (2) (4) (13) (12) (14) (15) (1) Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q1 (top view) Truth Table CK CLR Output State X H All Outputs = “L” L No Change L Advance to Next State X: Don’t care © 2019 Toshiba Electronic Devices & Storage Corporation 2 2019-01-31 TC74VHC4040F/FK System Diagram Q1 9 10 CLR Q2 7 Q3 6 Q4 5 Q5 3 Q6 2 D D D D D D CK R CK R CK R CK R CK R CK R 11 1 Q12 R CK R CK R CK R CK R CK R CK D D D D D D 15 Q11 14 Q10 12 Q9 13 Q8 4 Q7 Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit Supply voltage range VCC −0.5 to 7.0 V DC input voltage VIN −0.5 to 7.0 V DC output voltage VOUT −0.5 to VCC + 0.5 V Input diode current IIK −20 mA Output diode current IOK ±20 mA DC output current IOUT ±25 mA DC VCC/ground current ICC ±100 mA Power dissipation PD 180 mW Storage temperature Tstg −65 to 150 °C Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). © 2019 Toshiba Electronic Devices & Storage Corporation 3 2019-01-31 TC74VHC4040F/FK Operating Ranges (Note) Characteristics Symbol Rating Unit Supply voltage VCC 2.0 to 5.5 V Input voltage VIN 0 to 5.5 V VOUT 0 to VCC V Operating temperature Topr −40 to 85 °C Input rise and fall time dt/dv 0 to 100 (VCC = 3.3 ± 0.3 V) 0 to 20 (VCC = 5 ± 0.5 V) ns/V Output voltage Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Electrical Characteristics DC Characteristics Characteristics Test Condition Symbol VCC (V) Min Typ. Max Min Max 2.0 ― ― ― ― 1.50 VCC × 0.7 ― 3.0 to 5.5 1.50 VCC × 0.7 2.0 ― ― ― 3.0 to 5.5 ― ― 0.50 VCC × 0.3 0.50 VCC × 0.3 IOH = −50 μA 2.0 3.0 4.5 1.9 2.9 4.4 2.0 3.0 4.5 ― ― ― 1.9 2.9 4.4 ― ― ― IOH = −4 mA IOH = −8 mA 3.0 4.5 2.58 3.94 ― ― ― ― 2.48 3.80 ― ― IOL = 50 μA 2.0 3.0 4.5 ― ― ― 0.0 0.0 0.0 0.1 0.1 0.1 ― ― ― 0.1 0.1 0.1 IOL = 4 mA IOL = 8 mA 3.0 4.5 ― ― ― ― 0.36 0.36 ― ― 0.44 0.44 High-level input voltage VIH ― Low-level input voltage VIL ― High-level output voltage Low-level output voltage VOH VOL VIN = VIH or VIL VIN = VIH or VIL Ta = −40 to 85°C Ta = 25°C ― ― Unit V V V V Input leakage current IIN VIN = 5.5 V or GND 0 to 5.5 ― ― ±0.1 ― ±1.0 μA Quiescent supply current ICC VIN = VCC or GND 5.5 ― ― 4.0 ― 40.0 μA © 2019 Toshiba Electronic Devices & Storage Corporation 4 2019-01-31 TC74VHC4040F/FK Timing Requirements (input: tr = tf = 3 ns) Characteristics Test Condition Symbol Ta = 25°C Ta = −40 to 85°C VCC (V) Typ. Limit Limit Unit Minimum pulse width ( CK ) tw (L) tw (H) ― 3.3 ± 0.3 5.0 ± 0.5 ― ― 5.0 5.0 5.0 5.0 ns Minimum pulse width (CLR) tw (H) ― 3.3 ± 0.3 5.0 ± 0.5 ― ― 5.0 5.0 5.0 5.0 ns trem ― 3.3 ± 0.3 5.0 ± 0.5 ― ― 5.0 5.0 5.0 5.0 ns Minimum removal time AC Characteristics (input: tr = tf = 3 ns) Characteristics Propagation delay time ( CK -Q1) Propagation delay time (Qn-Qn + 1) Propagation delay time (CLR-Q) Test Condition Symbol tpLH tpHL Δtpd VCC (V) Min Typ. Max Min Max 15 ― 7.5 11.9 1.0 14.0 50 ― 10.0 15.4 1.0 17.5 15 ― 4.8 7.3 1.0 8.5 50 ― 6.3 9.3 1.0 10.5 3.3 ± 0.3 50 ― 2.4 4.4 ― 5.0 5.0 ± 0.5 50 ― 1.6 3.1 ― 3.5 15 ― 8.3 12.8 1.0 15.0 50 ― 10.8 16.3 1.0 18.5 15 ― 5.6 8.6 1.0 10.0 50 ― 7.1 10.6 1.0 12.0 15 75 140 ― 75 ― 50 55 80 ― 50 ― 15 150 210 ― 125 ― 50 95 125 ― 80 ― ― 4 10 ― 10 pF ― 21 ― ― ― pF ― 5.0 ± 0.5 3.3 ± 0.3 tpHL ― 5.0 ± 0.5 3.3 ± 0.3 Maximum clock frequency fmax ― 5.0 ± 0.5 Input capacitance CIN Power dissipation capacitance CPD Unit CL (pF) 3.3 ± 0.3 ― Ta = −40 to 85°C Ta = 25°C ― (Note) ns ns ns MHz Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC © 2019 Toshiba Electronic Devices & Storage Corporation 5 2019-01-31 TC74VHC4040F/FK Noise Characteristics (input: tr = tf = 3 ns) Characteristics Test Condition Symbol Ta = 25°C VCC (V) Typ. Limit Unit Quiet output maximum dynamic VOL VOLP CL = 50 pF 5.0 1.2 1.5 V Quiet output minimum dynamic VOL VOLV CL = 50 pF 5.0 −1.2 −1.5 V Minimum high level dynamic input voltage VIHD CL = 50 pF 5.0 ― 3.5 V Maximum low level dynamic input voltage VILD CL = 50 pF 5.0 ― 1.5 V Input Equivalent Circuit INPUT © 2019 Toshiba Electronic Devices & Storage Corporation 6 2019-01-31 TC74VHC4040F/FK Package Dimensions Weight: 0.18 g (typ.) © 2019 Toshiba Electronic Devices & Storage Corporation 7 2019-01-31 TC74VHC4040F/FK Package Dimensions Weight: 0.02 g (typ.) © 2019 Toshiba Electronic Devices & Storage Corporation 8 2019-01-31 TC74VHC4040F/FK RESTRICTIONS ON PRODUCT USE Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as “TOSHIBA”. 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