TC74VHC595FTELM

TC74VHC595F/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC595F, TC74VHC595FT, TC74VHC595FK 8-Bit Shift Register/Latch (3-state) TC74VHC595F The TC74VHC595 is an advanced high speed 8-BIT SHIFT REGISTER/LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The TC74VHC595 contains an 8-bit static shift register which feeds an 8-bit storage register. Shift operation is accomplished on the positive going transition of the SCK input. The output register is loaded with the contents of the shift register on the positive going transition of the RCK input. Since RCK and SCK signal are independent, parallel outputs can be held stable during the shift operation. And, since the parallel outputs are 3-state, it can be directly connected to 8-bit bus. This register can be used in serial-to-parallel conversion, data receivers, etc. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. TC74VHC595FT TC74VHC595FK Features • High speed: fmax = 185 MHz (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • • Power down protection is provided on all inputs. Balanced propagation delays: tpLH ∼ − tpHL • Wide operating voltage range: VCC (opr) = 2 V to 5.5 V • Low noise: VOLP = 1.0 V (max) • Pin and function compatible with 74ALS595 Weight SOP16-O-300-1.27A TSSOP16-P-0044-0.65A VSSOP16-P-0030-0.50 : 0.18 g (typ.) : 0.06 g (typ.) : 0.02 g (typ.) Start of commercial production 1992-05 1 2014-03-01 TC74VHC595F/FT/FK Pin Assignment IEC Logic Symbol QB 1 16 VCC QC 2 15 QA QD 3 14 SI QE 4 13 G QF 5 12 RCK QG 6 11 SCK QH 7 10 SCLR GND 8 9 QH’ G RCK SCLR SCK SI (13) (12) (10) (11) (14) EN3 C2 SRG8 R C/1 1D 2D 2D (top view) 3 3 (15) (1) (2) (3) (4) (5) (6) (7) (9) QA QB QC QD QE QF QG QH QH’ Truth Table Inputs Function SI SCK SCLR RCK G X X X X H QA thru QH outputs disable X X X X L QA thru QH outputs enable X X L X X Shift register is cleared. L H X X First stage of S.R. becomes “L”. Other stages store the data of previous stage, respectively. H H X X First stage of S.R. becomes “H”. Other stages store the data of previous stage, respectively. X H X X State of S.R. is not changed. X X X X S.R. data is stored into storage register. X X X X Storage register stage is not changed. X: Don’t care 2 2014-03-01 TC74VHC595F/FT/FK Timing Chart SCK SI RCK SCLR G QA QB QC QD QE QF QG QH QH’ System Diagram SCLR SI SCK RCK G 10 14 11 12 QH’ R D Q R D Q R D Q R D Q DR D Q R D Q R D Q R D Q SCK SCK SCK SCK SCK SCK SCK SCK D Q D Q D Q D Q D Q D Q D Q D Q RCK RCK RCK RCK RCK RCK RCK RCK 9 13 15 QA 1 QB 2 QC 3 3 QD 4 QE 5 QF 6 QG 7 QH 2014-03-01 TC74VHC595F/FT/FK Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit Supply voltage range VCC −0.5 to 7.0 V DC input voltage VIN −0.5 to 7.0 V VOUT −0.5 to VCC + 0.5 V Input diode current IIK −20 mA Output diode current IOK ±20 mA DC output current IOUT ±25 mA DC VCC/ground current ICC ±75 mA Power dissipation PD 180 mW Storage temperature Tstg −65 to 150 °C DC output voltage Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Operating Ranges (Note) Characteristics Symbol Rating Unit Supply voltage VCC 2.0 to 5.5 V Input voltage VIN 0 to 5.5 V VOUT 0 to VCC V Operating temperature Topr −40 to 85 °C Input rise and fall time dt/dv Output voltage Note: 0 to 100 (VCC = 3.3 ± 0.3 V) 0 to 20 (VCC = 5 ± 0.5 V) ns/V The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 4 2014-03-01 TC74VHC595F/FT/FK Electrical Characteristics DC Characteristics Characteristics Symbol VCC (V) High-level input voltage VIH ― Low-level input voltage VIL ― VOH VOL Typ. Max Min Max 2.0 1.50 ― 3.0 to 5.5 VCC × 0.7 ― 1.50 ― ― VCC × 0.7 ― ― 2.0 ― ― 0.50 ― 0.50 ― VCC × 0.3 Unit V V 3.0 to 5.5 ― ― 2.0 1.9 2.0 ― 1.9 ― 3.0 2.9 3.0 ― 2.9 ― 4.5 4.4 4.5 ― 4.4 ― IOH = −4 mA 3.0 2.58 ― ― 2.48 ― IOH = −8 mA 4.5 3.94 ― ― 3.80 ― 2.0 ― 0.0 0.1 ― 0.1 3.0 ― 0.0 0.1 ― 0.1 4.5 ― 0.0 0.1 ― 0.1 IOL = 4 mA 3.0 ― ― 0.36 ― IOL = 8 mA 4.5 ― ― 0.36 ― 0.44 0.44 5.5 ― ― ±0.25 ― ±2.50 μA VIN = VIH or VIL IOL = 50 μA Low-level output voltage Min VCC × 0.3 IOH = −50 μA High-level output voltage Ta = −40 to 85°C Ta = 25°C Test Condition VIN = VIH or VIL VIN = VIH or VIL V V 3-state output off-state current IOZ Input leakage current IIN VIN = 5.5 V or GND 0 to 5.5 ― ― ±0.1 ― ±1.0 μA Quiescent supply current ICC VIN = VCC or GND 5.5 ― ― 4.0 ― 40.0 μA VOUT = VCC or GND 5 2014-03-01 TC74VHC595F/FT/FK Timing Requirements (input: tr = tf = 3 ns) Characteristics Symbol Minimum pulse width tw (H) (SCK, RCK) tw (L) Minimum pulse width ( SCLR ) Minimum set-up time (SI-SCK) Minimum set-up time (SCK-RCK) Minimum set-up time ( SCLR -RCK) Minimum hold time (SI-SCK) Minimum hold time (SCK-RCK) Minimum hold time ( SCLR -RCK) Minimum removal time ( SCLR ) Ta = 25°C Test Condition ― tw (L) ― ts ― ts ― ts ― th ― th ― th ― trem ― 6 Ta = −40 to 85°C VCC (V) Typ. Limit Limit 3.3 ± 0.3 ― 5.0 5.0 5.0 ± 0.5 ― 5.0 5.0 3.3 ± 0.3 ― 5.0 5.0 5.0 ± 0.5 ― 5.0 5.0 3.3 ± 0.3 ― 3.5 3.5 5.0 ± 0.5 ― 3.0 3.0 3.3 ± 0.3 ― 8.0 8.5 5.0 ± 0.5 ― 5.0 5.0 3.3 ± 0.3 ― 8.0 9.0 5.0 ± 0.5 ― 5.0 5.0 3.3 ± 0.3 ― 1.5 1.5 5.0 ± 0.5 ― 2.0 2.0 3.3 ± 0.3 ― 0 0 5.0 ± 0.5 ― 0 0 3.3 ± 0.3 ― 0 0 5.0 ± 0.5 ― 0 0 3.3 ± 0.3 ― 3.0 3.0 5.0 ± 0.5 ― 2.5 2.5 Unit ns ns ns ns ns ns ns ns ns 2014-03-01 TC74VHC595F/FT/FK AC Characteristics (input: tr = tf = 3 ns) Characteristics Test Condition Symbol VCC (V) Propagation delay time tpLH (SCK-QH’) tpHL Propagation delay time Output enable time Output disable time Typ. Max Min Max 15 ― 8.8 13.0 1.0 15.0 50 ― 11.3 16.5 1.0 18.5 15 ― 6.2 8.2 1.0 9.4 50 ― 7.7 10.2 1.0 11.4 15 ― 8.4 12.8 1.0 13.7 50 ― 10.9 16.3 1.0 17.2 15 ― 5.9 8.0 1.0 9.1 50 ― 7.4 10.0 1.0 11.1 15 ― 7.7 11.9 1.0 13.5 50 ― 10.2 15.4 1.0 17.0 15 ― 5.4 7.4 1.0 8.5 50 ― 6.9 9.4 1.0 10.5 15 ― 7.5 11.5 1.0 13.5 50 ― 9.0 15.0 1.0 17.0 15 ― 4.8 8.6 1.0 10.0 50 ― 8.3 10.6 1.0 12.0 3.3 ± 0.3 50 ― 12.1 15.7 1.0 16.2 5.0 ± 0.5 50 ― 7.6 10.3 1.0 11.0 15 80 150 ― 70 ― 50 55 130 ― 50 ― 15 135 185 ― 115 ― 50 95 155 ― 85 ― ― 5.0 ± 0.5 ― 5.0 ± 0.5 tpLH tpHL (RCK-Qn) Min 3.3 ± 0.3 ( SCLR -QH’) Propagation delay time CL (pF) 3.3 ± 0.3 tpHL tpZL tpZH tpLZ tpHZ 3.3 ± 0.3 ― 5.0 ± 0.5 3.3 ± 0.3 RL = 1 kΩ 5.0 ± 0.5 RL = 1 kΩ 3.3 ± 0.3 Maximum clock frequency fmax ― 5.0 ± 0.5 Input capacitance Output capacitance Power dissipation capacitance Ta = −40 to 85°C Ta = 25°C Unit ns ns ns ns ns MHz CIN ― ― 4 10 ― 10 pF COUT ― ― 6 ― ― ― pF ― 87 ― ― ― pF CPD (Note) Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC 7 2014-03-01 TC74VHC595F/FT/FK Noise Characteristics (input: tr = tf = 3 ns) Characteristics Symbol Test Condition Ta = 25°C VCC (V) Typ. Limit Unit Quiet output maximum dynamic VOL VOLP CL = 50 pF 5.0 0.8 1.0 V Quiet output minimum dynamic VOL VOLV CL = 50 pF 5.0 −0.8 −1.0 V Minimum high level dynamic input voltage VIHD CL = 50 pF 5.0 ― 3.5 V Maximum low level dynamic input voltage VILD CL = 50 pF 5.0 ― 1.5 V Input Equivalent Circuit INPUT 8 2014-03-01 TC74VHC595F/FT/FK Package Dimensions Weight: 0.18 g (typ.) 9 2014-03-01 TC74VHC595F/FT/FK Package Dimensions Weight: 0.06 g (typ.) 10 2014-03-01 TC74VHC595F/FT/FK Package Dimensions Weight: 0.02 g (typ.) 11 2014-03-01 TC74VHC595F/FT/FK RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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