TC75S55FU(TE85L,F)

TC75S55F/FU TOSHIBA CMOS Linear Integrated Circuit Silicon Monolithic TC75S55F, TC75S55FU Single Operational Amplifier The TC75S55F/TC75S55FU is a CMOS single-operation amplifier which incorporates a phase compensation circuit. It is designed for use with a lowvoltage, low-current power supply; this differentiates this device from conventional general-purpose bipolar op-amps. TC75S55F Features • • Low-voltage operation : VDD = ±0.9 to 3.5 V or 1.8 to 7 V Low-current power supply : IDD (VDD = 3 V) = 10 μA (typ.) • Built-in phase-compensated op-amp, obviating the need for any external device • Ultra-compact package (SMV) TC75S55FU Absolute Maximum Ratings (Ta = 25°C) Characteristics (USV) Symbol Rating Unit VDD, VSS 7 V DVIN ±7 V Input voltage VIN VDD to VSS V Power dissipation PD 200 mW Operating temperature Topr −40 to 85 °C Storage temperature Tstg −55 to 125 °C Supply voltage Differential input voltage Weight SSOP5-P-0.95 : 0.014 g (typ.) SSOP5-P-0.65A : 0.006 g (typ.) Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Start of commercial production 1995-01 © 2019 Toshiba Electronic Devices & Storage Corporation 1 2019-09-11 TC75S55F/FU Marking (top view) 5 Pin Connection (top view) 4 VDD OUT 5 4 SF 1 2 1 IN (+) 3 2 VSS 3 IN (−) Electrical Characteristics DC Characteristics (VDD = 3.0 V, VSS = GND, Ta = 25°C) Characteristics Symbol Test Circuit Test Condition Typ. Max Unit Input offset voltage VIO 1  2 10 mV Input offset current IIO    1  pA II    1  pA CMVIN 2  0.0  2.1 V GV   60 70  dB VOH 3 RL ≥ 1 MΩ 2.9   VOL 4 RL ≥ 1 MΩ   0.1 Common mode input signal Rejection Ratio CMRR 2 VIN = 0.0 to 2.1 V 60 70  dB Supply voltage rejection ratio SVRR 1 VDD = 1.8 to 7.0 V 60 70  dB Supply current IDD 5   10 20 µA Source current Isource 6  10 20  µA Isink 7  100 450  µA Test Condition Min Typ. Max Unit  2 10 mV Input bias current Common mode input voltage Voltage gain (open loop) Maximum output voltage Sink current RS = 10 kΩ Min V DC Characteristics (VDD = 1.8 V, VSS = GND, Ta = 25°C) Symbol Test Circuit Input offset voltage VIO 1 Input offset current IIO    1  pA II    1  pA CMVIN 2  0.0  0.9 V GV   60 70  dB VOH 3 RL ≥ 1 MΩ 1.7   VOL 4 RL ≥ 1 MΩ   0.1 Supply current IDD 5   8 16 µA Source current Isource 6  8 16  µA Isink 7  100 400  µA Characteristics Input bias current Common mode input voltage Voltage gain (open loop) Maximum output voltage Sink current © 2019 Toshiba Electronic Devices & Storage Corporation RS = 100 kΩ 2 V 2019-09-11 TC75S55F/FU AC Characteristics (VDD = 3.0 V, VSS = GND, Ta = 25°C) Symbol Test Circuit Test Condition Min Typ. Max Unit Slew rate SR    0.08  V/µs Unity gain cross frequency fT    160  kHz Characteristics AC Characteristics (VDD = 1.8 V, VSS = GND, Ta = 25°C) Symbol Test Circuit Test Condition Min Typ. Max Unit Slew rate SR    0.06  V/µs Unity gain cross frequency fT    140  kHz Characteristics Test Circuit 1. SVRR, VIO VDD • SVRR For each of the two VDD values, measure the VOUT value, as indicated below, and calculate the value of SVRR using the equation shown. When VDD = 1.8 V, VDD = VDD1 and VOUT = VOUT1 When VDD = 7.0 V, VDD = VDD2 and VOUT = VOUT2  V  1 − V OUT 2 RS  × SVRR = 20 l og  OUT  1− 2 RF + RS   VDD VDD  • VIO Measure the value of VOUT and calculate the value of VIO using the following equation. RF RS RS RF VOUT VDD/2  RS VDD  VIO =  V OUT −  × R + R 2   S F 2. CMRR, CMVIN • VDD RF RS  V 1 − V OUT 2 RS CMRR = 20 l og  OUT ×  1 2 R − + RS V V F IN IN  RS RF VOUT VIN VDD/2 © 2019 Toshiba Electronic Devices & Storage Corporation CMRR Measure the VOUT value, as indicated below, and calculate the value of the CMRR using the equation shown. When VIN = 0.0 V, VIN = VIN1 and VOUT = VOUT1 When VIN = 2.1 V, VIN = VIN2 and VOUT = VOUT2 •     CMVIN Input range within which the CMRR specification guarantees VOUT value (as varied by the VIN value). 3 2019-09-11 TC75S55F/FU 3. VOH VDD • VIN1 = VDD − 0.05 V 2 VIN2 = VDD + 0.05 V 2 RL VOH VOH VIN1 VIN2 4. VOL VDD VOL VIN1 = VDD + 0.05 V 2 VIN2 = VDD − 0.05 V 2 RL • VOL VIN1 VIN2 5. IDD VDD M IDD VDD/2 6. Isource 7. Isink VDD VDD M M © 2019 Toshiba Electronic Devices & Storage Corporation 4 2019-09-11 TC75S55F/FU IDD – VDD GV – f 120 VSS = GND VIN = VDD/2 Ta = 25°C (dB) 16 VDD = 3 V VSS = GND Ta = 25°C 80 GV 12 Voltage gain Supply current IDD (µA) 20 8 40 4 0 0 1 2 3 4 Supply voltage VDD 5 6 0 10 7 100 1k 10 k 100 k Frequency f (V) 1M (Hz) VOL – Isink Isink – VDD 2.0 1000 VDD = 1.8 V VSS = GND Ta = 25°C Low-level output voltage VOL (V) VSS = GND Ta = 25°C Sink current Isink (µA) 800 600 400 200 0 0 1 2 3 4 Supply voltage VDD 5 6 1.6 1.2 0.8 0.4 0 0 7 200 600 Isink 5 Low-level output voltage VOL (V) VSS = GND Ta = 25°C 2 1 400 Sink current Isink (µA) VDD = 5.0 V VSS = GND Ta = 25°C VDD = 3.0 V 200 800 VOL – Isink 3 Low-level output voltage VOL (V) 400 Sink current (V) VOL – Isink 0 0 10 M 600 4 3 2 1 0 0 800 200 400 Sink current (µA) Isink 600 800 (µA) The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 Toshiba Electronic Devices & Storage Corporation 5 2019-09-11 TC75S55F/FU Isource – VDD VOH – Isource 50 2.0 40 High-level output voltage VOH Source current Isource (µA) Ta = 25°C 30 20 10 0 0 1 3 2 4 6 5 Supply voltage VDD VDD = 1.8 V VSS = GND Ta = 25°C (V) VSS = GND 1.6 1.2 0.8 0.4 0 0 7 4 8 Source current (V) VOH – Isource 1 12 Source current 16 20 24 Isource 2 1 (µA) VDD = 5.0 V VSS = GND Ta = 25°C 4 8 12 Source current 20 16 24 Isource 28 (µA) VOH – RL 3 VDD = 3.0 V (V) VDD = 1.8 V VSS = GND Ta = 25°C 1.2 0.8 0.4 0 10 k (µA) 3 0 0 28 High-level output voltage VOH (V) High-level output voltage VOH 1.6 Isource 28 4 VOH – RL 2.0 24 (V) High-level output voltage VOH (V) High-level output voltage VOH 2 8 20 5 VDD = 3.0 V VSS = GND Ta = 25°C 4 16 VOH – Isource 3 0 0 12 100 k 1M Load resistance RL VSS = GND Ta = 25°C 2 1 0 10 k 10 M (Ω) 100 k 1M Load resistance RL 10 M (Ω) The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 Toshiba Electronic Devices & Storage Corporation 6 2019-09-11 TC75S55F/FU VOH – RL 5 VDD = 5.0 V VSS = GND (V) High-level output voltage VOH PD – Ta 4 Ta = 25°C 3 2 1 0 10 k 100 k 1M Load resistance RL 10 M (Ω) The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 Toshiba Electronic Devices & Storage Corporation 7 2019-09-11 TC75S55F/FU Package Dimensions Weight: 0.014 g (typ.) © 2019 Toshiba Electronic Devices & Storage Corporation 8 2019-09-11 TC75S55F/FU Package Dimensions Weight: 0.006 g (typ.) © 2019 Toshiba Electronic Devices & Storage Corporation 9 2019-09-11 TC75S55F/FU RESTRICTIONS ON PRODUCT USE Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as “TOSHIBA”. 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