TC7MH161FK

TC7MH161,163FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MH161FK,TC7MH163FK Synchronous Presettable 4-Bit Binary Counter TC7MH161FK Asynchronous Clear TC7MH163FK Synchronous Clear The TC7MH161FK and 163FK are advanced high speed CMOS synchronous presettable 4-bit binary counters fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent bipolar schottky TTL while maintaining the CMOS low power dissipation. The CK input is active on the rising edge. Both LOAD and CLR inputs are active on low logic level. Presetting of each IC’s is synchronous to the rising edge of CK. Weight: 0.02 g (typ.) The clear function of the TC7MH163FK is synchronous to CK, while the TC7MH161FK are cleared asynchronously. Two enable inputs (ENP and ENT) and CARRY OUTPUT are provided to enable easy cascading of counters, which facilitates easy implementation of n-bit counters without using external gates. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features • • • • • • • • High speed: fmax = 185 MHz (typ.) (VCC = 5 V) Low power dissipation: ICC = 4 μA (max) (Ta = 25°C) High noise immunity: VNIH = VNIL = 28% VCC (min) Power down protection is equipped with all inputs. Balanced propagation delays: tpLH ≈ tpHL Wide operating voltage range: VCC (opr) = 2~5.5 V Low noise: VOLP = 0.8 V (max) Pin and function compatible with 74ALS161/163 1 2007-10-19 TC7MH161,163FK Pin Assignment (top view) CLR CK A B C D ENP GND 1 2 3 4 5 6 7 8 16 15 14 VCC CARRY OUTPUT QA QB QC QD ENT 13 12 11 10 9 LOAD IEC Logic Symbol TC7MH161FK (1) CLR (9) LOAD (10) ENT (7) ENP (2) CK (3) A (4) B (5) C (6) D CTRDIV 16 CT = 0 M1 M2 3CT = 15 G3 G4 C5/2, 3, 4 + 1, 5D [1] [2] [4] [8] (1) CLR (9) LOAD (15) CARRY OUTPUT (10) ENT (7) ENP (2) CK (3) A (4) B (5) C (6) D TC7MH163FK CTRDIV 16 5CT = 0 M1 M2 3CT = 15 G3 G4 C5/2, 3, 4 + 1, 5D [1] [2] [4] [8] (15) CARRY OUTPUT (14) QA (13) QB (12) QC (11) QD (14) QA (13) QB (12) QC (11) QD Truth Table TC7MH161FK Inputs TC7MH163FK Inputs Outputs Function QD L D Reset to “0” Reset data。 No count No count Count No count CLR L H H H H H LD X L H H H X ENP X X X L H X ENT X X L X H X CK X CLR L H H H H X LD X L H H H X ENP X X X L H X ENT X X L X H X CK QA L A QB L B QC L C No change No change Count up No change X: Don’t care A, B, C, D: Logic level of data inputs Carry: CARRY = ENT･QA･QB･QC･QD 2 2007-10-19 TC7MH161,163FK Timing Chart CLR LOAD A Don’t care until LOAD goes low B Data inputs C D CK ENP ENT QA QB Outputs QC QD CARRY 12 Async clear (161) Sync clear (163) Preset 13 14 15 0 1 2 Inhibit Count 3 2007-10-19 TC7MH161,163FK System Diagram CLR ENP ENT LOAD 1 7 10 9 L L E E A 3 L * 15 CARRY OUT D L E R Q CK Q E 4 L L E * 14 QA B D R Q E 5 L L E CK Q 13 QB C * D R Q E 6 L L CK Q 12 QC D * E D R Q E CK 2 CK Q 11 QD *:Truth table of internal F/F D X L H X TC7MH161FK CK X R H L L L Q L L H Q H H L D X L H X TC7MH163FK CK R H L L X Q L L H Q H H L No change No change X: Don’t care 4 2007-10-19 TC7MH161,163FK Absolute Maximum Ratings (Note) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating −0.5~7.0 −0.5~7.0 −0.5~VCC + 0.5 −20 ±20 ±25 ±50 Unit V V V mA mA mA mA mW °C 180 −65~150 Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time Symbol VCC VIN VOUT Topr dt/dv Rating 2.0~5.5 0~5.5 0~VCC −40~85 Unit V V V °C ns/V 0~100 (VCC = 3.3 ± 0.3 V) 0~20 (VCC = 5 ± 0.5 V) Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Electrical Characteristics DC Characteristics Characteristics Symbol Test Condition Ta = 25°C VCC (V) 2.0 High level Input voltage Low level VIL ⎯ Ta = −40~85°C Max ⎯ ⎯ Min 1.50 VCC × 0.7 ⎯ ⎯ Typ. ⎯ ⎯ ⎯ ⎯ Min 1.50 VCC × 0.7 ⎯ ⎯ Max ⎯ ⎯ Unit VIH ⎯ 3.0~5.5 2.0 3.0~5.5 2.0 0.50 VCC × 0.3 ⎯ ⎯ ⎯ ⎯ ⎯ 0.50 VCC × 0.3 ⎯ ⎯ ⎯ ⎯ ⎯ V 1.9 2.9 4.4 2.58 3.94 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2.0 3.0 4.5 ⎯ ⎯ 1.9 2.9 4.4 2.48 3.80 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ High level VOH VIN = VIH or VIL IOH = −50 μA IOH = −4 mA IOH = −8 mA IOL = 50 μA IOL = 4 mA IOL = 8 mA 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0~5.5 5.5 Output voltage VIN = VIH or VIL 0 0 0 ⎯ ⎯ ⎯ ⎯ 0.1 0.1 0.1 0.36 0.36 ±0.1 0.1 0.1 0.1 0.44 0.44 ±1.0 V Low level VOL Input leakage current Quiescent supply current IIN ICC VIN = 5.5 V or GND VIN = VCC or GND μA μA 4.0 40.0 5 2007-10-19 TC7MH161,163FK Timing Requirements (Input: tr = tf = 3 ns) Characteristics Minimum pulse width (CK) Minimum pulse width ( CLR ) Minimum set-up time (A, B, C, D) Minimum set-up time ( LOAD ) Minimum set-up time (ENT, ENP) Minimum set-up time ( CLR ) Minimum hold time Minimum hold time ( CLR ) Minimum removal time ( CLR ) Symbol tw (H) tw (L) tw (L) Test Condition Ta = 25°C VCC (V) 3.3 ± 0.3 5.0 ± 0.5 (Note 1) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 (Note 2) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 (Note 2) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 Limit 5.0 5.0 5.0 5.0 5.5 4.5 8.0 5.0 7.5 5.0 4.0 3.5 1.0 1.0 1.0 1.5 2.5 1.5 Ta = −40~85°C Limit 5.0 5.0 5.0 5.0 6.5 4.5 9.5 6.0 9.0 6.0 4.0 3.5 1.0 1.0 1.0 1.5 2.5 1.5 Unit Figure 1 ns Figure 4 ns ts Figure 2 ns ts Figure 2 ns ts Figure 3 ns ts Figure 5 ns th Figure 2, Figure 3 ns th Figure 5 ns trem Figure 4 (Note 1) ns Note 1: for TC7MH161FK only Note 2: for TC7MH163FK only 6 2007-10-19 TC7MH161,163FK AC Characteristics (Input: tr = tf = 3 ns) Characteristics Symbol Test Condition Ta = 25°C VCC (V) CL (pF) 3.3 ± 0.3 tpLH tpHL Figure 1, Figure 2 5.0 ± 0.5 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Ta = −40~85°C Max 12.8 16.3 8.1 10.1 13.6 17.1 8.1 10.1 17.2 20.7 10.3 12.3 12.3 15.8 8.1 10.1 13.6 17.1 9.0 11.0 13.2 16.7 8.6 10.6 ⎯ ⎯ ⎯ ⎯ Typ. 8.3 10.8 4.9 6.4 8.7 11.2 4.9 6.4 11.0 13.5 6.2 7.7 7.5 10.5 4.9 6.4 8.9 11.2 5.5 7.0 8.4 10.9 5.0 6.5 130 85 185 125 4 23 Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 70 50 115 85 ⎯ ⎯ Max 15.0 18.5 9.5 11.5 16.0 19.5 9.5 11.5 20.0 23.5 12.0 14.0 14.5 18.0 9.5 11.5 16.0 19.5 10.5 12.5 15.5 19.0 10.0 12.0 ⎯ ⎯ ⎯ ⎯ Unit Propagation delay time (CK-Q) ns Propagation delay time (CK-CARRY) [Count mode] tpLH tpHL Figure 1 3.3 ± 0.3 ns 5.0 ± 0.5 Propagation delay time (CK-CARRY) [Preset mode] tpLH tpHL Figure 2 3.3 ± 0.3 ns 5.0 ± 0.5 Propagation delay time (ENT-CARRY) 3.3 ± 0.3 tpLH tpHL Figure 6 5.0 ± 0.5 ns Propagation delay time ( CLR -Q) 3.3 ± 0.3 tpHL Figure 4 (Note 2) 5.0 ± 0.5 ns Propagation delay time ( CLR -CARRY) 3.3 ± 0.3 tpHL Figure 4 (Note 2) 5.0 ± 0.5 ns 3.3 ± 0.3 Maximum clock frequency fmax ⎯ 80 55 135 95 ⎯ MHz 5.0 ± 0.5 Input capacitance Power dissipation capacitance CIN CPD ⎯ 10 ⎯ 10 ⎯ pF pF (Note 1) ⎯ Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC When the outputs drive a capacitive load, total current consumption is the sum of CPD, and ΔICC which is obtained from the following formula: ΔICC = fCK･VCC ⎛ CQA + CQB + CQC + CQD + CCO ⎞ ⎜ ⎟ 4 8 16 16 ⎠ ⎝2 CQA~CQD and CCO are the capacitance QA~QD and CARRY OUT, respectively. fCK is the input frequency of the CK. Note 2: for TC7MH161FK only 7 2007-10-19 TC7MH161,163FK AC Test Waveform Count Mode twH CK 50% twL VCC 50% GND VOH 50% tpLH tpHL 50% VOL Preset Mode LOAD ts A~D 50% th 50% ts th VCC 50% ts th GND Q, CARRY Figure 1 CK VCC 50% tpLH, tpHL 50% GND VOH 50% VOL Q, CARRY Figure 2 Count Enable Mode VCC 50% ts CK th 50% 50% ts th 50% GND VOH VOL GND VCC CK 50% trem Q, CARRY 50% tpHL VOL GND VOH CLR Clear Mode (TC7MH161FK) VCC 50% twL GND VCC ENP ENT Q Figure 3 Figure 4 8 2007-10-19 TC7MH161,163FK Clear Mode (TC7MH163FK) VCC 50% ts CK th 50% GND VOH VOL 50% GND VCC CARRY tpLH 50% tpHL 50% VOL Cascade Mode (fix maximum count) VCC 50% 50% GND VOH CLR ENT Q, CARRY Figure 6 Figure 5 Noise Characteristics (Input: tr = tf = 3 ns) Characteristics Quiet output maximum dynamic VOL Quiet output minimum dynamic VOL Symbol VOLP VOLV VIHD VILD Test Condition CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF Ta = 25°C VCC (V) 5.0 5.0 5.0 5.0 Typ. 0.4 −0.4 ⎯ ⎯ Limit 0.8 −0.8 Unit V V V V Minimum high level dynamic input voltage VIH Maximum low level dynamic input voltage VIL 3.5 1.5 Input Equivalent Circuit Input 9 2007-10-19 TC7MH161,163FK Typical Application Parallel Carry N-Bit Counter H: Count L: Disable Inputs Inputs Inputs LD A ENP H: Count L: Disable ENT CK B C D LD A ENP B C D LD A ENP B C D CARRY ENT CK CARRY ENT CK CARRY Next stage CLR QA QB QC QD CLR QA QB QC QD CLR QA QB QC QD Outputs CLR CK Outputs Outputs 10 2007-10-19 TC7MH161,163FK Package Dimensions Weight: 0.02 g (typ.) 11 2007-10-19 TC7MH161,163FK RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 20070701-EN GENERAL • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 12 2007-10-19