TC7PCI3212MT,TC7PCI3215MT
CMOS Digital Integrated Circuits
Silicon Monolithic
TC7PCI3212MT,TC7PCI3215MT
1. Functional Description
•
2 Differential Channel, 2:1 multiplexer/demultiplexer switch for PCI Express Gen3
2. General
The TC7PCI3212MT and TC7PCI3215MT are 2 differential channel, 1-2 multiplexer/demultiplexer for PCI
Express Gen3 (8Gbps), or other high-speed interface applications.
The An+/An- inputs is connected to the Bn+/Bn- or Cn+/Cn- outputs determined by the combination both the
select input (SEL) and output enable (OE). When the output enable (OE) input is held high-level, the switches
are open (high-impedance state) with regardless the state of select inputs and reducing consumption current.
All inputs are equipped with protection circuits against static discharge.
3. Features
(1)
Operating voltage: VCC = 3.0 to 3.6 V
(2)
Switch terminal ON-capacitance: CI/O = 1.5 pF Switch On (typ.) @VCC = 3.3 V
(3)
ON resistance: RON = 7.5 Ω (typ.) @VCC = 3.0 V, VIS = 0 V
(4)
-3dB Bandwidth: BW = 11.5 GHz (typ.) @ VCC = 3.3 V
(5)
Insertion Loss: DDIL = -1 dB (typ.) @ VCC = 3.3 V, f = 4 GHz
(6)
Off Isolation: DDOIRR = -20 dB (typ.) @ VCC = 3.3 V, f = 4 GHz
(7)
Crosstalk: DDNEXT = -40 dB (typ.) @ VCC = 3.3 V, f = 4 GHz
(8)
ESD performance: Machine model ≥ ±200 V, Human body model ≥ ±2000 V
(9)
Package: TQFN20
4. Packaging
TQFN20
5. Marking
TC7PCI3212MT
TC7PCI3215MT
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TC7PCI3212MT,TC7PCI3215MT
6. Pin Assignment
TC7PCI3212MT
TC7PCI3215MT
7. Block Diagram
8. Principle of Operation
8.1. Truth Table
:
Inputs
OE
Inputs
SEL
L
L
An+ port = Bn+ port, An- port = Bn- port
(n=0,1)
L
H
An+ port = Cn+ port, An- port = Cn- port
(n=0,1)
H
An, Bn, Cn port Disconnect
(n=0,1)
Function
Function
Don't care.
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TC7PCI3212MT,TC7PCI3215MT
9. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
VCC
-0.5 to 4.6
V
Input voltage (OE, SEL)
VIN
-0.5 to 4.6
V
Switch I/O voltage
VS
-0.5 to VCC +0.5
V
Switch I/O current
IS
50
mA
Power dissipation
VCC/ground current
PD
500
mW
ICC/IGND
±50
mA
Tstg
-55 to 125
Storage temperature
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
10. Operating Ranges (Note)
Characteristics
Symbol
Note
Rating
Unit
3.0 to 3.6
V
Supply voltage
VCC
Input voltage (OE, SEL)
VIN
0 to 3.6
V
Switch I/O voltage
VS
0 to VCC
V
Operating temperature
Topr
-40 to 85
Input rise time
dt/dv
0 to 10
ns/V
Input fall time
dt/dv
0 to 10
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused control inputs must be tied to either VCC or GND.
11. Electrical Characteristics
11.1. DC Characteristics (Note) (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
Symbol
Note
Test Condition
VCC (V)
Min
Typ.
Max
Unit
High-level input voltage
(OE, SEL)
VIH
3.0 to 3.6 0.65 ×
VCC
V
Low-level input voltage
(OE, SEL)
VIL
3.0 to 3.6
0.35 ×
VCC
V
Input leakage current
(OE, SEL)
IIN
VIN = 0 to 3.6 V
3.0 to 3.6
±1
µA
Switch OFF-state leakage current
ISZ
VIS = 0 to VCC,
OE = VCC
3.0 to 3.6
±1
µA
ON-resistance
Difference of ON-resistance
between switches (bit to bit)
ON-resistance flatness
RON
(Note 1) VIS = 0 V, IIS = 30 mA
3.0
7.5
11.5
Ω
RON
(Note 1) VIS = 1.2 V, IIS = 30 mA
3.0
8.5
13.5
Ω
(Note 1) VIS = 0 V, 1.2 V, IIS = 15 mA
3.0
0.1
Ω
3.0
1
Ω
∆RON
RON(flat) (Note 1) VIS = 0 V to 1.2 V, IIS = 15 mA
Quiescent supply current
ICC
VIN = VCC or GND,
OE = VCC
3.6
1
µA
Quiescent supply current
ICC
VIN = VCC or GND,
OE = GND
3.6
200
500
µA
Note : All typical values are at Ta = 25 .
Note 1: ON-resistance is measured by measuring the voltage drop across the switch at the indicated current.
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TC7PCI3212MT,TC7PCI3215MT
11.2. AC Characteristics (Note) (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
Propagation delay time
Symbol
tPLH/
tPHL
Note
Test Condition
(Note 1) CL = 5 pF
See Fig. 12.1
VCC (V)
Min
Typ.
Max
Unit
3.3 ± 0.3
0.1
ns
Turn-ON time (SEL to Output)
ton
RL = 50 Ω, CL = 5 pF
See Fig. 12.2
3.3 ± 0.3
10
15
ns
Turn-ON time (OE to Output)
ton
RL = 50 Ω, CL = 5 pF
See Fig. 12.2
3.3 ± 0.3
37
50
µs
Turn-OFF time (SEL to Output)
toff
RL = 50 Ω, CL = 5 pF
See Fig. 12.2
3.3 ± 0.3
3.5
5
ns
Turn-OFF time (OE to Output)
toff
RL = 50 Ω, CL = 5 pF
See Fig. 12.2
3.3 ± 0.3
5
6.5
ns
Break before make
TBBM
RL = 50 Ω, CL = 5 pF
See Fig. 12.3
3.3 ± 0.3
3
9
ns
Output skew (bit to bit)
tSK(b)
(Note 1) CL = 5 pF
See Fig. 12.4
3.3 ± 0.3
5
ps
tSK(CH)
(Note 1) CL = 5 pF
See Fig. 12.5
3.3 ± 0.3
10
ps
Output skew (channel to channel)
Differential OFF isolation
DDOIRR (Note 1) RT = 50 Ω, f = 4 GHz
See Fig. 12.6
3.3 ± 0.3
-20
dB
Differential Near-end crosstalk
DDNEXT (Note 1) RT = 50 Ω, f = 4 GHz
See Fig. 12.7
3.3 ± 0.3
-40
dB
Differential return loss
DDRL
(Note 1) RT = 50 Ω, f = 4 GHz
See Fig. 12.8
3.3 ± 0.3
-20
dB
Differential insertion loss
DDIL
(Note 1) RT = 50 Ω, f = 4 GHz
See Fig. 12.8
3.3 ± 0.3
-1
dB
BW
(Note 1) RT = 50 Ω, CL = 0 pF
See Fig. 12.8
3.3 ± 0.3
11.5
GHz
-3dB Bandwidth
Note : All typical values are at Ta = 25 .
Note 1: This parameter is guaranteed by design.
11.3. Capacitive Characteristics (Note) (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Note
Test Condition
VCC (V)
Typ.
Unit
Input capacitance
(OE, SEL)
CIN
VIN = 0 V
3.3
3
pF
Switch terminal OFF-capacitance
(An+, An-)
CI/O
OE = VCC, VIS = 0 V
3.3
0.8
pF
OE = VCC, VIS = 0 V
3.3
0.5
pF
OE = GND, VIS = 0 V
3.3
1.5
pF
Switch terminal OFF-capacitance
(Bn+, Bn-, Cn+, Cn-)
Switch terminal ON-capacitance
Note:
CI/O
Parameter guaranteed by design.
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TC7PCI3212MT,TC7PCI3215MT
12. AC Electrical Test Circuit (Fig)
Fig. 12.1 Propagation delay time
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Rev.2.0
TC7PCI3212MT,TC7PCI3215MT
Fig. 12.2 Turn-ON and Turn-OFF time
Fig. 12.3 Break before make
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TC7PCI3212MT,TC7PCI3215MT
Fig. 12.4 Output skew (bit to bit)
Fig. 12.5 Output skew (channel to channel)
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TC7PCI3212MT,TC7PCI3215MT
Fig. 12.6 Differential OFF isolation
Fig. 12.7 Differential Near-end crosstalk
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TC7PCI3212MT,TC7PCI3215MT
Fig. 12.8 Differential return loss, Differential insertion loss, -3dB Bandwidth
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2013-08-09
Rev.2.0
TC7PCI3212MT,TC7PCI3215MT
Package Dimensions
Unit: mm
Weight: 0.017 g (typ.)
Package Name(s)
TOSHIBA: P-UQFN20-0305-0.50-001
Nickname: TQFN20
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2013-08-09
Rev.2.0
TC7PCI3212MT,TC7PCI3215MT
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information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
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