TC7WBL3305CFK,LF

TC7WBL3305CFK,TC7WBL3306CFK CMOS Digital Integrated Circuits Silicon Monolithic TC7WBL3305CFK,TC7WBL3306CFK 1. Functional Description • Low-Voltage, Low-Capacitance Dual Bus Switch 2. General The TC7WBL3305CFK and TC7WBL3306CFK are Low Voltage/Low Capacitance CMOS 2bit Bus Switches. The low ON-resistance of the switch allows connections to be made with minimal propagation delay time. The TC7WBL33306CFK requires the output enable (OE) input to be set high to place the output into the high impedance state, whereas the TC7WBL3305CFK requires the output enable (OE) input to be set low to place the output into the high impedance. All inputs are equipped with protection circuits against static discharge. 3. Features (1) Operating voltage: VCC = 1.65 to 3.6 V (2) ON capacitance: CI/O = 7 pF Switch On (typ.) @VCC = 3.0 V (3) ON resistance: RON = 6.0 Ω (typ.) @VCC = 3.0 V, VIS = 0 V (4) ESD performance: Machine model ≥ ±200 V (5) Power-down protection for inputs (OE and OE, I/O) (6) Package: US8 Human body model ≥ ±2000 V 4. Packaging US8 Start of commercial production ©2017-2020 Toshiba Electronic Devices & Storage Corporation 1 2009-03 2020-08-27 Rev.2.0 TC7WBL3305CFK,TC7WBL3306CFK 5. Pin Assignment TC7WBL3305CFK TC7WBL3306CFK 6. Marking TC7WBL3305CFK TC7WBL3306CFK 7. Block Diagram TC7WBL3305CFK TC7WBL3306CFK 8. Truth Table Inputs OE (TC7WBL3305CFK) Inputs OE (TC7WBL3306CFK) Function H L A port = B port L H Disconnect ©2017-2020 Toshiba Electronic Devices & Storage Corporation 2 2020-08-27 Rev.2.0 TC7WBL3305CFK,TC7WBL3306CFK 9. Absolute Maximum Ratings (Note) Characteristics Symbol Test Condition Rating Unit Supply voltage VCC -0.5 to 4.6 V Input voltage (OE, OE) VIN -0.5 to 4.6 V Switch I/O voltage VS -0.5 to 4.6 V VCC = 0 V or Switch = Off Switch = On -0.5 to VCC +0.5 Clamp diode current IIK -50 mA Switch I/O current IS 50 mA Power dissipation VCC/ground current Storage temperature Note: PD 200 mW ICC/IGND ±100 mA Tstg -65 to 150  Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 10. Operating Ranges (Note) Characteristics Symbol Test Condition Rating Unit 1.65 to 3.6 V 0 to 3.6 V 0 to 3.6 V Supply voltage VCC Input voltage (OE, OE) VIN Switch I/O voltage VS Operating temperature Topr -40 to 85  Input rise time dt/dv 0 to 10 ns/V VCC = 0 V or Switch = Off Switch = On Note: 0 to VCC The operating ranges must be maintained to ensure the normal operation of the device. Unused control inputs must be tied to either VCC or GND. ©2017-2020 Toshiba Electronic Devices & Storage Corporation 3 2020-08-27 Rev.2.0 TC7WBL3305CFK,TC7WBL3306CFK 11. Electrical Characteristics 11.1. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 ) Characteristics Symbol Note Test Condition VCC (V) Min Typ. Max Unit High-level input voltage (OE, OE) VIH  1.65 to 3.6 0.7 × VCC   V Low-level input voltage (OE, OE) VIL  1.65 to 3.6   0.3 × VCC V Input leakage current (OE, OE) IIN 1.65 to 3.6   ±1.0 µA VIN = 0 to 3.6 V Power-OFF leakage current IOFF OE, OE, A, B = 0 to 3.6 V 0   10 µA Switch OFF-state leakage current ISZ A, B = 0 V to VCC, OE = GND (TC7WBL3305CFK), OE = VCC (TC7WBL3306CFK) 1.65 to 3.6   ±1.0 µA (Note 1), VIS = 0 V, (Note 2) IIS = 30 mA 3.0  6.0 10.5 Ω VIS = 3.0 V, IIS = 30 mA 3.0  11 17 VIS = 2.4 V, IIS = 15 mA 3.0  12 19 VIS = 0 V, IIS = 24 mA 2.3  6.5 12 VIS = 2.3 V, IIS = 24 mA 2.3  13 21 VIS = 2.0 V, IIS = 15 mA 2.3  15 22 VIS = 0 V, IIS = 4 mA 1.65  8 14 VIS = 1.65 V, IIS = 4 mA 1.65  18 27 VIN = VCC or GND, IOUT = 0 A 3.6   10 ON-resistance Quiescent supply current RON ICC µA Note 1: All typical values are at Ta = 25 . Note 2: Measured by the voltage drop between A and B pins at the indicated current through the switch. On-resistance is determined by the lower of the voltages on the two (A or B) pins. 11.2. AC Characteristics (Unless otherwise specified, Ta = -40 to 85 ) Characteristics Output enable time Output disable time Symbol Test Condition VCC (V) Min Max Unit tPZL,tPZH See Fig. 11.2.1, 11.2.2, Table 11.2.1 3.3 ± 0.3  6 ns tPLZ,tPHZ See Fig. 11.2.1, 11.2.2, Table 11.2.1 ©2017-2020 Toshiba Electronic Devices & Storage Corporation 4 2.5 ± 0.2  7 1.8 ± 0.15  10 3.3 ± 0.3  6 2.5 ± 0.2  7 1.8 ± 0.15  10 ns 2020-08-27 Rev.2.0 TC7WBL3305CFK,TC7WBL3306CFK 11.3. Capacitive Characteristics (Note) (Unless otherwise specified, Ta = 25 ) Characteristics Symbol Test Condition VCC (V) Typ. Unit Input capacitance CIN VIN = 0 V 3.0 4 pF Switch terminal OFF-capacitance CI/O OE = GND(TC7WBL3305CFK), OE = VCC(TC7WBL3306CFK), VIS = 0 V 3.0 3.5 pF Switch terminal ON-capacitance CI/O OE = VCC(TC7WBL3305CFK), OE = GND(TC7WBL3306CFK), VIS = 0 V 3.0 7 pF Note: Parameter guaranteed by design. Fig. 11.2.1 AC Test Circuit Table 11.2.1 Parameter for AC Test Circuit Parameter Switch tPLZ, tPZL 2 × VCC tPHZ, tPZH GND Fig. 11.2.2 AC Waveform tPLZ, tPHZ, tPZL, tPZH ©2017-2020 Toshiba Electronic Devices & Storage Corporation 5 2020-08-27 Rev.2.0 TC7WBL3305CFK,TC7WBL3306CFK 12. Rise and Fall Time (tr/tf) The tr(out) and tf(out) values of the output signals are affected by the CR time constant of the input, which consists of the switch terminal capacitance (CI/O) and the on-resistance (RON) of the input. In practice, the tr(out) and tf(out) values are also affected by the circuit's capacitance and resistance components other than those of the TC7WBL3305CFK, TC7WBL3306CFK. The tr(out)/tf(out) values can be approximated as follows. (Figure 12.1, Table 12.1 shows the test circuit.) tr(out)/tf(out) (approx) = - (CI/O + CL)  (RDRIVE + RON)  ln (((VOH - VOL) - VM) / (VOH - VOL)) Where, RDRIVE is the output impedance of the previous-stage circuit. Calculation example: tr(out) (approx) = - (7 + 15) E - 12  (120 + 6)  ln (((3.0 - 0) - 1.5) / (3.0 - 0)) ≈ 1.9 ns Calculation conditions: VCC = 3.0 V, CL = 15 pF, RDRIVE = 120 Ω (output impedance of the previous IC), VM = 1.5 V (VCC/2) Output of the previous IC = digital (i.e., high-level voltage = VCC, low-level voltage = GND) Fig. 12.1 Calculation Circuit Table 12.1 Calculation Circuit Characteristics VCC = 3.3 ± 0.3 V VCC = 2.5 ± 0.2 V VCC = 1.8 ± 0.15 V VM VCC/2 VCC/2 VCC/2 ©2017-2020 Toshiba Electronic Devices & Storage Corporation 6 2020-08-27 Rev.2.0 TC7WBL3305CFK,TC7WBL3306CFK 13. Characteristics Curves (Note) Fig. 13.1 RON - VIS (Ta = 25 ) Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. ©2017-2020 Toshiba Electronic Devices & Storage Corporation 7 2020-08-27 Rev.2.0 TC7WBL3305CFK,TC7WBL3306CFK Package Dimensions Unit: mm Weight: 0.01 g (typ.) Package Name(s) JEDEC: SOT-765 Nickname: US8 ©2017-2020 Toshiba Electronic Devices & Storage Corporation 8 2020-08-27 Rev.2.0 TC7WBL3305CFK,TC7WBL3306CFK RESTRICTIONS ON PRODUCT USE Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as "TOSHIBA". Hardware, software and systems described in this document are collectively referred to as "Product". • TOSHIBA reserves the right to make changes to the information in this document and related Product without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. 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