TC7WPB8306L8X,TC7WPB8307L8X
CMOS Digital Integrated Circuits
Silicon Monolithic
TC7WPB8306L8X,TC7WPB8307L8X
1. Functional Description
•
Low-Voltage, Low-Power 2-Bit Dual-Supply Bus Switch
2. General
The TC7WPB8306L8X and TC7WPB8307L8X are CMOS 2-bit dual-supply bus switches that can provide an
interface between two nodes at different voltage levels. These devices can be connected to two independent power
supplies. VCCA supports 1.8-V, 2.5-V and 3.3-V power supplies, whereas VCCB supports 2.5-V, 3.3-V and 5.0 V
power supplies.
Each An terminal has an internal pull-up resistor to VCCA, and each Bn terminal has an internal pull-up resistor
to VCCB. And each I/O terminal has a signal level detection circuit which speeds up the low-to-high transition.
The Output Enable (OE: TC7WPB8307L8X, OE: TC7WPB8306L8X) input is common for all the two-bits of the
data lines; thus these device are used as a single two-bits bus switch. For the TC7WPB8306L8X, Output Enable
(OE) is active-High: When OE is High, the switch is on; when Low, the switch is off. For the TC7WPB8307L8X,
Output Enable (OE) is active-Low: When OE is Low, the switch is on; when High, the switch is off. All inputs
and outputs of the TC7WPB8306L8X and TC7WPB8307L8X can tolerate overvoltage conditions up to 5.5 V. The
channels consist of n-type MOSFETs.
All the inputs provide protection against electrostatic discharge.
3. Features
(1)
Operating voltage: 1.8 V to 2.5 V / 1.8 V to 3.3 V / 1.8 V to 5.0 V / 2.5 V to 3.3 V / 2.5 V to 5.0 V / 3.3 V to
5.0 V bidirectional interface
(2)
Operating voltage: VCCA = 1.65 to 5.0 V, VCCB = 2.3 to 5.5 V
(3)
RON = 6.5 Ω (typ.)
(ON-resistance test condition: VIS = 0 V, IIS = 10 mA, VCCA = 3.0 V, VCCB = 4.5 V)
(4)
ESD performance: Machine mode ≥ ±200 V, Human body model ≥ ±2000 V
(5)
5.5-V tolerant function and power-down protection provided on all inputs and outputs.
(6)
Packages: MP8
4. Packaging
MP8
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TC7WPB8306L8X,TC7WPB8307L8X
5. Pin Assignment
TC7WPB8306L8X
TC7WPB8307L8X
6. Marking
TC7WPB8306L8X
TC7WPB8307L8X
7. Block Diagram
One-shot driver circuits (RA1, RB1, RA2 and RB2) of the TC7WPB8306L8X and TC7WPB8307L8X detect either
a rising or falling edge on the A or B port. During the rise time, the RA1 and RB1 transistors are turned on for
a certain period to speed up a transition from Low to High. Likewise, during the fall time, the RA2 and RB2
transistors are turned on to speed up a transition from High to Low.
TC7WPB8306L8X
TC7WPB8307L8X
8. Principle of Operation
8.1. Truth Table
Inputs OE
(TC7WPB8306L8X)
Inputs OE
(TC7WPB8307L8X)
Function
H
L
A port = B port
L
H
Disconnect
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9. Absolute Maximum Ratings (Note)
Characteristics
Rating
Unit
VCCA
-0.5 to 7.0
V
VCCB
-0.5 to 7.0
Input voltage (OE, OE)
VIN
-0.5 to 7.0
Switch I/O voltage
VS
-0.5 to 7.0
Clamp diode current
IIK
-50
Switch I/O current
IS
64
ICCA
±25
ICCB
±25
Supply voltage
VCC/ground current per supply pin
Symbol
Note
mA
Power dissipation
PD
300
mW
Storage temperature
Tstg
-65 to 150
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
10. Operating Ranges (Note)
Characteristics
Supply voltage
Symbol
Note
Rating
Unit
VCCA
(Note 1)
1.65 to 5.0
V
VCCB
2.3 to 5.5
Input voltage (OE, OE)
VIN
0 to 5.5
Switch I/O voltage
VS
0 to 5.5
Operating temperature
Topr
-40 to 85
Input rise time (OE, OE)
dt/dv
0 to 10
ns/V
Input fall time (OE, OE)
dt/dv
0 to 10
Note : The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs and bus inputs must be tied to either VCC or GND.
Note 1: The VCCA voltage must be lower than the VCCB voltage.
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11. Application Circuit (Note)
Note:
Note:
VCCA < VCCB voltage must be lower than the VCCB voltage.
Level-shifting functionality is enabled by adding pull-up resistors from An to VCCA or VCCB and from Bn to VCCB
or VCCA, respectively.
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12. Electrical Characteristics
12.1. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
Symbol
High-level input voltage
VIH
Low-level input voltage
ON-resistance
Pull-up resistance
One-shot driver ONresistance
VIL
RON
Rpu
RON(OS)
Note
Test Condition
(Note 1) VIS = 0 V, IIS = 10 mA
See Fig. 13.1.
VCCA (V)
VCCB (V)
Min
Max
Unit
1.65 ≤ VCCA < 2.3
VCCA to 5.5
0.8 ×
VCC
V
2.3 ≤ VCCA < 5.0
VCCA to 5.5
0.7 ×
VCCA
1.65 ≤ VCCA < 2.3
VCCA to 5.5
0.2 ×
VCCA
2.3 ≤ VCCA < 5.0
VCCA to 5.5
0.3 ×
VCCA
1.65
2.3
24
2.3
3.0
14
3.0
4.5
12
1.65
VCCA to 5.5
40
2.3
VCCA to 5.5
30
3.0
VCCA to 5.5
20
RpuB
VIS = VCCB - 0.2 V
1.65
VCCA to 5.5
40
2.3
VCCA to 5.5
30
3.0
VCCA to 5.5
20
RA1 = ON
VIS = VCCA - 0.2 V
1.65
VCCA to 5.5
80
2.3
VCCA to 5.5
60
3.0
VCCA to 5.5
40
1.65 to 1.9
2.3
40
1.65 to 2.7
3.0
30
1.65 to 3.6
4.5
20
1.65 to 1.9
2.3
40
1.65 to 2.7
3.0
30
1.65 to 3.6
4.5
20
1.65 to 1.9
2.3
40
1.65 to 2.7
3.0
30
1.65 to 3.6
4.5
20
0
0
±1.0
RpuA
VIS = VCCA - 0.2 V
RA2 = ON
VIS = GND + 0.2 V
RB1 = ON
VIS = VCCB - 0.2 V
RB2 = ON
VIS = GND + 0.2 V
Power-OFF leakage
current
IOFF
An, Bn = 0 to 5.5 V,
Per circuit
Switch OFF-state
leakage current
ISZ
An, Bn = 0 to 5.5 V,
OE = VCCA, OE = GND
1.65 to 5.0
VCCA to 5.5
±1.0
Input leakage current
IIN
OE, OE = 0 to 5.5 V
1.65 to 5.0
VCCA to 5.5
±1.0
OE, OE = VCCA or GND,
IS = 0 A
1.65 to 5.0
VCCA
1.0
1.65 to 5.0
VCCA
1.0
VCCA ≤ OE, ≤ 5.5 V,
IS = 0 A
1.65 to 5.0
VCCA
±1.0
1.65 to 5.0
VCCA
±1.0
Quiescent supply
current
ICCA
ICCB
ICCA
ICCB
V
Ω
kΩ
Ω
µA
µA
Note 1: Measured by the voltage drop between A and B pins at the indicated current through the switch.
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12.2. AC Characteristics
12.2.1. VCCA = 1.8 ± 0.15 V
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 2.0 ns, f = 10 kHz)
Characteristics
Symbol
Note
Test Condition
VCCB (V)
Min
Max
Unit
2.5 ± 0.2
25
ns
Propagation delay time (bus → bus)
tPLH/tPHL
(Note 1) See Fig. 14.1, 14.3.
2.5 ± 0.2
10
3-state output enable time
tPZL/tPZH
See Fig. 14.2, 14.4.
2.5 ± 0.2
21
3-state output disable time
tPLZ/tPHZ
See Fig. 14.2, 14.4.
2.5 ± 0.2
23
Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay
other than the RC delay of the typical On resistance of the switch and the 15 pF load capacitance, when driven
by an ideal voltage the source (zero output impedance).
12.2.2. VCCA = 2.5 ± 0.2 V
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 2.0 ns, f = 10 kHz)
Characteristics
Propagation delay time (bus → bus)
Symbol
tPLH/tPHL
Note
Test Condition
(Note 1) See Fig. 14.1, 14.3.
VCCB (V)
Min
Max
Unit
3.3 ± 0.3
18
ns
3.3 ± 0.3
7
3-state output enable time
tPZL/tPZH
See Fig. 14.2, 14.4.
3.3 ± 0.3
17
3-state output disable time
tPLZ/tPHZ
See Fig. 14.2, 14.4.
3.3 ± 0.3
19
Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay
other than the RC delay of the typical On resistance of the switch and the 15 pF load capacitance, when driven
by an ideal voltage the source (zero output impedance).
12.2.3. VCCA = 2.5 ± 0.2 V
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 2.0 ns, f = 10 kHz)
Characteristics
Symbol
Note
Test Condition
VCCB (V)
Min
Max
Unit
5.0 ± 0.5
15
ns
Propagation delay time (bus → bus)
tPLH/tPHL
(Note 1) See Fig. 14.1, 14.3.
5.0 ± 0.5
9
3-state output enable time
tPZL/tPZH
See Fig. 14.2, 14.4.
5.0 ± 0.5
13
3-state output disable time
tPLZ/tPHZ
See Fig. 14.2, 14.4.
5.0 ± 0.5
5
Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay
other than the RC delay of the typical On resistance of the switch and the 15 pF load capacitance, when driven
by an ideal voltage the source (zero output impedance).
12.2.4. VCCA = 3.3 ± 0.3 V
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 2.0 ns, f = 10 kHz)
Characteristics
Propagation delay time (bus → bus)
Symbol
tPLH/tPHL
Note
Test Condition
(Note 1) See Fig. 14.1, 14.3.
VCCB (V)
Min
Max
Unit
5.0 ± 0.5
10
ns
5.0 ± 0.5
6
3-state output enable time
tPZL/tPZH
See Fig. 14.2, 14.4.
5.0 ± 0.5
9
3-state output disable time
tPLZ/tPHZ
See Fig. 14.2, 14.4.
5.0 ± 0.5
11
Note 1: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay
other than the RC delay of the typical On resistance of the switch and the 15 pF load capacitance, when driven
by an ideal voltage the source (zero output impedance).
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12.3. Timing Requirements
12.3.1. VCCA = 1.8 ± 0.15 V
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 2.0 ns)
Characteristics
Pulse duration (data input)
Data rate
Symbol
tw
fD
Test Condition
CL = 15 pF
CL = 150 pF
VCCB (V)
Min
Max
Unit
2.3
47
ns
3.0
45
4.5
41
2.3
21
3.0
22
4.5
24
2.3
2.9
3.0
3.1
4.5
3.4
Mbps
12.3.2. VCCA = 2.5 ± 0.2 V
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 2.0 ns)
Characteristics
Symbol
Test Condition
Pulse duration (data input)
tw
Data rate
fD
CL = 15 pF
CL = 150 pF
VCCB (V)
Min
Max
Unit
3.0
45
ns
4.5
41
3.0
22
4.5
24
3.0
3.1
4.5
3.4
Mbps
12.3.3. VCCA = 3.3 ± 0.3 V
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 2.0 ns)
Characteristics
Symbol
Test Condition
VCCB (V)
Min
Max
Unit
Pulse duration (data input)
tw
4.5
41
ns
Data rate
fD
CL = 15 pF
4.5
24
Mbps
CL = 150 pF
4.5
3.4
12.4. Capacitive Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
Part Number
Symbol
CIN
3.3
TC7WPB8306L8X
CI/O
OE=GND,VI/O=0V
3.3
OE=VCC,VI/O=0V
OE=VCC,VI/O=0V
OE=GND,VI/O=0V
Input capacitance (OE, OE)
Switch terminal OFF-capacitance
TC7WPB8307L8X
Switch terminal ON-capacitance
TC7WPB8306L8X
CI/O
TC7WPB8307L8X
7
Test Condition
VCCA (V) VCCB (V)
Typ.
Unit
3.3
4
pF
3.3
10
3.3
3.3
10
3.3
3.3
20
3.3
3.3
20
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13. DC Test Circuit
Fig. 13.1 ON-resistance Test Circuits
14. AC Test Circuits/Waveform
Fig. 14.1 tPLH, tPHL Test Circuits
Fig. 14.2 tPLZ, tPZL Test Circuits
Fig. 14.3 AC Waveform of tPLH, tPHL
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Fig. 14.4 AC Waveform of tPLZ, tPZL
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Package Dimensions
Unit: mm
Weight: 0.0039 g (typ.)
Package Name(s)
TOSHIBA: P-UFLGA8-0202-0.50-002
Nickname: MP8
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
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minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
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