TC9590XBG
CMOS Digital Integrated Circuit Silicon Monolithic
TC9590XBG
Automotive Peripheral Devices
TC9590XBG
Overview
TC9590XBG is a bridge device that converts HDMI® stream to MIPI®
CSI-2 SM TX.
The current and next generation Application Processors for
P-LFBGA64-0707-0.80-002
automotive have been designed without video streaming input port
Weight: 98 mg (Typ.)
except CSI-2 for Camcorder input.
TC9590XBG takes in HDMI input and converts to CSI-2 that looks like a Camcorder input.
Features
● HDMI-RX Interface
HDMI 1.4a
- Video Formats Support (Up to 1080P @60fps)
RGB, YCbCr444: 24-bpp @60fps
YCbCr422 24-bpp @60fps
- Audio Support
Internal Audio PLL to track N/CTS value
transmitted by the ACR packet.
- 3D Support
- Supports HDCP (optional)
- DDC Support
- EDID Support
Release A, Revision 1 (Feb 9, 2000)
First 128 byte (EDID 1.3 structure)
First E-EDID Extension: 128 bytes of CEA
Extension version 3 (specified in CEA-861-D)
Embedded 1K-byte SRAM (EDID_SRAM)
- Maximum HDMI clock speed: 165 MHz
Does not support Audio Return Path and HDMI
Ethernet Channels
● CSI-2 TX Interface
MIPI CSI-2 compliant (Version 1.01 Revision
0.04 – 2 April 2009)
Supports up to 1 Gbps per data lane
- Video, Audio and InfoFrame data can be
transmit over MIPI CSI-2
Supports up to 4 data lanes
● I2C Slave Interface
Supports for Normal-mode (100 kHz) and Fastmode (400 kHz)
Supports Ultra Fast-mode (2 MHz)
Configures all TC9590XBG internal registers
● InfraRed (IR)
Supports NEC Infrared protocol
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
● Audio Output Interface
Either I2S or TDM Audio interface available
(pins are multiplexed)
I2S Audio Interface
Single data lane for stereo data
Supports Master Clock mode only
Supports 16, 18, 20 or 24-bit data (depend on
HDMI input stream)
Supports Left or Right-justify with MSB first
Supports 32 bit-wide time-slot only
Outputs Audio Oversampling clock (256fs)
TDM (Time Division Multiplexed) Audio Interface
Fixed to 8 channels (depend on HDMI input
stream)
Supports 32 bit-wide time slot only
Supports Master Clock mode only
Supports 16, 18, 20 or 24-bit PCM audio data
word (depend on HDMI input stream)
Outputs Audio Oversampling clock (256fs)
● System
Internal core has two power domains (VDDC1
and VDDC2)
- VDDC1 is always on power domain
- VDDC2 can be shut-off during deep sleep mode
● Power supply inputs
Core and MIPI D-PHY: 1.2 V
I/O: 1.8V or 3.3 V
HDMI: 3.3 V
APLL: 2.5 V
● Power Consumption during typical operations
720P @30fps: 0.48 W
1080P @30fps: 0.48 W
1080P @60fps: 0.54 W
● AEC-Q100 qualified with the following definition
Grade3: -40 °C to 85 °C ambient operating
temperature range
1 / 17
2022-02-24
Rev. 1.4
TC9590XBG
Table of contents
REFERENCES ..................................................................................................................................................... 5
1. Overview .......................................................................................................................................................... 6
2. Features ........................................................................................................................................................... 7
3. External Pins .................................................................................................................................................... 9
3.1. TC9590XBG BGA64 Pin Count Summary .............................................................................................. 11
3.2. Pin Layout ................................................................................................................................................ 11
4. Package ......................................................................................................................................................... 12
5. Electrical Characteristics ................................................................................................................................ 14
5.1. Absolute Maximum Ratings..................................................................................................................... 14
5.2. Operating Condition................................................................................................................................. 14
5.3. DC Electrical Specification ...................................................................................................................... 15
6. Revision History ............................................................................................................................................. 16
RESTRICTIONS ON PRODUCT USE............................................................................................................... 17
List of Figures
Figure 1.1 TC9590XBG System Overview ................................................................................................ 6
Figure 3.1 TC9590XBG 64-Pin Layout (Top View).................................................................................. 11
Figure 4.1 TC9590XBG package (64 pins) .............................................................................................. 12
List of Tables
Table 2.1
Table 3.1
Table 3.2
Table 4.1
Table 6.1
TC9590XBG Power Consumption during typical operations..................................................... 8
TC9590XBG Functional Signal List ........................................................................................... 9
BGA64 Pin Count Summary .................................................................................................... 11
Mechanical Dimension ............................................................................................................. 13
Revision History ....................................................................................................................... 16
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
2 / 17
2022-02-24
TC9590XBG
● HDMI® is a trademark or registered trademark of HDMI Licensing, LLC in the United States and/or other
countries.
● MIPI® is a registered trademark of MIPI Alliance, Inc. CSI-2SM and D-PHYSM are service marks of MIPI
Alliance, Inc.
● Other company names, product names, and service names may be trademarks of their respective companies.
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
3 / 17
2022-02-24
TC9590XBG
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NOTICE OF DISCLAIMER
The material contained herein is not a license, either expressly or impliedly, to any IPR owned or controlled
by any of the authors or developers of this material or MIPI. The material contained herein is provided on
an “AS IS” basis and to the maximum extent permitted by applicable law, this material is provided AS IS
AND WITH ALL FAULTS, and the authors and developers of this material and MIPI hereby disclaim all
other warranties and conditions, either express, implied or statutory, including, but not limited to, any (if
any) implied warranties, duties or conditions of merchantability, of fitness for a particular purpose, of
accuracy or completeness of responses, of results, of workmanlike effort, of lack of viruses, and of lack of
negligence.
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All materials contained herein are protected by copyright laws, and may not be reproduced, republished,
distributed, transmitted, displayed, broadcast or otherwise exploited in any manner without the express
prior written permission of MIPI Alliance. MIPI, MIPI Alliance and the dotted rainbow arch and all related
trademarks, tradenames, and other intellectual property are the exclusive property of MIPI Alliance and
cannot be used without its express prior written permission.
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ALSO, THERE IS NO WARRANTY OF CONDITION OF TITLE, QUIET ENJOYMENT, QUIET
POSSESSION, CORRESPONDENCE TO DESCRIPTION OR NON-INFRINGEMENT WITH REGARD
TO THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT. IN NO EVENT WILL ANY
AUTHOR OR DEVELOPER OF THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT OR
MIPI BE LIABLE TO ANY OTHER PARTY FOR THE COST OF PROCURING SUBSTITUTE
GOODS OR SERVICES, LOST PROFITS, LOSS OF USE, LOSS OF DATA, OR ANY INCIDENTAL,
CONSEQUENTIAL, DIRECT, INDIRECT, OR SPECIAL DAMAGES WHETHER UNDER
CONTRACT, TORT, WARRANTY, OR OTHERWISE, ARISING IN ANY WAY OUT OF THIS OR
ANY OTHER AGREEMENT, SPECIFICATION OR DOCUMENT RELATING TO THIS MATERIAL,
WHETHER OR NOT SUCH PARTY HAD ADVANCE NOTICE OF THE POSSIBILITY OF SUCH
DAMAGES.
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Without limiting the generality of this Disclaimer stated above, the user of the contents of this Document is
further notified that MIPI: (a) does not evaluate, test or verify the accuracy, soundness or credibility of the
contents of this Document; (b) does not monitor or enforce compliance with the contents of this Document;
and (c) does not certify, test, or in any manner investigate products or services or any claims of compliance
with the contents of this Document. The use or implementation of the contents of this Document may
involve or require the use of intellectual property rights ("IPR") including (but not limited to) patents,
patent applications, or copyrights owned by one or more parties, whether or not Members of MIPI. MIPI
does not make any search or investigation for IPR, nor does MIPI require or request the disclosure of any
IPR or claims of IPR as respects the contents of this Document or otherwise.
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Questions pertaining to this document, or the terms or conditions of its provision, should be addressed to:
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MIPI Alliance, Inc.
c/o IEEE-ISTO
445 Hoes Lane
Piscataway, NJ 08854
Attn: Board Secretary
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
4 / 17
2022-02-24
TC9590XBG
REFERENCES
1.
2.
3.
4.
5.
MIPI D-PHY, “MIPI_D-PHY_specification_v01-00-00, May 14, 2009"
MIPI CSI-2, "MIPI Alliance Standard for Camera Serial Interface 2 (CSI-2) Version 1.01 Revision Nov 2010"
VESA Mobile Display Digital Interface Standard (Version 1.2, Type II)
I2C bus specification, version 2.1, January 2000, Philips Semiconductor
HDMI, “High-Definition Multimedia Interface Specification Version 1.4a March 4, 2010”
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
5 / 17
2022-02-24
TC9590XBG
1. Overview
TC9590XBG is a bridge device that converts HDMI stream to MIPI CSI-2 TX.
The current and next generation Application Processors for automotive have been designed without video
streaming input port except CSI-2 for Camcorder input.
TC9590XBG takes in HDMI input and converts to CSI-2 that looks like a Camcorder input.
TC9590XBG System Overview block diagram is shown below.
TC9590XBG
TC358743XBG
EDID_SCL
EDID_SDA
REFCLK
RESETN
EDID
Master
HDCP
eFuse
Keys
SYS
Authentication
Engine
CSID2P/N
CSI2 Tx
CSID3P/N
DDC
Slave
Video FiFo
HDMID1P/N
TMDS Rx
HDMICP/N
CSICP/N
HDCP
Decryption
Engine
HDMID0P/N
HDMID2P/N
CSID1P/N
CSI2
Packetizer
DDC_SCL
DDC_SDA
CSID0P/N
RegFile
&
EDID_SRAM
X
CEC
I2C
Slave
Audio
Audio
De-Packet
BaseBand/
Application
Process
I2C_SCL
I2C_SDA
I2S
INT
CEC
IR
IR
HPDo
APLL
HPDi
Figure 1.1
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
TC9590XBG System Overview
6 / 17
2022-02-24
TC9590XBG
2. Features
Below are the main features supported by TC9590XBG.
● HDMI-RX Interface
HDMI 1.4a
- Video Formats Support (Up to 1080P @60fps)
RGB, YCbCr444: 24-bpp @60fps
YCbCr422 24-bpp @60fps
- Audio Support
Internal Audio PLL to track N/CTS value transmitted by the ACR packet.
- 3D Support
- Supports HDCP (optional)
- DDC Support
- EDID Support
Release A, Revision 1 (Feb 9, 2000)
First 128 byte (EDID 1.3 structure)
First E-EDID Extension: 128 bytes of CEA Extension version 3 (specified in CEA-861-D)
Embedded 1K-byte SRAM (EDID_SRAM)
- Maximum HDMI clock speed: 165 MHz
Does not support Audio Return Path and HDMI Ethernet Channels
● CSI-2 TX Interface
MIPI CSI-2 compliant (Version 1.01 Revision 0.04 – 2 April 2009)
Supports up to 1 Gbps per data lane
- Video, Audio and InfoFrame data can be transmit over MIPI CSI-2
Supports up to 4 data lanes
● I2C Slave Interface
Supports for Normal-mode (100 kHz) and Fast-mode (400 kHz)
Supports Ultra Fast-mode (2 MHz)
Configures all TC9590XBG internal registers
● Audio Output Interface
Either I2S or TDM Audio interface available (pins are multiplexed)
I2S Audio Interface
Single data lane for stereo data
Supports Master Clock mode only
Supports 16, 18, 20 or 24-bit data (depend on HDMI input stream)
Supports Left or Right-justify with MSB first
Supports 32 bit-wide time-slot only
Outputs Audio Oversampling clock (256fs)
TDM (Time Division Multiplexed) Audio Interface
Fixed to 8 channels (depend on HDMI input stream)
Supports 32 bit-wide time slot only
Supports Master Clock mode only
Supports 16, 18, 20 or 24-bit PCM audio data word (depend on HDMI input stream)
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
7 / 17
2022-02-24
TC9590XBG
Outputs Audio Oversampling clock (256fs)
● InfraRed (IR)
Supports NEC Infrared protocol
● System
Internal core has two power domains (VDDC1 and VDDC2)
- VDDC1 is always on power domain
- VDDC2 can be shut-off during deep sleep mode
● Power supply inputs
Core and MIPI D-PHY: 1.2 V
I/O:
1.8 V or 3.3 V
HDMI:
3.3 V
APLL:
2.5 V
● Power Consumption during typical operations
720P @60fps: 0.48 W
1080P @30fps: 0.48 W
1080P @60fps: 0.54 W
Table 2.1 TC9590XBG Power Consumption during typical operations
720P
@60fps
1080P
@60fps
Sleep
0x0002 =
0x0001
Current
(A)
Power
(W)
Current
(A)
Power
(W)
Current
(µA)
Power
(µW)
VDDC1
VDDC2
VDDIO1
VDDIO2
VDDMIPI
AVDD33
AVDD12
AVDD25
1.2
1.2
3.3
1.8
1.2
3.3
1.2
2.5
0.0472
0
0.0009
0.0178
0.0879
0.0656
0.0128
0.05664
0
0.0017
0.0214
0.2901
0.0787
0.032
0.0766
0
0.0009
0.0228
0.0881
0.0829
0.0128
0.09192
0
0.0017
0.0274
0.2907
0.0995
0.032
0.91
0.002
0.0430
0.0490
32.3700
0.3200
0.2
1.092
0.0066
0.0774
0.0588
106.8210
0.3840
0.5
Total
Power
Unit
480.47
mW
543.19
mW
108.94
µW
● AEC-Q100 Qualified with the following definition
Grade3: -40°C to 85°C ambient operating temperature range
Note:
● TC9590XBG does not perform YCbCr ↔ YUV conversion. In this document they are used interchangeably.
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
8 / 17
2022-02-24
TC9590XBG
3. External Pins
TC9590XBG resides in BGA64 pin packages. The following table gives the signals of TC9590XBG and their
function.
Table 3.1 TC9590XBG Functional Signal List
Group
System:
Reset &
Clock
(4)
CSI-2 TX
(10)
HDMI-RX
(8)
DDC
(2)
EDID
(2)
CEC
HPD
(2)
Audio
(4)
IR
I2C
(2)
APLL
(4)
Pin Name
I/O
Init (O)
Type
RESETN
I
-
Sch
REFCLK
I
-
TEST
I
INT
Function
Voltage
Supply
System reset input, active low
VDDIO2
N
Reference clock input (27/26 MHz or 42 MHz)
VDDIO2
-
N
TEST mode select
0: Normal mode
VDDIO2
O
L
N
Interrupt Output signal – active high (Level)
CSICP
CSICN
CSID0P
CSID0N
CSID1P
CSID1N
CSID2P
CSID2N
CSID3P
CSID3N
HDMICP
HDMICN
HDMID0P
HDMID0N
HDMID1P
HDMID1N
HDMID2P
HDMID2N
DDC_SCL
DDC_SDA
IO
IO
H
H
H
H
H
H
H
H
H
H
-
MIPI-PHY
MIPI-PHY
MIPI-PHY
MIPI-PHY
MIPI-PHY
MIPI-PHY
MIPI-PHY
MIPI-PHY
MIPI-PHY
MIPI-PHY
HDMI-PHY
HDMI-PHY
HDMI-PHY
HDMI-PHY
HDMI-PHY
HDMI-PHY
HDMI-PHY
HDMI-PHY
N (Note2)
N (Note2)
EDID_SCL
IO
-
N (Note2) EDID Master Clock
VDDIO2
EDID_SDA
IO
-
N (Note2) EDID Master Data
VDDIO2
CEC
HPDI
HPDO
IO
I
O
L
N (Note2) CEC signal
N
Hot Plug Detect Input
N
Hot Plug Detect Output
VDDIO1
VDDIO1
VDDIO1
A_SCK
O
L
N
I2S/TDM Bit Clock signal
VDDIO2
A_WFS
O
L
N
I2S Word Clock or TDM Frame Sync signal
VDDIO2
A_SD
O
L
N
I2S/TDM data
VDDIO2
A_OSCK
O
L
N
Audio Oversampling Clock
VDDIO2
IR
I
-
Sch
Infrared signal
VDDIO2
I2C_SCL
IO
-
N (Note2) I2C serial clock
VDDIO2
I2C_SDA
IO
-
N (Note2) I2C serial data
VDDIO2
BIASDA
O
L
-
DAOUT
O
H
-
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
1: Test mode
MIPI-CSI-2 clock positive
MIPI-CSI-2 clock negative
MIPI-CSI-2 Data 0 positive
MIPI-CSI-2 Data 0 negative
MIPI-CSI-2 Data 1 positive
MIPI-CSI-2 Data 1 negative
MIPI-CSI-2 Data 2 positive
MIPI-CSI-2 Data 2 negative
MIPI-CSI-2 Data 3 positive
MIPI-CSI-2 Data 3 negative
HDMI Clock channel positive
HDMI Clock channel negative
HDMI Data 0 channel positive
HDMI Data 0 channel negative
HDMI Data 1 channel positive
HDMI Data 1 channel negative
HDMI Data 2 channel positive
HDMI Data 2 channel negative
DDC Slave Clock
DDC Slave data
signal
BIAS signal
Connect to AVSS through 0.1µF when not
used
Audio PLL clock Reference Output clock
Please leave open when not used
9 / 17
VDDIO2
VDD_MIPI
VDD_MIPI
VDD_MIPI
VDD_MIPI
VDD_MIPI
VDD_MIPI
VDD_MIPI
VDD_MIPI
VDD_MIPI
VDD_MIPI
AVDD33
AVDD33
AVDD33
AVDD33
AVDD33
AVDD33
AVDD33
AVDD33
VDDIO1
VDDIO1
Note
1.8V or
3.3V
1.8V or
3.3V
1.8V
or3.3V
1.8V or
3.3V
1.2V
1.2V
1.2V
1.2V
1.2V
1.2V
1.2V
1.2V
1.2V
1.2V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V (Note1)
3.3V (Note1)
1.8V or
3.3V
1.8V or
3.3V
3.3V
3.3V (Note1)
3.3V
1.8V or
3.3V
1.8V or
3.3V
1.8V or
3.3V
1.8V or
3.3V
1.8V or
3.3V
1.8V or
3.3V
1.8V or
3.3V
-
-
-
-
2022-02-24
TC9590XBG
Group
POWER
(12)
Ground
(10)
Note
-
-
-
-
I/O
Init (O)
Type
PCKIN
I
-
-
PFIL
O
L
-
-
-
-
VDD for Internal Core (3)
-
1.2V
-
-
-
VDDIO1 IO power supply (1)
-
VDDIO2
-
-
-
VDDIO2 IO power supply (1)
-
VDD_MIPI
AVDD12
AVDD33
AVDD25
-
-
-
VDD for the MIPI CSI-2 (2)
HDMI PHY 1.2 V power supply (2)
HDMI PHY 3.3 V power supply (2)
APLL 2.5 V power supply (1)
-
3.3V
1.8V or
3.3V
1.2V
1.2V
3.3V
2.5V
VSS
-
-
-
Ground
-
-
REXT
-
-
-
External Reference Resistor, Please connect to
AVDD33 with a 2 kΩ resistor (± 1%)
-
-
VPGM
-
-
-
eFuse program power supply, please tie to
ground
-
-
VDDC1,
VDDC2
VDDIO1
Misc
(2)
Function
Voltage
Supply
Pin Name
Audio PLL Reference Input clock
Connect to AVSS through 0.1µF when not
used
Audio PLL Low Pass Filter signal
Connect to AVSS through 0.1µF when not
used
Total 64 pins
Note1: These IO are 5 V tolerant.
Note2: Bi-directional IO with Schmitt trigger input.
Buffer Type Abbreviation:
N:
Normal IO
Normal IO with weak Internal Pull-Down
NPD:
Normal IO with weak Internal Pull-Up
NPU:
FS-SOD:
Failed Safe Pseudo open-drain output, Schmitt input
FS:
Failed Safe IO
Sch:
Schmitt input buffer
MIPI-PHY:
front-end analog IO for CSI-2
HDMI-PHY: front-end analog IO for HDMI
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
10 / 17
2022-02-24
TC9590XBG
3.1. TC9590XBG BGA64 Pin Count Summary
Table 3.2 BGA64 Pin Count Summary
Group Name
System
CSI-2 TX
HDMI-RX
DDC
EDID
CEC
HPD
Audio
IR
I2C
APLL
POWER
Ground
Misc
TOTAL
Pin Count
4
10
8
2
2
1
2
4
1
2
4
12
10
2
64
3.2. Pin Layout
A1
A2
A3
A4
A5
A6
A7
A8
REXT
VSS
VPGM
BIASDA
DAOUT
PFIL
CSID3N
CSID3P
B1
B2
B3
B4
B5
B6
B7
B8
AVDD33
AVDD12
INT
IR
AVDD25
PCKIN
CSID2N
CSID2P
C1
C2
C3
C4
C5
C6
C7
C8
HDMICP
HDMICN
VDDC2
VSS
VSS
VDD_MIPI
CSICN
CSICP
D1
D2
D3
D4
D5
D6
D7
D8
HDMID0P
HDMID0N
AVDD12
VSS
VSS
VSS
CSID1N
CSID1P
E1
E2
E3
E4
E5
E6
E7
E8
HDMID1P
HDMID1N
VSS
VSS
TEST
VSS
CSID0N
CSID0P
F1
F2
F3
F4
F5
F6
F7
F8
HDMID2P
HDMID2N
AVDD33
VDDIO1
VDDC2
VDD_MIPI
A_SCK
A_SD
G1
G2
G3
G4
G5
G6
G7
G8
CEC
VDDC1
DDC_SDA
I2C_SDA
RESETN
EDID_SDA
A_WFS
A_OSCK
H1
H2
H3
H4
H5
H6
H7
H8
HPDO
HPDI
DDC_SCL
I2C_SCL
REFCLK
EDID_SCL
VDDIO2
VSS
Figure 3.1
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
TC9590XBG 64-Pin Layout (Top View)
11 / 17
2022-02-24
TC9590XBG
4. Package
The packages for TC9590XBG are described in the figures below.
P-LFBGA64-0707-0.80-002
(Unit: mm)
Weight: 98 mg (Typ.)
Figure 4.1
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
TC9590XBG package (64 pins)
12 / 17
2022-02-24
TC9590XBG
Table 4.1 Mechanical Dimension
Dimension
Solder ball pitch
Package dimension
Package height
© 2014-2022
Toshiba Electronic Devices & Storage Corporation
Min
-
Typ.
0.80 mm
7.0 × 7.0 mm2
-
13 / 17
Max
1.4 mm
2022-02-24
TC9590XBG
5. Electrical Characteristics
5.1. Absolute Maximum Ratings
VSS = 0 V reference
Parameter
Supply voltage
(1.8 V - Digital IO)
Supply voltage
(1.2 V – Digital Core)
Supply voltage
(1.2 V – MIPI CSI PHY)
Supply voltage
(3.3 V – HDMIRX PHY)
Supply voltage
(1.2 V – HDMIRX PHY)
Supply voltage
(2.5 V – APLL)
Input voltage
(CSI IO)
Output voltage
(CSI IO)
Input voltage
(Digital IO)
Output voltage
(Digital IO)
Output voltage
(APLL)
Junction temperature
Storage temperature
Symbol
Rating
Unit
VDDIO
-0.3 to +3.9
V
VDDC
-0.3 to +1.8
V
VDD_MIPI
-0.3 to +1.8
V
AVDD33
-0.3 to +3.9
V
AVDD12
-0.3 to +1.8
V
AVDD25
-0.3 to +2.75
V
VIN_CSI
-0.3 to VDD_MIPI + 0.3
V
VOUT_CSI
-0.3 to VDD_MIPI + 0.3
V
VIN_IO
-0.3 to VDDIO + 0.3
V
VOUT_IO
-0.3 to VDDIO + 0.3
V
VOUT_APLL
-0.3 to AVDD25 + 0.3
V
Tj
Tstg
125
-40 to +125
°C
°C
Symbol
Min
Typ.
Max
Unit
VDDIO2
VDDIO1
VDDC
VDD_MIPI
AVDD25
1.65
3.0
1.1
1.1
2.25
1.8
3.3
1.2
1.2
2.5
3.6
3.6
1.3
1.3
2.75
V
V
V
V
V
Ta
-40
25
85
°C
VSN
AVDD33
VSN33
AVDD12
VSN12
3.135
1.15
-
3.3
1.2
-
0.1
3.465
0.08
1.25
0.04
Vpp
V
Vpp
V
Vpp
5.2. Operating Condition
VSS = 0 V reference
Parameter
Supply voltage (1.8/3.3 V – Digital IO)
Supply voltage (3.3 V – HDMI Digital IO)
Supply voltage (1.2 V – Digital Core)
Supply voltage (1.2 V – MIPI CSI PHY)
Supply voltage (2.5 V – APLL)
Operating temperature
(ambient temperature with voltage
applied)
Supply Noise Voltage
Supply voltage (3.3 V – HDMIRX PHY)
Supply Noise Voltage for AVDD33
Supply voltage (1.2 V – HDMIRX PHY)
Supply Noise Voltage for AVDD12
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TC9590XBG
5.3. DC Electrical Specification
Parameter
Note1
Input voltage, High level input
Input voltage, Low level input Note1
Input voltage High level
CMOS Schmitt Trigger Note1,2
Input voltage Low level
CMOS Schmitt Trigger Note1,2
Output voltage High level
Note1, Note2
Output voltage Low level
Note1, Note2
Input leak current, High level
(Condition: VIN = VDDIO, VDDIO = 3.6 V)
Input leak current, Low level
(Condition: VIN = 0 V, VDDIO = 3.6 V)
Note1:
Note2:
Note3:
Note4:
Symbol
Min
Typ.
Max
Unit
VIH
VIL
0.7 x VDDIO
0
-
VDDIO
0.3 x VDDIO
V
V
VIHS
0.7 x VDDIO
-
VDDIO
V
VILS
0
-
0.3 x VDDIO
V
VOH
0.8 x VDDIO
-
VDDIO
V
VOL
0
-
0.2 x VDDIO
V
IILH1 (Note3)
-10
-
10
µA
IILL1 (Note4)
-10
-
10
µA
Each power source is operating within operation condition.
Current output value is specified to each IO buffer individually. Output voltage changes with output
current value.
Normal pin or Pull-up IO pin applied VDDIO supply voltage to Vin (input voltage)
Normal pin applied VSS (0 V) to Vin (input voltage)
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TC9590XBG
6. Revision History
Table 6.1 Revision History
Revision
1.0
1.4
Date
Description
2020-06-05 Newly released
Add “AEC-Q100 Qualified” to Features
2022-02-24 Remove Figure 2.1. and Figure 2.2
Modify Supply voltage (2.5V – APLL) in 5.1
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TC9590XBG
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