TLP105
TOSHIBA PHOTOCOUPLER IRED & PHOTO-IC
TLP105
Unit: mm
Isolated bus drivers
High-speed line receivers
Microprocessor system interfaces
The Toshiba TLP105 consists of an infrared emitting diode optically
coupled to a high-gain, high-speed photodetector.
The TLP105 is housed in a 6-pin MFSOP.
With a totem-pole output, the TLP105 is capable of both sinking and
sourcing current.
The TLP105 has an internal Faraday shield, which provides a guaranteed
common-mode transient immunity of ±10 kV/μs.
The TLP105 has a noninverting output. An inverting-output version, the
TLP108, is also available.
Buffer logic type (totem-pole output)
Guaranteed Performance Over Temperature: −40 to 100°C
Power Supply Voltage: 4.5 to 20 V
Input Threshold Current: IFLH =1.6 mA (max)
Switching Time (tpLH/tpHL): 250 ns (max)
Common mode transient immunity: ±10 kV/μs
Isolation Voltage: 3750 Vrms
UL-recognized: UL 1577, File No.E67349
cUL-recognized: CSA Component Acceptance Service No.5A
Pin Configuration (top View)
VCC
1
6
1:ANODE
3:CATHODE
5 4:GND
File No.E67349
JEDEC
―
JEITA
―
TOSHIBA
11−4C2
Weight: 0.09 g (typ.)
3
SHIELD
GND
4
5:VO(Output)
6:VCC
ICC
Schematic
VDE-approved: EN 60747-5-5 (Note 1)
IF
1+
Note 1 : When a VDE approved type is needed,
please designate the Option(V4).
VF
3-
Truth Table
LED
Tr1
Tr2
Output
H
L
ON
OFF
ON
OFF
OFF
ON
H
L
Tr1
Tr2
SHIELD
Input
6
IO
5
4
VCC
VO
GND
0.1 µF bypass capacitor must be
connected between pin 6 and 4.
Start of commercial production
© 2019
Toshiba Electronic Devices & Storage Corporation
1
2008-05
2019-05-27
TLP105
Recommended Operating Conditions
CHARACTERISTIC
SYMBOL
MIN
TYP.
MAX
UNIT
Input Current, ON
IF(ON)
2
―
10
mA
Input Voltage, OFF
VF(OFF)
0
―
0.8
V
Supply Voltage*
VCC
4.5
―
20
V
Operating Temperature
Topr
-40
―
100
°C
N
―
―
4
―
Fan-out (TTL Load)
* This item denotes operating range, not meaning of recommended operating conditions.
Note: Recommended operating conditions are given as a design guideline to obtain expected performance of the
device. Additionally, each item is an independent guideline respectively. In developing designs using this product,
please confirm specified characteristics shown in this document.
Absolute Maximum Ratings (Ta = 25°C)
CHARACTERISTIC
Forward Current
LED
Forward Current Derating
(Ta ≥ 83°C)
Peak Transient Forward Current
(Note1)
Reverse Voltage
Input Power Dissipation
Input Power Dissipation derating (Ta ≥ 83°C)
Output Current 1 (Ta ≤ 25°C)
DETECTOR
Output Current 2 (Ta ≤ 100°C)
SYMBOL
RATING
UNIT
IF
20
mA
ΔIF/°C
-0.48
mA/°C
IFPT
1
A
VR
5
V
PD
40
mW
ΔPD/°C
-0.95
mW/°C
IO1
25/-15
mA
IO2
5/-5
mA
ΔIO1/°C
-0.26/-0.13
mA/°C
IOP
50/-50
mA
Output Voltage
VO
-0.5 to 20
V
Output Power Dissipation
PO
75
mW
ΔPO /°C
-0.75
mW/°C
Output Current Derating (Ta ≥ 25°C)
Peak Output Current
(Note2)
Output Power Dissipation Derating (Ta ≥ 25°C)
VCC
-0.5 to 20
V
Operating Temperature Range
Supply Voltage
Topr
−40 to 100
°C
Storage Temperature Range
Tstg
−55 to 125
°C
Lead Solder Temperature (10 s)
Isolation Voltage (AC, 60 s, R.H. ≤ 60 %)
(Note3)
Tsol
260
°C
BVs
3750
Vrms
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: Pulse width ≤ 1 μs, 300 pps.
Note 2: Pulse width ≤ 5 μs, duty cycle ≤ 0.025
Note 3: Device considered a two terminal device: pins 1 and 3 shorted together and pins 4, 5 and 6 shorted together.
© 2019
Toshiba Electronic Devices & Storage Corporation
2
2019-05-27
TLP105
Electrical Characteristics
(Unless otherwise specified, Ta = -40 to 100°C, VCC = 4.5 to 20 V)
CHARACTERISTIC
SYMBOL
TEST
CONDITION
CIRCUIT
MIN
TYP.
MAX
UNIT
1.45
1.57
1.75
V
VF
―
IF = 10 mA, Ta = 25 °C
ΔVF/ΔTa
―
IF=10 mA
―
-2.0
―
mV/°C
Input Reverse Current
IR
―
VR = 5 V, Ta = 25° C
―
―
10
μA
Input Capacitance
CT
―
V = 0 V, f = 1 MHz, Ta = 25 °C
―
100
-
pF
Logic Low Output Voltage
VOL
1
IOL = 3.5 mA, VF = 0.8 V
―
0.2
0.6
V
Logic High Output Voltage
VOH
2
IOH = −2.6 mA,
VCC = 4.5 V
2.7
4.0
―
IF = 5 mA
VCC = 20 V
17.4
19.0
―
Logic Low Supply Current
ICCL
3
VF = 0 V
VCC = 20 V
―
―
3.0
VCC = 5.5 V
―
―
3.0
Logic High Supply Current
ICCH
4
IF = 5 mA
VCC = 20 V
―
―
3.0
VCC = 5.5 V
―
―
3.0
IOSL
5
VF = 0 V
VCC = VO = 5.5 V
15
80
―
VCC = VO = 20 V
20
90
―
IOSH
6
IF = 5 mA
VCC = 5.5 V
−5
−15
―
VO = GND
VCC = 20 V
−10
−20
―
IFLH
―
IO = -2.6 mA, VO > 2.4 V
―
0.4
1.6
mA
VFHL
―
IO = 3.5 mA, VO < 0.4 V
0.8
―
―
V
IHYS
―
VCC = 5 V
―
0.05
―
mA
Input Forward Voltage
Temperature Coefficient
of Forward Voltage
Logic Low Short Circuit
Output Current
(Note 1)
Logic High Short Circuit
Output Current
(Note 1)
Input Current Logic High
Output
Input Voltage Logic Low
Output
Input Current Hysteresis
V
mA
mA
mA
mA
*All typical values are at Ta = 25 °C
Note 1: Duration of output short circuit time should not exceed 10 ms.
Note : A ceramic capacitor (0.1 μA) should be connected from pin 6 to pin 4 to stabilize the operation of the high
gain linear amplifier. Failure to provide the bypassing may impair the switching property. The total lead
length between capacitor and coupler should not exceed 1 cm.
Isolation Characteristics (Ta = 25°C)
Characteristic
Symbol
Capacitance input to output
CS
Test Condition
VS = 0 V, f = 1 MHz
Isolation resistance
RS
R.H. ≤ 60 %, VS = 500 V
Isolation voltage
BVS
AC,60 s
© 2019
Toshiba Electronic Devices & Storage Corporation
3
Min
Typ.
Max
Unit
―
0.8
―
pF
―
Ω
―
Vrms
12
1×10
3750
14
10
―
2019-05-27
TLP105
Switching Characteristics
(Unless otherwise specified, Ta = -40 to 100°C,VCC = 4.5 to 20 V)
CHARACTERISTIC
TEST
CIRCUIT
SYMBOL
Propagation Delay Time
to Logic High output
Propagation Delay Time
to Logic Low output
Switching Time Dispersion
between ON and OFF
CONDITION
MIN
TYP.
MAX
UNIT
tpLH
IF = 0→3 mA
30
150
250
ns
tpHL
IF = 3→0 mA
30
150
250
ns
―
―
220
ns
IF = 0→3 mA , VCC = 5 V
―
30
75
ns
IF = 3→0 mA , VCC =5 V
―
30
75
ns
-10000
―
―
V/μs
10000
―
―
V/μs
7, 8
―
|tpHL−tpLH|
Rise Time (10 – 90 %)
tr
Fall Time (90 – 10 %)
tf
Common Mode transient
VCM = 1000 Vp-p, IF = 5 mA,
CMH
Immunity at High Level Output
VCC =20 V, Ta = 25 °C
9
Common Mode transient
VCM = 1000 Vp-p, IF = 0 mA,
CML
Immunity at Low Level Output
VCC = 20 V, Ta = 25° C
*All typical values are at Ta = 25 °C
Test Circuit 1: VOL
1
VCC
5
3
SHIELD
GND 4
Test Circuit 3: ICCL
1
VCC
Test Circuit 2: VOH
6
6
IF 1
→
0.1µF
V
SHIELD
GND
Test Circuit 5: IOSL
1
VCC
4
SHIELD
SHIELD
IF 1
→
A
VCC
VCC
0.1µF
6
V
VOH
3
GND
4
↑
IOH
VCC
0.1µF
ICCH
A
5
↑
VCC
0.1µF
Test Circuit 6: IOSH
6
IF
→
GND 4
GND 4
Test Circuit 4: ICCH
SHIELD
5
3
3
↑
ICCL
6
5
↑
VCC
VOL IOL
5
3
VCC
1
VCC
0.1µF
A
5
↑
VCC
IOSL
3
SHIELD
VO
© 2019
Toshiba Electronic Devices & Storage Corporation
4
6
GND
4
0.1µF
A
IOSH
VO
VCC
2019-05-27
TLP105
Test Circuit 7: Switching Time Test Circuit
IF=3 mA (P.G)
(f=50 kHz , duty=50%,
VCC
tr=tf=5Less
ns) than 5 ns )
tr=tf=
IF
VO
5V
IF
6
1
VCC
3
SHIELD
GND
620 Ω
0.1µF
5
50%
tpLH
tpHL
VOH
4
CL
90%
VO
5 kΩ
1.3V
VOL
tr
10%
tf
CL is approximately 15 pF which includes
probe and stray capacitance.
P.G.: Pulse generator
Test Circuit 8: Switching Time Test Circuit
IF=3 mA (P.G)
(f=50 kHz , duty=50%,
tr=tf= Less than 5 ns )
tr=tf=5 ns)
6
1
IF
VCC
5
3
SHIELD
GND
0.1µF
4
IF
50%
VO
CL
VCC
tpLH
tpHL
VOH
90%
VO
1.3V
VOL
tr
CL is approximately 15 pF which includes
probe and stray capacitance.
P.G.: Pulse generator
10%
tf
Test Circuit 9: Common Mode Transient Immunity Test Circuit
IF
SW
1
VCC
→
A
B
6
5
3
SHIELD
GND
90%
0.1µF
VO
10%
VCC
4
VCM
tf
tr
CMH
・SW A : IF=5 mA
VCM
17V
VO
1V
・SW B : IF=0 mA
CM
© 2019
Toshiba Electronic Devices & Storage Corporation
1000V
5
H
=
800(V )
t f ( µs )
CML
CM
L
=
800(V )
t r ( µs )
2019-05-27
TLP105
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Hardware, software and systems described in this document are collectively referred to as “Product”.
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TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
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© 2019
Toshiba Electronic Devices & Storage Corporation
6
2019-05-27