TLP2409
Photocouplers
Infrared LED & Photo IC
TLP2409
1. Applications
•
High-Speed Digital Interfacing for Instrumentation and Control Devices
•
Industrial Inverters
•
Switching Power Supplies
2. General
The Toshiba TLP2409 consists of a high output power infrared LED coupled with a high-speed photodiodetransistor chip. It is housed in the SO8 package. The TLP2409 features an operating temperature range of up to
125, making it ideal for applications like DC-DC converters and industrial equipment which require operations
at high temperatures.
3. Features
(1)
Package: SO8
(2)
Propagation delay time: tpHL = 0.8 µs, tpLH = 0.8µs (max)@ RL = 1.9 kΩ
(3)
Operating temperature: -55 to 125
(4)
Isolation voltage: 3750 Vrms (min)
(5)
TTL-compatible
(6)
Safety standards
UL-recognized: UL 1577, File No.E67349
cUL-recognized: CSA Component Acceptance Service No.5A File No.E67349
VDE-approved: EN 60747-5-5 (Note 1)
Note 1: When a VDE approved type is needed, please designate the Option (V4)
(V4).
4. Packaging and Pin Assignment
1: N.C.
2: Anode
3: Cathode
4: N.C.
5: GND (Emitter)
6: Output (Collector)
7: N.C.
8: VCC
11-5K1S
Start of commercial production
©2016-2020
Toshiba Electronic Devices & Storage Corporation
1
2010-03
2020-02-17
Rev.3.0
TLP2409
5. Internal Circuit (Note)
Note:
A 0.1µF bypass capacitor must be connected between pin 8 and pin 5.
6. Principle of Operation
6.1. Mechanical Parameters
Characteristics
Min
Unit
Creepage distances
4.0
mm
Clearance
4.0
Internal isolation thickness
7. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 )
Characteristics
LED
Symbol
Input forward current
(Ta ≤ 110 )
IF
Input forward current derating
(Ta ≥ 110 )
∆IF/∆Ta
Input forward current (pulsed)
(Ta ≤ 110 )
IFP
Input forward current derating
(pulsed)
(Ta ≥ 110 )
∆IFP/∆Ta
Input reverse voltage
Note
(Note 1)
Rating
Unit
25
mA
-0.67
mA/
50
mA
-1.34
mA/
VR
5
V
Input power dissipation
(Ta ≤ 110 )
PD
40
mW
Input power dissipation
derating
(Ta ≥ 110 )
∆PD/∆Ta
-1.0
mW/
Detector Output current
(Ta ≤ 95 )
IO
16
mA
(Ta ≥ 95 )
∆IO/∆Ta
-0.3
mA/
Output voltage
VO
-0.5 to 20
V
Supply voltage
VCC
-0.5 to 30
Output current derating
Output power dissipation
(Ta ≤ 95 )
PO
100
mW
Output power dissipation
derating
(Ta ≥ 95 )
∆PO/∆Ta
-1.8
mW/
Topr
-55 to 125
Tstg
-55 to 150
Common Operating temperature
Storage temperature
Lead soldering temperature
Isolation voltage
(10 s)
Tsol
AC, 60 s, R.H. ≤ 60 %
BVS
260
(Note 2)
3750
Vrms
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Pulse width (PW) ≤ 1 ms, duty = 50 %
Note 2: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
2
2020-02-17
Rev.3.0
TLP2409
8. Recommended Operating Conditions (Note)
Characteristics
Symbol
Note
Min
Typ.
Max
Unit
mA
Input forward current
IF
15
Output current
IO
7
Topr
-55
125
Operating temperature
Note:
The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this datasheet should also be considered.
9. Electrical Characteristics (Note) (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Input forward voltage
Input forward voltage
temperature coefficient
Test
Circuit
Note
Test Condition
Min
Typ.
Max
Unit
VF
IF = 16 mA
1.40
1.57
1.80
V
∆VF/∆Ta
IF = 16 mA
-2
mV/
IR
VR = 3 V
10
µA
Input reverse current
Input capacitance
Ct
VF = 0 V, f = 1 MHz
60
pF
High-level output current
IOH
IF = 0 mA, VCC = VO = 5.5 V
3
500
nA
IF = 0 mA, VCC = 30 V,
VO = 20 V
5
µA
IF = 0 mA, VCC = 30 V,
VO = 20 V, Ta = 100
50
Low-level output voltage
VOL
IF = 16 mA, VCC = 4.5 V,
IO = 2.4 mA
0.4
V
Current transfer ratio
IO/IF
IF = 16 mA, VCC = 4.5 V,
VO = 0.4 V
20
%
High-level supply current
ICCH
IF = 0 mA, VCC = 30 V
0.01
1
µA
Min
Typ.
Max
Unit
1.0
pF
1012
1014
Ω
3750
Vrms
Note:
All typical values are at Ta = 25 .
10. Isolation Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Note
Test Conditions
Total capacitance (input to
output)
CS
(Note 1) VS = 0 V, f = 1 MHz
Isolation resistance
RS
(Note 1) VS = 500 V, R.H. ≤ 60 %
Isolation voltage
BVS
AC, 60 s
Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
11. Switching Characteristics (Unless otherwise specified, Ta = 25 , VCC = 5 V)
Characteristics
Symbol
Note
Propagation delay time
(H/L)
tpHL
Propagation delay time
(L/H)
tpLH
High-level common-mode
transient immunity
CMH
(Note 1)
Low-level common-mode
transient immunity
CML
(Note 2)
Test
Circuit
Fig
12.1.1
Fig
12.1.2
Test Condition
Min
Typ.
Max
Unit
IF = 0 → 16 mA, RL = 1.9 kΩ
0.8
µs
IF = 16 → 0 mA, RL = 1.9 kΩ
0.8
IF = 0 mA, RL = 4.1 kΩ,
VCM = 400 Vp-p
5000
10000
IF = 16 mA, RL = 4.1 kΩ,
VCM = 400 Vp-p
-5000
-10000
V/µs
Note 1: CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage
in the logic high state (VO > 2.0 V).
Note 2: CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in
the logic low state (VO < 0.8 V).
©2016-2020
Toshiba Electronic Devices & Storage Corporation
3
2020-02-17
Rev.3.0
TLP2409
12. Test Circuits and Characteristics Curves
12.1. Test Circuits
Fig. 12.1.1 Switching Time Test Circuit and Waveform
Fig. 12.1.2 Common-Mode Transient Immunity Test Circuit and Waveform
©2016-2020
Toshiba Electronic Devices & Storage Corporation
4
2020-02-17
Rev.3.0
TLP2409
13. Soldering and Storage
13.1. Precautions for Soldering
The soldering temperature should be controlled as closely as possible to the conditions shown below, irrespective
of whether a soldering iron or a reflow soldering method is used.
•
When using soldering reflow.
The soldering temperature profile is based on the package surface temperature.
(See the figure shown below, which is based on the package surface temperature.)
Reflow soldering must be performed once or twice.
The mounting should be completed with the interval from the first to the last mountings being 2 weeks.
Fig. 13.1.1 An example of a temperature profile
when lead(Pb)-free solder is used
•
When using soldering flow
Preheat the device at a temperature of 150 (package surface temperature) for 60 to 120 seconds.
Mounting condition of 260 within 10 seconds is recommended.
Flow soldering must be performed once.
•
When using soldering Iron
Complete soldering within 10 seconds for lead temperature not exceeding 260 or within 3 seconds not
exceeding 350
Heating by soldering iron must be done only once per lead.
13.2. Precautions for General Storage
•
Avoid storage locations where devices may be exposed to moisture or direct sunlight.
•
Follow the precautions printed on the packing label of the device for transportation and storage.
•
Keep the storage location temperature and humidity within a range of 5 to 35 and 45% to 75%,
respectively.
•
Do not store the products in locations with poisonous gases (especially corrosive gases) or in dusty
conditions.
•
Store the products in locations with minimal temperature fluctuations. Rapid temperature changes during
storage can cause condensation, resulting in lead oxidation or corrosion, which will deteriorate the
solderability of the leads.
•
When restoring devices after removal from their packing, use anti-static containers.
•
Do not allow loads to be applied directly to devices while they are in storage.
•
If devices have been stored for more than two years under normal storage conditions, it is recommended
that you check the leads for ease of soldering prior to use.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
5
2020-02-17
Rev.3.0
TLP2409
14. Land Pattern Dimensions for Reference Only
Unit: mm
15. Marking
©2016-2020
Toshiba Electronic Devices & Storage Corporation
6
2020-02-17
Rev.3.0
TLP2409
Package Dimensions
Unit: mm
Weight: 0.11 g (typ.)
Package Name(s)
TOSHIBA: 11-5K1S
©2016-2020
Toshiba Electronic Devices & Storage Corporation
7
2020-02-17
Rev.3.0
TLP2409
RESTRICTIONS ON PRODUCT USE
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Hardware, software and systems described in this document are collectively referred to as "Product".
• TOSHIBA reserves the right to make changes to the information in this document and related Product without notice.
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written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible
for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating
and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample
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©2016-2020
Toshiba Electronic Devices & Storage Corporation
8
2020-02-17
Rev.3.0