TLP5214(TP,E

TLP5214 Photocouplers IRED & Photo IC TLP5214 Isolated IGBT/Power MOSFET gate drive AC and brushless DC motor drives Industrial Inverters and Uninterruptible Power Supply (UPS) Unit: mm The TLP5214 is a highly integrated 4.0A output current IGBT gate drive photocoupler housed in a long creepage and clearance SO16L package. The TLP5214, a smart gate driver photocoupler, includes functions of IGBT desaturation detection, isolated fault status feedback, soft IGBT turn-off, active Miller cramping and under voltage lockout (UVLO). This photocoupler is suitable for driving IGBT and power MOSFET used in inverter applications. The TLP5214 consists two infrared LEDs and two high-gain and high-speed ICs. They realize high current, high-speed output control and output fault status feedback. • Peak output current: ±4.0 A (max) • Guaranteed performance over temperature: −40°C to 110°C • Supply current: 3.5 mA (max) • Power supply voltage: 15 V to 30 V • Threshold input current: IFLH = 6 mA (max) TOSHIBA • Switching time (tpLH / tpHL) : 150 ns (max) Weight: 0.37 g (typ.) • Common-mode transient immunity: ±35 kV/μs (min) • Isolation voltage: 5000 Vrms (min) • UL-recognized: UL 1577, File No.E67349 • cUL-recognized: CSA Component Acceptance Service No.5A File No.E67349 • VDE-approved : EN 60747-5-5, EN 62368-1 (Note 1) • CQC-approved: GB4943.1, GB8898 Japan Factory • 11-10M1 Construction mechanical rating SO16L Height Creepage Distance Clearance Insulation Thickness 2.3 mm (max) 8.0 mm (min) 8.0 mm (min) 0.4 mm (min) Note 1 : When a VDE approved type is needed, please designate the Option(D4). Truth Table IF UVLO (VCC2-VE) DESAT FAULT (14Pin DESAT Terminal Input) (3Pin FAULT Terminal Output) OFF Not Active ( > VUVLO+) Not Active High Low ON Not Active ( > VUVLO+) Low ( < VDESATth) High High ON Not Active ( > VUVLO ) High ( > VDESATth) Low ( FAULT) Low ON Active ( < VUVLO ) Not Active High Low OFF Active ( < VUVLO ) Not Active High Low + - VO Start of commercial production 2014-05 © 2019 Toshiba Electronic Devices & Storage Corporation 1 2019-10-31 TLP5214 Pin Configuration (top view) 1 VS 2 VCC1 3 FAULT VE 16 VLED 15 DESAT 14 VCC2 13 VEE 12 4 VS 5 CATHODE 6 ANODE VOUT 11 7 ANODE VCLAMP 10 8 CATHODE VEE 9 1 : VS 2 : VCC1 3 : FAULT 4 : VS 5 : CATHODE 6 : ANODE 7 : ANODE 8 : CATHODE 9 : VEE 10 : VCLAMP 11 : VOUT 12 : VEE 13 : VCC2 14 : DESAT 15 : VLED 16 : VE Internal Circuit VCC2 UVLO ANODE Vout DESAT CATHODE DESAT VEE SHIELD VCLAMP VCLAMP VE VCC1 FAULT Vs VLED Note: A 1-μF bypass capacitor must be connected between pins 9 and 13, pins 13 and 16. © 2019 Toshiba Electronic Devices & Storage Corporation 2 2019-10-31 TLP5214 Absolute Maximum Ratings (Note) (Ta = 25°C ,Unless otherwise specified) Characteristics Symbol Rating Unit IF 25 mA ∆IF/∆Ta −1 mA/°C IFPT 1 A ∆IFPT/∆Ta −25 mA/°C Reverse Input Voltage VR 6 V Input power dissipation PD 145 mW ∆ PD /∆Ta −5.0 mW/°C VCC1 −0.5 to 7 V IOPH −4.0 A IOPL +4.0 A IFAULT 8 mA LED (Note Input forward current 1) Input forward current derating (Ta ≥ 95°C) Peak transient input forward current (Note 1) Peak transient input forward current derating (Ta ≥ 95°C) Input power dissipation derating (Ta ≥ 95°C) Detector Positive Input Supply Voltage “H” peak output current “L” peak output current Ta = −40 to 110 °C (Note 2) FAULT Output Current VFAULT −0.5 to VCC1 V (VCC2−VEE) −0.5 to 35 V Negative Output Supply Voltage (VE−VEE) -0.5 to 15 V Positive Output Supply Voltage (VCC2−VE) −0.5 to 35 − (VE−VEE) V VO −0.5 to VCC2 V Peak Clamping Sinking Current IClamp 1.7 A Miller Clamping Pin Voltage VClamp −0.5 to VCC2 V DESAT Voltage VDESAT VE to VE + 10 V PO 410 mW ∆ PO /∆Ta −14.0 mW/°C Operating temperature range Topr −40 to 110 °C Storage temperature range Tstg −55 to 125 °C Tsol 260 °C BVS 5000 Vrms FAULT Pin Voltage Total Output Supply Voltage Output voltage Output power dissipation Output power dissipation (Ta ≥ 95°C) Common Lead soldering temperature (10 s) (Note 3) Isolation voltage (AC, 60 s, R.H. ≤ 60 %) (Note 4) Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note: A ceramic capacitor (1 μF) should be connected between pins 9 and 13, pins 13 and 16 to stabilize the operation of the high gain linear amplifier.Furthermore, in case VE-VEE > 0 V, a bypass capacitor, which has good high frequency characteristic, a ceramic capacitor (1 μF) should be connected between pins 9 and 16. Failure to provide the bypassing may impair the switching property. The total lead length between capacitor and coupler should not exceed 1 cm. Note 1: Pulse width PW ≤ 1 μs, 300 pps Note 2: Exponential waveform pulse width PW ≤ 0.2 μs, f ≤ 15 kHz, VCC = 15 V Note 3: For the effective lead soldering area. Note 4: This device considered a two-terminal device: All pins on the LED side are shorted together, and all pin on the photodetector side are shorted together. © 2019 Toshiba Electronic Devices & Storage Corporation 3 2019-10-31 TLP5214 Recommended Operating Conditions (Note) Characteristics Symbol Min Typ. Max Unit Total Output Supply Voltage (Note 5) (VCC2−VEE) 15 - 30 V Negative Output Supply Voltage (VE−VEE) 0 - 15 V Positive Output Supply Voltage (VCC2−VE) 15 - 30 − (VE−VEE) V IF(ON) 7.5 - 12 mA VF(OFF) 0 - 0.8 V f - - 50 kHz Input On-State Current (Note 6) Input Off-State Voltage Operating frequency (Note 7) Note: Recommended operating conditions are given as a design guideline to obtain expected performance of the device. Additionally, each item is an independent guideline respectively. In developing designs using this product, please confirm specified characteristics shown in this document. Note 5: If the Vcc rise slope is sharp, an internal circuit might not operate with stability. Please design the VCC rise slope under 3.0 V / μs. Note 6: Input signal rise time (fall time) ≤ 0.5 μs. Note 7: Exponential waveform. IOPH ≥ -4.0 A (≤ 90 ns), IOPL ≤ 4.0 A (≤ 90 ns), Ta = 110°C Electrical Characteristics (Note) (Ta = −40 to 110 °C, unless otherwise specified) Symbol Test Circuit Input Forward Voltage VF ― IF = 10 mA, Ta = 25°C Input Reverse Current IR ― Input Capacitance Ct ― Characteristics FAULT Low Level Output Voltage VFAULTL ― FAULT High Level Output Current IFAULTH ― IOPH 1 High Level Output Current Low Level Output Current (Note 8) (Note 8) Test Condition Min Typ.* Max Unit 1.4 - 1.7 V VR = 5 V - - 10 μA V = 0 V, f = 1 MHz, Ta = 25 °C - 95 - pF IFAULT = 1.1 mA, VCC1 = 5.5 V - 0.2 0.4 IFAULT = 1.1 mA, VCC1 = 3.3 V - 0.2 0.4 VFAULT = 5.5 V, VCC1 = 5.5 V, Ta = 25°C - - 0.5 VFAULT = 5.5 V, VCC1 = 3.3 V, Ta = 25°C - - 0.3 VO = VCC2 − 4 V - −4.0 −1.2 VO = VCC2 − 7 V - −6.5 −3.0 VO = VEE + 2.5 V 1.2 3.5 - VO = VEE + 7 V 3 5.5 - 90 150 230 IOPL 2 Low Level Output Current During Fault Condition IOLF ― VO − VEE = 14 V High Level Output Voltage VOH 3 IO = −100 mA VCC2−0.3 VCC2−0.2 - Low Level Output Voltage VOL 4 IO = 100 mA - 0.1 0.2 VtClamp ― ― - 3.0 - ICL ― VO = VEE + 2.5 V 0.56 1.8 - ICC2H 5 IO = 0 mA - 2.4 3.5 Low Level Supply Current ICC2L 6 IO = 0 mA - 2.3 3.5 Blanking Capacitor Charging Current ICHG 7 VDESAT = 2 V −0.13 −0.24 −0.33 Blanking Capacitor Discharge Current IDSCHG 8 VDESAT = 7 V 10 49 - DESAT Threshold Voltage VDESAT ― VCC2-VE＞VUVLO- 6 6.5 7.5 VUVLO+ 9 VO＞5 V 10.5 11.6 13.5 VUVLO- 9 VO＜5 V 9.2 10.3 11.1 UVLOHYS ― - 1.3 - Clamp Pin Threshold Voltage Clamp Low Level Sinking Current High Level Supply Current UVLO Threshold Voltage UVLO hysteresis ― V μA A mA V A mA (*): All typical values are at Ta = 25°C Note 8: IO application time ≤ 50 μs, 1 pulse © 2019 Toshiba Electronic Devices & Storage Corporation 4 2019-10-31 V TLP5214 Electrical Characteristics (Note) (Ta = −40 to 110 °C, unless otherwise specified) Symbol Test Circuit Threshold Input Current(L/H) IFLH 10 Threshold Input Voltage (H/L) VFHL ― Characteristics Test Condition Min Typ.* Max Unit VCC = 30 V, VO < 5 V - 2.3 6 mA VCC = 30 V, VO > 5 V 0.8 - - V (*): All typical values are at Ta = 25°C Note: This product is more sensitive than conventional products to electrostatic discharge (ESD) owing to its low power consumption design. It is therefore all the more necessary to observe general precautions regarding ESD when handling this component. Isolation Characteristics (Note) (Ta = 25 °C) Characteristic Symbol Capacitance input to output Test Condition CS Isolation resistance RS Isolation voltage BVS Min Typ. Max Unit Vs = 0 V, f = 1 MHz - 1.0 - pF R.H. ≤ 60 %, VS = 500 V 12 10 10 - Ω AC, 60 s 5000 - 14 - Vrms Note: This device considered a two-terminal device: All pins on the LED side are shorted together, and all pin on the photodetector side are shorted together. Switching Characteristics (Note) (Ta = −40 to 110 °C, unless otherwise specified) Characteristics Symbol Propagation delay time (Note 9) L→H tpLH H→L tpHL Output rise time (10−90 %) (Note 9) tr Output fall time (90−10 %) (Note 9) tf (Note 9) | tpHL−tpLH | (Note 9) (Note 10) tpsk Pulse with distortion Propagation delay skew (device to device) Test Circuit Test Condition VCC2 = 30 V Rg = 10 Ω 11 Cg = 25 nF Duty = 50% Min Typ.* Max IF = 0 → 10 mA 50 85 150 IF = 10 → 0 mA 50 90 150 IF = 0 → 10 mA - 32 - IF = 10 → 0 mA - 18 - IF = 0 ↔ 10 mA - - 50 IF = 0 ↔ 10 mA −80 - 80 tDESAT(90%) CDESAT = 100 pF, Rg = 10 Ω - 180 500 DESAT Sense to 10% Delay tDESAT(10%) Cg = 25 nF, VCC2 = 30 V RF = 2.1 kΩ - 3.5 5 DESAT Sense to Low Level FAULT Signal Delay tDESAT(FAULT) - 300 500 DESAT Sense to Low Propagation Delay CDESAT = 100 pF, Rg = 10 Ω Cg = 25 nF, VCC2 = 30 V tDESAT(LOW) RF = 2.1 kΩ - 200 - DESAT Input Mute tDESAT(MUTE) 7 14 - RESET to High Level FAULT Signal Delay tRESET(FAULT) VCC1 = 5.5 V 0.2 0.45 2 IF = 10 mA VO (min) = 26 V ±35 - - IF = 0 mA VO (max) = 1 V ±35 DESAT Sense to 90% Delay 12 High-level common-mode Transient Immunity CMH Low-level common-mode Transient Immunity CML CF = Open 13 to 16 Unit ns μs ns μs kV/μs - - (*): All typical values are at Ta = 25 °C. Note 9: Input signal (f = 10 kHz, duty = 50%, tr = tf = 5 ns or less) CL is less than 15 pF which includes probe and stray wiring capacitance. Note 10: The propagation delay skew, tpsk, is equal to the magnitude of the worst-case difference in tpHL and/or tpLH that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc). Test Circuit © 2019 Toshiba Electronic Devices & Storage Corporation 5 2019-10-31 TLP5214 Test Circuit 1: IOPH Test Circuit 2: IOPL Test Circuit 3: VOH Test Circuit 4: VOL Test Circuit 5: ICC2H Test Circuit 6: ICC2L © 2019 Toshiba Electronic Devices & Storage Corporation 6 2019-10-31 TLP5214 Test Circuit 7: ICHG Test Circuit 8: IDSCHG Test Circuit 9: VUVLO Test Circuit 10: IFLH Test Circuit 11: tpLH, tpHL, tr, tf, | tpHL-tpLH | IF = 10 mA (P.G.) (f =10 kHz, duty = 50%, rise / fall time 5 ns or less) Test Circuit 12: tDESAT(90%), tDESAT(10%), tDESAT(FAULT), tDESAT(Low), tDESAT(MUTE), tRESET(FAULT) IF = 10 mA (P.G.) (f =10 kHz, duty = 50%, rise / fall time 5 ns or less) © 2019 Toshiba Electronic Devices & Storage Corporation 7 2019-10-31 TLP5214 Test Circuit 13: CMR_LED1 ON Test Circuit 14: CMR_LED1 OFF Test Circuit 15: CMR_LED2 ON Test Circuit 16: CMR_LED2 OFF CML (CMH) is the maximum rate of rise (fall) of the common mode voltage that can be sustained with the output voltage in the LOW (HIGH) state. © 2019 Toshiba Electronic Devices & Storage Corporation 8 2019-10-31 TLP5214 Characteristics Curve (mA) Ta = 110 °C 100 °C 75 °C 50 °C 10 Ta = −40 °C −20 °C 0 °C 25 °C 1 0.1 1 1.2 1.4 I F – Ta 30 Input Forward Current IF Input Forward Current IF (mA) I F – VF 100 1.6 1.8 25 20 15 10 5 0 2 This curve shows the maximum limit to the input forward current. -40 -20 Input Forward voltage VF (V) High Level Output Voltage VOH (V) IOPH (A) High Level Output Current VO = VCC2 – 7 V -4 -2 0 -40 -15 10 35 60 85 110 28 26 Ta = −40 °C 24 Ta = 25 °C 22 20 0 -1 IOPL – Ta -2 -3 -4 IOPH (A) VOL – IOPL 10 6 Low Level Output Voltage VOL (V) IOPL (A) 80 100 120 140 High Level Output Current 8 Low Level Output Current 60 Ta = 110 °C Ambient Temperature Ta (°C) VO = VEE +7 V 4 VO = VEE +2.5 V 2 0 40 30 VO = VCC2 – 4 V -6 20 VOH – IOPH IOPH – Ta -8 0 Ambient Temperature Ta (°C) -40 -15 10 35 60 85 Ambient Temperature Ta (°C) 110 8 Ta = 25 °C 6 Ta = −40 °C 4 2 Ta = 110 °C 0 0 1 2 Low Level Output Current 3 4 IOPL (A) NOTE: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 9 2019-10-31 Toshiba Electronic Devices & Storage Corporation 3 ICL – Ta VO = VEE +2.5 V 2 1 0 -40 -15 10 35 60 85 4 Ta = 25 °C 2 1 0 110 (mA) ICC2L, ICC2H 2.6 2.4 ICCH2 Supply Current (mA) ICC2L, ICC2H Supply Current VCC = 15 V 2.8 2.2 1.8 ICCL2 -40 -15 10 35 60 Ta = 110 °C 0 3 4 Clamp Low Level Sinking Current 1 ICL (A) 85 110 3 Ta = 25 °C 2.8 2.6 ICCH2 2.4 2.2 ICCL2 2 1.8 15 18 VDESAT = 2 V VCC = 15 V -0.25 -0.3 -40 -15 10 35 24 27 30 VDESAT – Ta (V) ICHG – Ta -0.35 21 Supply Voltage VCC2 (V) DESAT Threshold Voltage VDESAT Blanking Capacitor Charging Current ICHG (mA) Ambient Temperature Ta (°C) -0.2 2 ICC2L, ICC2H – VCC2 ICC2L, ICC2H – Ta 2 Ta = −40 °C 3 Ambient Temperature Ta (°C) 3 (VCLAMP – VEE) - ICL 5 (VCLAMP – VEE) (V) ICL (A) 4 Clamp Low Level Sinking Current TLP5214 60 85 Ambient Temperature Ta (°C) 110 7.5 VCC2 − VE > VUVLO- 7 VCC2 = 30 V 6.5 VCC2 = 15 V 6 -40 -15 10 35 60 85 110 Ambient Temperature Ta (°C) NOTE: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 10 2019-10-31 Toshiba Electronic Devices & Storage Corporation (VOH -VCC2) – Ta 0 IO = −100 mA -0.2 -0.4 -0.6 -0.8 -1 -40 -15 10 35 60 85 VOL – Ta 1 Low Level Output Voltage VOL (V) High Level Output Voltage VOH -VCC2 (V) TLP5214 110 IO = 100 mA 0.8 0.6 0.4 0.2 0 -40 5 IFLH – Ta 60 85 110 VCC2 = 30 V VCC2 = 15 V / 30 V 2 1 24 20 16 12 8 4 -40 -15 10 35 60 85 0 110 0 Rg = 10 Ω, Cg = 25 nF IF = 10 mA, VCC2 = 30 V 120 tPLH 100 tPHL 80 60 40 20 |tPHL − tPLH| -40 -15 10 35 60 85 Ambient Temperature Ta (°C) 110 Propagation delay time, Pulse width distortion tpLH, tpHL, |tpHL – tpLH| (ns) tpHL, tpLH, |tpHL-tpLH| – Ta 140 1 2 3 Input Forward Current Ambient Temperature Ta (°C) Propagation delay time, Pulse width distortion tpLH, tpHL, |tpHL – tpLH| (ns) 35 28 3 0 10 VO – IF 32 4 0 -15 Ambient Temperature Ta (°C) Output Voltage VO (V) (mA) 6 Threshold Input Current(L/H) IFLH Ambient Temperature Ta (°C) 4 IF 5 (mA) tpHL, tpLH, |tpHL-tpLH| – IF 140 Rg = 10 Ω, Cg = 25 nF VCC2 = 30 V, Ta = 25 °C 120 tPLH 100 tPHL 80 60 40 20 0 |tPHL − tPHL| 5 10 Input Forward Current 15 IF 20 (mA) NOTE: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 11 2019-10-31 Toshiba Electronic Devices & Storage Corporation tpHL, tpLH, |tpHL-tpLH| – VCC2 140 tDESAT(Low) – Ta DESAT Sense to Low Propagation Delay tDESAT(Low) (ns) Propagation delay time, Pulse width distortion tpLH, tpHL, |tpHL – tpLH| (ns) TLP5214 Rg = 10 Ω, Cg = 25 nF IF = 10 mA, Ta = 25 °C 120 tpLH 100 tpHL 80 60 40 20 0 |tpHL - tpLH| 15 20 25 30 300 CDESAT = 100 pF, Rg = 10 Ω, Cg = 25 nF VCC2 = 30 V, RF = 2.1 kΩ, CF = Open 250 200 150 100 -40 Supply Voltage VCC2 (V) DESAT Sense to 10% Delay tDESAT(10%) (μs) DESAT Sense to 90% Delay tDESAT(90%) (ns) CDESAT = 100 pF, Rg = 10 Ω, Cg = 25 nF, VCC2 = 30 V, 200 150 -40 -15 10 35 60 85 3.5 2.5 2 1.5 -40 VCC1=3.3V 250 10 35 60 85 Ambient Temperature Ta (°C) 110 RESET to High Level FAULT Signal Delay tRESET(FAULT) (μs) DESAT Sense to Low Level FAULT Signal Delay tDESAT(FAULT) (ns) VCC1=5V -15 -15 10 35 60 85 110 tRESET(FAULT) – Ta CDESAT = 100 pF, Rg = 10 Ω, Cg = 25 nF VCC2 = 30 V, RF = 2.1 kΩ, CF = Open -40 110 Ambient Temperature Ta (°C) 350 200 85 3 1 110 tDESAT(FAULT) – Ta 300 60 CDESAT = 100 pF, Rg = 10 Ω, Cg = 25 nF, VCC2 = 30 V, Ambient Temperature Ta (°C) 400 35 tDESAT(10%) – Ta 4 250 100 10 Ambient Temperature Ta (°C) tDESAT(90%) – Ta 300 -15 1.2 CDESAT =100 pF, Rg = 10 Ω, Cg = 25 nF VCC2 = 30 V, RF = 2.1 kΩ, CF = Open 1 0.8 VCC1=3.3V 0.6 VCC1=5V 0.4 0.2 0 -40 -15 10 35 60 85 110 Ambient Temperature Ta (°C) NOTE: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 12 2019-10-31 Toshiba Electronic Devices & Storage Corporation TLP5214 PRECAUTIONS OF SURFACE MOUNTING TYPE PHOTOCOUPLER SOLDERING & GENERAL STORAGE (1) Precautions for Soldering The soldering temperature should be controlled as closely as possible to the conditions shown below, irrespective of whether a soldering iron or a reflow soldering method is used. 1) When Using Soldering Reflow An example of a temperature profile when lead(Pb)-free solder is use An Example of a Temperature Profile When Lead(Pb)-Free Solder Is Used  Reflow soldering must be performed once or twice.  The mounting should be completed with the interval from the first to the last mountings being 2 weeks. 2) When using soldering Flow  Apply preheating of 150 °C for 60 to 120 seconds.  Mounting condition of 260 °C or less within 10 seconds is recommended.  Flow soldering must be performed once 3) When using soldering Iron  Complete soldering within 10 seconds for lead temperature not exceeding 260 °C or within 3 seconds not exceeding 350 °C.  Heating by soldering iron must be only once per 1 lead © 2019 Toshiba Electronic Devices & Storage Corporation 13 2019-10-31 TLP5214 (2) Precautions for General Storage 1) Do not store devices at any place where they will be exposed to moisture or direct sunlight. 2) When transportation or storage of devices, follow the cautions indicated on the carton box. 3) The storage area temperature should be kept within a temperature range of 5 degree C to 35 degree C, and relative humidity should be maintained at between 45% and 75%. 4) Do not store devices in the presence of harmful (especially corrosive)gases, or in dusty conditions. 5) Use storage areas where there is minimal temperature fluctuation. Because rapid temperature changes can cause condensation to occur on stored devices, resulting in lead oxidation or corrosion, as a result, the solderability of the leads will be degraded. 6) When repacking devices, use anti-static containers. 7) Do not apply any external force or load directly to devices while they are in storage. 8) If devices have been stored for more than two years, even though the above conditions have been followed, it is recommended that solderability of them should be tested before they are used. Ordering Method When placing an order, please specify the product number, the CTR rank, the tape and the quantity as shown in the following example. (Example) TLP5214 (TP, E 1500Pcs. Quantity (must be a multiple of 1500) [[G]]/RoHS COMPATIBLE (Note) Tape type Device name Note : Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. The RoHS is the Directive 2011/65/EU of the European Parliament and of the Council of 8 June 2011 on the restriction of the use of certain hazardous substances in electrical and electronics equipment. Marking Lot No. Part No. (or abbreviation code) Pin No.1 (the dent in the resin) © 2019 Toshiba Electronic Devices & Storage Corporation 14 2019-10-31 TLP5214 RESTRICTIONS ON PRODUCT USE Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as “TOSHIBA”. Hardware, software and systems described in this document are collectively referred to as “Product”. • TOSHIBA reserves the right to make changes to the information in this document and related Product without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS. • PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT ("UNINTENDED USE"). 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Handle with care and do not break, cut, crush, grind, dissolve chemically or otherwise expose GaAs in Product. • Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). Product and related software and technology may be controlled under the applicable export laws and regulations including, without limitation, the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. • Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS. https://toshiba.semicon-storage.com/ © 2019 Toshiba Electronic Devices & Storage Corporation 15 2019-10-31