TLP701(TP,F)

TLP701 TOSHIBA Photocoupler IRED + Photo IC TLP701 Industrial inverters Inverter for air conditioners IGBT/Power MOS FET gate drive Unit: mm 4.58±0.25 Peak output current • Guaranteed performance over temperature : −40 to 100°C • Supply current : 10 to 30 V • Threshold input current : IFLH = 5 mA (max) • Switching time (tpLH / tpHL) : 700 ns (max) • Common mode transient immunity : ±10 kV/μs (min) • Isolation voltage : 5000 Vrms (min) • Construction mechanical rating Creepage Distance Clearance Insulation Thickness +0.25 4.0 −0.20 −0.05 +0.15 3.65 −0.25 7.62±0.25 1.27±0.2 : 2 mA (max) Power supply voltage 1.25±0.25 0.4±0.1 9.7±0.3 11-5J1 7.62-mm pitch standard type 10.16-mm pitch TLPXXXF type 7.0 mm (min) 7.0 mm (min) 0.4 mm (min) 8.0 mm (min) 8.0 mm (min) 0.4 mm (min) • UL-recognized: UL 1577, File No.E67349 • cUL-recognized: CSA Component Acceptance Service No.5A File No.E67349 VDE-approved: EN 60747-5-5 , EN 62368-1 (Note 1) TOSHIBA 11-5J1S Weight: 0.26 g (t yp .) Pin Configuration (Top View) 1 6 2 5 3 SHIELD 4 Schematic Note 1 : When a VDE approved type is needed, please designate the Option(D4). (Tr1) Truth Table Input 3 : ±0.6 A (max) • • 1 2 0.25± +0.10 • 4 6.8±0.25 TLP701 consists of an infrared emitting diode and an integrated photodetector. This unit is 6-lead SDIP package. The TLP701 is 50% smaller than the 8-pin DIP and meets the reinforced insulation class requirements of international safety standards. Therefore the mounting area can be reduced in equipment requiring safety standard certification. The TLP701 is suitable for gate driving circuits for IGBTs or power MOSFETs. In particular, the TLP701 is capable of “direct” gate driving of low-power IGBTs. 6 5 1: ANODE 2: NC 3: CATHODE 4: GND 5: OUTPUT 6: VCC ICC 6 VCC IF LED Tr1 Tr2 1+ Output H ON ON OFF H L OFF OFF ON L VF 3− (Tr2) SHIELD IO 5 VO 4 GND A 0.1-μF bypass capacitor must be connected between pins 6 and 4. Start of commercial production 2004-04 © 2019 Toshiba Electronic Devices & Storage Corporation 1 2019-06-03 TLP701 Absolute Maximum Ratings (Ta = 25 °C) Characteristics Symbol Rating Unit IF 20 mA ∆IF/∆Ta −0.54 mA/°C IFP 1 A Reverse voltage VR 5 V Input power dissipation PD 40 mW ΔPD/ΔTa -1.0 mW/°C Tj 125 °C Forward current Forward current derating (Ta ≥ 85°C) LED Pulse transient forward current (Note 1) Input power dissipation derating (Ta ≥ 85°C) Junction temperature (Note 2) IOPH −0.6 A “L” peak output current (Note 2) IOPL 0.6 A Output voltage VO 35 V Supply voltage VCC 35 V Output power dissipation PO 400 mW ΔPO/ΔTa -1.0 mW/°C Tj 125 °C f 25 kHz Operating temperature range Topr −40 to 100 °C Storage temperature range Tstg −55 to 125 °C Detector “H” peak output current Output power dissipation derating (Ta ≥ 85°C) Junction temperature Operating frequency (Note 3) Lead soldering temperature (10 s) (Note 4) Tsol 260 °C Isolation voltage (AC, 60 s, R.H. ≤ 60 %) (Note 5) BVS 5000 Vr m s Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings.Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note: A ceramic capacitor (0.1 μF) should be connected from pin 6 to pin 4 to stabilize the operation of the high gain linear amplifier. Failure to provide the bypassing may impair the switching property. The total lead length between capacitor and coupler should not exceed 1 cm. Note 1: Pulse width PW ≤ 1 μs, 300 pps Note 2: Exponential waveform pulse width PW ≤ 2 μs, f ≤15 kHz Note 3: Exponential waveform IOPH ≤ −0.3 A (≤ 2 μs), IOPL ≤+0.3 A (≤ 2 μs), Ta = 100 °C Note 4: For the effective lead soldering area Note 5: Device considered a two-terminal device: pins 1, 2 and 3 paired with pins 4, 5 and 6 respectively. Recommended Operating Conditions Characteristics Input current, ON Input voltage, OFF Supply voltage Peak output current Operating temperature (Note 6) Symbol Min Typ. Max Unit IF (ON) 7.5 ― 10 mA VF (OFF) 0 ― 0.8 V VCC 10 ― 30 V IOPH / IOPL ― ― ± 0.2 A Topr −40 ― 100 °C Note: Recommended operating conditions are given as a design guideline to obtain expected performance of the device. Additionally, each item is an independent guideline respectively. In developing designs using this product, please confirm specified characteristics shown in this document. Note 6: Input signal rise time (fall time) < 0.5 μs. © 2019 Toshiba Electronic Devices & Storage Corporation 2 2019-06-03 TLP701 Electrical Characteristics (Ta = −40 to 100 °C, unless otherwise specified) Symbol Test Circuit VF ― ∆VF/∆Ta Input reverse current Input capacitance Characteristics Forward voltage Temperature coefficient of forward voltage “H” Level Min Typ.* Max Unit IF = 5 mA, Ta = 25 °C ― 1.55 1.70 V ― IF = 5 mA ― −2.0 ― mV/°C IR ― VR = 5 V, Ta = 25 °C ― ― 10 μA CT ― V =0 V, f = 1 MHz, Ta = 25 °C ― 45 ― pF VCC = 15 V IF = 5 mA V6-5 = 4 V 1 ― −0.38 −0.2 V6-5 = 10 V ― −0.60 −0.4 V5-4 = 2 V 0.2 0.36 ― V5-4 = 10 V 0.4 0.62 ― IO = −100 mA, IF = 5 mA 6.0 8.5 ― IO = 100 mA, VF = 0.8 V ― 0.4 1.0 ― 1.4 2.0 ― 1.3 2.0 IOPH1 IOPH2 Output current (Note 7) “L” Level IOPL1 2 IOPL2 “H” Level Test Condition VCC = 15 V IF = 0 mA 3 VOH VCC = 10 V Output voltage A V “L” Level VOL 4 “H” Level ICCH 5 “L” Level ICCL 6 VCC = 10 to 30 V IF = 10 mA VO = Open IF = 0 mA Threshold input current L→H IFLH ― VCC = 15 V, VO > 1 V ― 2.5 5 mA Threshold input voltage H→L VFHL ― VCC = 15 V, VO < 1 V 0.8 ― ― V VCC ― 10 ― 30 V Supply current Supply voltage ― mA ( * ): All typical values are at Ta = 25 °C Note: This product is more sensitive than conventional products to electrostatic discharge (ESD) owing to its low power consumption design.It is therefore all the more necessary to observe general precautions regarding ESD when handling this component. Note 7: Duration of IO time ≤ 50 μs, 1 pulse Isolation Characteristics (Ta = 25 °C) Characteristic Symbol Capacitance input to output CS Isolation resistance RS Isolation voltage BVS © 2019 Toshiba Electronic Devices & Storage Corporation Test Condition VS = 0 V , f = 1 MHz (Note 5) R.H. ≤ 60 %, VS = 500 V (Note 5) AC, 60 s 3 (Note 5) Min Typ. Max Unit ― 1.0 ― pF 1×1012 1014 ― Ω 5000 ― ― Vrms 2019-06-03 TLP701 Switching Characteristics (Ta = −40 to 100 °C, unless otherwise specified) Characteristics Propagation delay time Symbol L→H tpLH H→L tpHL tr Output fall time (90−10 %) tf Switching time dispersion between ON and OFF | tpHLtpLH | 7 CMH 8 Common mode transient immunity at LOW level output Test Condition Min Typ.* Max IF = 0 → 5 mA 100 ― 700 IF = 5 → 0 mA 100 ― 700 Rg = 47 Ω IF = 0 → 5 mA ― 50 ― Cg = 3 nF IF = 5 → 0 mA ― 50 ― IF = 0 ⇔ 5 mA ― ― 500 IF = 5 mA VO (min) = 26 V −10000 ― ― IF = 0 mA VO (max) = 1 V 10000 VCC = 30 V Output rise time (10−90 %) Common mode transient immunity at HIGH level output Test Circuit CML VCM = 1000 Vp-p VCC = 30 V Ta = 25 °C Unit ns V/μs ― ― ( * ): All typical values are at Ta = 25 °C. Test Circuit 1: IOPH 1 Test Circuit 2: IOPL 1 6 6 0.1 μF IOPL A V6-5 A IF IOPH 0.1 μF VCC VCC V5-4 3 3 4 Test Circuit 3: VOH 1 6 4 Test Circuit 4: VOL 1 VOH V 6 0.1 μF VOL VF IF IO 0.1 μF 3 VCC 3 4 Test Circuit 5: ICCH 1 6 IO 4 Test Circuit 6: ICCL ICCH 1 6 ICCL A A 0.1 μF 0.1 μF IF VCC V VCC VCC 3 3 4 © 2019 Toshiba Electronic Devices & Storage Corporation 4 4 2019-06-03 TLP701 Test Circuit 7: tpLH, tpHL, tr, tf, PDD 6 1 0.1 μF IF IF VO Rg = 47 Ω Cg = 3 nF 3 tr VOH tf VCC 90% 50% 10% VO tpHL tpLH 4 VOL Test Circuit 8: CMH, CML IF SW A 6 1 VCM 0.1 μF VO B 1000 V 90% 10% tr tf VCC • SW A: IF = 5 mA 4 3 VO VCM + CMH 26 V − 1V CML • SW B: IF = 0 mA CML = CMH = − 800 V tr (μs) 800 V tf (μs) CML (CMH) is the maximum rate of rise (fall) of the common mode voltage that can be sustained with the output voltage in the LOW (HIGH) state. © 2019 Toshiba Electronic Devices & Storage Corporation 5 2019-06-03 TLP701 I F ─ VF ⊿ VF/⊿ Ta- IF 100 C o e f f i c i e n t ⊿ V F / ⊿ Ta ( m V / °C) F o r w a r d C u r r e n t I F (mA) －2.6 Ta = 25 °C 50 30 10 5 3 1 0.5 0.3 0.1 0.05 0.03 0.01 1.0 1.4 1.2 1.8 1.6 －2.4 －2.2 －2.0 －1.8 －1.6 －1.4 0.1 2.0 0.3 0.5 F o r w a r d V o l t a g e VF(V) 30 (mA) VCC=15 V 30 Threshold input current IFLH A l l o w a b l e f o r w a r d c u r r e n t I F (mA) 10 IFLH – Ta 20 10 0 -40 -20 0 20 40 60 VO>1 V 4 3 2 1 0 -40 80 100 120 -20 Ambient Temperature Ta(°C) 0 VOL - Ta High Level Output Voltage VOH[V] VF = 0.8 V IO= 100 mA , VCC=10 V 0.6 0.4 0.2 0 20 40 40 60 80 100 80 100 VOH - Ta 30 -20 20 Ambient Temperature Ta(°C) 1 Low Level Output Voltage VOL[V] 5 5 40 0 -40 3 F o r w a r d C u r r e n t I F (mA) I F - Ta 0.8 1 60 80 25 Ambient Temperature Ta(°C) Io= -100 mA , VCC=10 V 20 15 10 5 0 -40 100 IF = 5 mA -20 0 20 40 60 Ambient Temperature Ta(°C) NOTE: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 Toshiba Electronic Devices & Storage Corporation 6 2019-06-03 TLP701 I C C L - Ta I C C H - Ta 10 I F=5 mA High level supply current ICCH (mA) VCC=30 V 8 6 4 2 Low level supply current ICCL (mA) 10 0 -40 -20 0 20 40 60 80 VCC=30 V 8 6 4 2 0 -40 100 -20 0 Ambient Temperature Ta(°C) 20 IOPL – Ta 60 80 100 IOPH – Ta 1 0 IF=0 mA, VCC=15 V (Note 7) High level output current IOPH (A) Low level output current IOPL (A) 40 Ambient Temperature Ta(°C) 0.8 V6-5=10.0V 0.6 0.4 V6-5=2.0V 0.2 0 -40 -20 0 20 40 60 80 100 Ambient Temperature Ta(°C) IF=5 mA, VCC=15 V (Note 7) -0.2 V8-6=4.0 V -0.4 V8-6=10 V -0.6 -0.8 -1 -40 -20 0 20 40 60 80 100 Ambient Temperature Ta(°C) t p H L , t p L H - Ta 500 Propagation delay time tPLH, tPHL (ns) IF=5 mA, VCC=30 V Rg=47 Ω, Cg=3 nF 400 300 tpLH 200 tpHL 100 0 -40 -20 0 20 40 60 80 100 Ambient Temperature Ta(°C) NOTE: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. © 2019 Toshiba Electronic Devices & Storage Corporation 7 2019-06-03 TLP701 RESTRICTIONS ON PRODUCT USE Toshiba Corporation and its subsidiaries and affiliates are collectively referred to as “TOSHIBA”. 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