TLP754(F)

TLP754F Photocouplers GaAℓAs Infrared LED & Photo IC TLP754F 1. Applications • Intelligent Power Module Signal Isolation • Factory Automation (FA) • Industrial Inverters 2. General The TLP754F is a photocoupler in a DIP8 package that consists of a GaAℓAs infrared light-emitting diode (LED) optically coupled to an integrated high-gain, high-speed photodetector IC chip. It provides guaranteed performance and specifications at temperatures up to 125. An internal noise shield provides a guaranteed common mode transient immunity of ±20 kV/µs. The TLP754F guarantees minimum and maximum of propagation delay time, pulse width distortion. Therefore it is suitable for isolation interface between IPM and control IC circuits in motor control application. The TLP754F satisfies 8 mm PC board spacing requirements. Absolute maximum ratings and electrical characteristics are the same as in the TLP754. 3. Features (1) Inverter logic type (open collector output) (2) Package: DIP8 (3) Operating temperature: -40 to 125 (4) Supply voltage: -0.5 to 30 V (5) Threshold input current: 5.0 mA (max) (6) Supply current: 1.3 mA (max) (7) Propagation delay time: tpHL = 400 ns (max), tpLH = 550 ns (max) (8) Pulse width distortion: 400 ns (max) (9) Common-mode transient immunity: ±20 kV/µs (min) (10) Isolation voltage: 5000 Vrms (min) (11) Safety standards UL-approved: UL1577, File No.E67349 cUL-approved: CSA Component Acceptance Service No.5A File No.E67349 VDE-approved: EN60747-5-5, EN60065 or EN60950-1 (Note 1) Note 1: When a VDE approved type is needed, please designate the Option (D4) (D4). Start of commercial production ©2016 Toshiba Corporation 1 2012-01 2016-02-29 Rev.4.0 TLP754F 4. Packaging and Pin Configuration 1: N.C. 2: Anode 3: Cathode 4: N.C. 5: GND 6: VO (Output) 7: N.C. 8: VCC 11-10C402S 5. Internal Circuit 6. Principle of Operation 6.1. Truth Table Input LED Output H ON L L OFF H 6.2. Mechanical Parameters 7.62-mm Pitch TLP754 10.16-mm Pitch TLP754F Unit Creepage distances 7.0 (min) 8.0 (min) mm Clearance distances 7.0 (min) 8.0 (min) Internal isolation thickness 0.4 (min) 0.4 (min) Characteristics ©2016 Toshiba Corporation 2 2016-02-29 Rev.4.0 TLP754F ) 7. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 25 Characteristics LED Symbol Input forward current Note Rating Unit IF 20 mA (Ta ≥ 116 ) ∆IF/∆Ta -0.6 mA/ 50 mA (Ta ≥ 110 ) ∆IFP/∆Ta -1.25 mA/ PD 40 mW ∆PD/∆Ta -1.0 mW/ VR 5 V IO 15 mA Output voltage VO -0.5 to 30 V Supply voltage VCC -0.5 to 30 Output power dissipation PO 80 mW ∆PO/∆Ta -2.0 mW/ Topr -40 to 125  Input forward current derating Input forward current (pulsed) Input forward current derating (pulsed) IFP Input power dissipation Input power dissipation derating (Ta ≥ 110 ) Input reverse voltage Detector Output current Output power dissipation derating (Ta ≥ 110 ) Common Operating temperature Storage temperature Lead soldering temperature Isolation voltage (Note 1) Tstg -55 to 150 (10 s) Tsol 260 AC, 60 s, R.H. ≤ 60 % BVS (Note 2) 5000 Vrms Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Pulse width (PW) ≤ 1 ms, duty = 50 % Note 2: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7 and 8 are shorted together. 8. Recommended Operating Conditions (Note) Characteristics Symbol Note Min Typ. Max Unit Input on-state current IF(ON) (Note 1) 7.5  15 mA Input off-state voltage VF(OFF) V 0  0.8 Supply voltage VCC (Note 2) 4.5  30 Operating temperature Topr (Note 2) -40  125  Note: The recommended operating conditions are given as a design guide necessary to obtain the intended performance of the device. Each parameter is an independent value. When creating a system design using this device, the electrical characteristics specified in this datasheet should also be considered. Note: A ceramic capacitor (0.1 µF) should be connected between pin 8 and pin 5 to stabilize the operation of a highgain linear amplifier. Otherwise, this photocoupler may not switch properly. The bypass capacitor should be placed within 1 cm of each pin. Note 1: The rise and fall times of the input on-current should be less than 0.5 µs. Note 2: Denotes the operating range, not the recommended operating condition. ©2016 Toshiba Corporation 3 2016-02-29 Rev.4.0 TLP754F 9. Electrical Characteristics (Note) (Unless otherwise specified, Ta = -40 to 125 , VCC = 4.5 to 30 V) 125 Characteristics Symbol Input forward voltage Input forward voltage temperature coefficient Note Test Circuit Test Condition Min Typ. Max Unit VF  IF = 10 mA, Ta = 25  1.45 1.55 1.7 V ∆VF/∆Ta  IF = 10 mA  -2.0  mV/ IR  VR = 5 V, Ta = 25    10 µA  V = 0 V, f = 1 MHz Input reverse current Input capacitance Ct  60  pF High-level output current IOH Fig. 12.1.1 VF = 0.8 V, VO < VCC   50 µA Low-level output voltage VOL Fig. 12.1.2 IF = 10 mA, IO = 2.4 mA  0.2 0.6 V High-level supply current ICCH Fig. 12.1.3 IF = 0 mA  1.0 1.3 mA Low-level supply current ICCL Fig. 12.1.4 IF = 10 mA  1.0 1.3 Fig. 12.1.5 IF = 10 mA, VO = 0.6 V Output current 4.0   Threshold input current (H/L) IFHL  IO = 0.75 mA, VO < 0.8 V  1.5 5.0 Threshold input voltage (L/H) VFLH  IO = 0.75 mA, VO > 2.0 V 0.8   V Min Typ. Max Unit  1.0  pF 1 × 1012 1014  Ω Vrms Note: IO All typical values are at Ta = 25 . ) 10. Isolation Characteristics (Unless otherwise specified, Ta = 25 25 Characteristics Symbol Note Test Conditions Total capacitance (input to output) CS (Note 1) VS = 0 V, f = 1 MHz Isolation resistance RS (Note 1) VS = 500 V, R.H. ≤ 60 % Isolation voltage BVS (Note 1) AC, 60 s 5000   AC, 1 s in oil  10000  DC, 60 s in oil  10000  Vdc Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7 and 8 are shorted together. 11. Switching Characteristics (Note) , VCC = 15 V) (Unless otherwise specified, Ta = -40 to 125 125 Characteristics Propagation delay time (H/L) Propagation delay time (L/H) Pulse width distortion Symbol Note tpHL (Note 1) tpLH Test Circuit Fig. 12.1.6 (Note 1) |tpHLtpLH| (Note 1) Propagation delay skew (device to device) tpsk (Note 1), (Note 2) Common-mode transient immunity at output high CMH Common-mode transient immunity at output low CML Fig. 12.1.7 Test Condition Min Typ. Max Unit IF = 0 → 10 mA, RL = 20 kΩ, CL = 100 pF 30 150 400 ns IF = 0 → 10 mA, RL = 20 kΩ, CL = 10 pF  70  IF = 10 → 0 mA, RL = 20 kΩ, CL = 100 pF 150 350 550 IF = 10 → 0 mA, RL = 20 kΩ, CL = 10 pF  110  IF = 10 mA, RL = 20 kΩ, CL = 100 pF   400 -50  450 VCM = 1500 Vp-p, IF = 0 mA, RL = 20 kΩ, Ta = 25 , CL = 10 pF or 100 pF ±20 ±25  VCM = 1500 Vp-p, IF = 10 mA, RL = 20 kΩ, Ta = 25 , CL = 10 pF or 100 pF ±20 ±25  kV/µs Note: All typical values are at Ta = 25 . Note 1: Input signal (f = 10 kHz, duty = 10 %, input current tr = tf = 5 ns or less ) Note 2: The propagation delay skew, tpsk, is defined as the propagation delay time of the largest or smallest tpLH minus the largest or smallest tpHL of multiple samples. Evaluations of these samples are conducted under identical test conditions (supply voltage, input current, temperature, etc). ©2016 Toshiba Corporation 4 2016-02-29 Rev.4.0 TLP754F 12. Test Circuits and Characteristics Curves 12.1. Test Circuits Fig. 12.1.1 IOH Test Circuit Fig. 12.1.2 VOL Test Circuit Fig. 12.1.3 ICCH Test Circuit Fig. 12.1.4 ICCL Test Circuit Fig. 12.1.5 IO Test Circuit Fig. 12.1.6 Switching Time Test Circuit and Waveform Fig. 12.1.7 Common-Mode Transient Immunity Test Circuit and Waveform ©2016 Toshiba Corporation 5 2016-02-29 Rev.4.0 TLP754F 12.2. Characteristics Curves (Note) Fig. 12.2.1 IF - VF Fig. 12.2.2 IFHL - Ta Fig. 12.2.3 ICCL - Ta Fig. 12.2.4 ICCH - Ta Fig. 12.2.5 IO - Ta Fig. 12.2.6 Normalized IO - Ta ©2016 Toshiba Corporation 6 2016-02-29 Rev.4.0 TLP754F Fig. 12.2.7 IO - IF Fig. 12.2.8 IOH - Ta Fig. 12.2.9 VOL - Ta Fig. 12.2.10 tpHL, tpLH, |tpLH-tpHL| - Ta Fig. 12.2.11 tpHL, tpLH, |tpLH-tpHL| - IF Fig. 12.2.12 tpHL, tpLH, |tpLH-tpHL| - VCC ©2016 Toshiba Corporation 7 2016-02-29 Rev.4.0 TLP754F Fig. 12.2.13 tpHL, tpLH, |tpLH-tpHL| - RL Fig. 12.2.14 tpHL, tpLH, |tpLH-tpHL| - RL Fig. 12.2.15 tpHL, tpLH, |tpLH-tpHL| - CL Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. ©2016 Toshiba Corporation 8 2016-02-29 Rev.4.0 TLP754F 13. Soldering and Storage 13.1. Precautions for Soldering The soldering temperature should be controlled as closely as possible to the conditions shown below, irrespective of whether a soldering iron or a reflow soldering method is used. • When using soldering reflow. The soldering temperature profile is based on the package surface temperature. (See the figure shown below, which is based on the package surface temperature.) Reflow soldering must be performed once or twice. The mounting should be completed with the interval from the first to the last mountings being 2 weeks. Fig. 13.1.1 An Example of a Temperature Profile Fig. 13.1.2 An Example of a Temperature Profile When Sn-Pb Eutectic Solder Is Used When Lead(Pb)-Free Solder Is Used • When using soldering flow (Applicable to both eutectic solder and Lead(Pb)-Free solder) Preheat the device at a temperature of 150  (package surface temperature) for 60 to 120 seconds. Mounting condition of 260  within 10 seconds is recommended. Flow soldering must be performed once. • When using soldering Iron Complete soldering within 10 seconds for lead temperature not exceeding 260  or within 3 seconds not exceeding 350  Heating by soldering iron must be done only once per lead. 13.2. Precautions for General Storage • Avoid storage locations where devices may be exposed to moisture or direct sunlight. • Follow the precautions printed on the packing label of the device for transportation and storage. • Keep the storage location temperature and humidity within a range of 5 to 35 and 45% to 75%, respectively. • Do not store the products in locations with poisonous gases (especially corrosive gases) or in dusty conditions. • Store the products in locations with minimal temperature fluctuations. Rapid temperature changes during storage can cause condensation, resulting in lead oxidation or corrosion, which will deteriorate the solderability of the leads. • When restoring devices after removal from their packing, use anti-static containers. • Do not allow loads to be applied directly to devices while they are in storage. • If devices have been stored for more than two years under normal storage conditions, it is recommended that you check the leads for ease of soldering prior to use. ©2016 Toshiba Corporation 9 2016-02-29 Rev.4.0 TLP754F 14. Marking ©2016 Toshiba Corporation 10 2016-02-29 Rev.4.0 TLP754F 15. EN60747-5-5 Option (D4) Specification • Part number: TLP754, TLP754F (Note 1) • The following part naming conventions are used for the devices that have been qualified according to option (D4) of EN60747. Example: TLP754F(D4-TP4, F) D4 : EN60747 option TP4: Tape type F : [[G]]/RoHS COMPATIBLE (Note 2) Note 1: Use TOSHIBA standard type number for safety standard application. e.g., TLP754F(D4-TP4,F) → TLP754 Note 2: Please contact your Toshiba sales representative for details on environmental information such as the product's RoHS compatibility. RoHS is the Directive 2011/65/EU of the European Parliament and of the Council of 8 June 2011 on the restriction of the use of certain hazardous substances in electrical and electronics equipment. Fig. 15.1 EN60747 Isolation Characteristics ©2016 Toshiba Corporation 11 2016-02-29 Rev.4.0 TLP754F Fig. 15.2 Insulation Related Specifications (Note) Note: Note: If a printed circuit is incorporated, the creepage distance and clearance may be reduced below this value. (e. g., at a standard distance between soldering eye centers of 7.5 mm). If this is not permissible, the user shall take suitable measures. This photocoupler is suitable for safe electrical isolation only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Fig. 15.3 Marking Example (Note) Note: The above marking is applied to the photocouplers that have been qualified according to option (D4) of EN60747.(Fig15.3) ©2016 Toshiba Corporation 12 2016-02-29 Rev.4.0 TLP754F Fig. 15.4 Measurement Procedure ©2016 Toshiba Corporation 13 2016-02-29 Rev.4.0 TLP754F Package Dimensions Unit: mm Weight: 0.54 g (typ.) Package Name(s) TOSHIBA: 11-10C402S ©2016 Toshiba Corporation 14 2016-02-29 Rev.4.0 TLP754F RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. 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Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS. ©2016 Toshiba Corporation 15 2016-02-29 Rev.4.0