TLP7830
Photocouplers
Optically Isolated Delta-Sigma Modulator
TLP7830
1. Applications
•
Motor phase and rail current sensing
•
Power inverter current and voltage sensing
2. General
The TLP7830 is a 1-bit, second-order delta-sigma (∆-∑) modulator converts an analog input signal into a highspeed data stream with galvanic isolation based on optical coupling technology.
3. Features
(1)
Output clock frequency: 10 MHz (typ.)
(2)
16 bits resolution no missing codes [ENOB: 12 bits (typ.)]
(3)
Integral non-linearity: 4 LSB (typ.)
(4)
Input offset voltage: 0.6 mV (typ.)
(5)
Operating temperature range: -40 to 105
(6)
Common-mode transient immunity: 15 kV/µs (min)
(7)
Safety standards
UL-recognized: UL 1577, File No.E67349
cUL-recognized: CSA Component Acceptance Service No.5A File No.E67349
VDE-approved: EN 60747-5-5, EN 62368-1 (Note 1)
CQC-approved: GB4943.1, GB8898 Japan Factory
Note 1: When a VDE approved type is needed, please designate the Option (D4)
(D4).
Start of commercial production
©2016-2020
Toshiba Electronic Devices & Storage Corporation
1
2016-01
2020-06-25
Rev.9.0
TLP7830
4. Packaging and Pin Assignment
11-6B1A
4.1. Pin Assignment
Pin No.
Symbol
Description
1
VDD1
Input side supply voltage
2
VIN+
Positive input
3
VIN-
Negative input
4
GND1
Input side ground
5
GND2
Output side ground
6
MDAT
Modulator data output
7
MCLK
Modulator clock output
8
VDD2
Output side supply voltage
5. Internal Circuit (Note)
Note:
A 0.1-µF bypass capacitor must be connected between 1 and 4 pins and between 5 and 8 pins.
6. Principle of Operation
6.1. Mechanical Parameters
Characteristics
Size
Unit
Height
2.3 (max)
mm
Creepage distances
8.0 (min)
Clearance
8.0 (min)
Internal isolation thickness
0.4 (min)
©2016-2020
Toshiba Electronic Devices & Storage Corporation
2
2020-06-25
Rev.9.0
TLP7830
7. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Supply voltages
Note
Rating
Unit
VDD1, VDD2
-0.5 to 6
V
Steady-state input voltages
VIN+, VIN-
-0.5 to VDD1 + 0.5
V
Two-second transient input voltages
VIN+, VIN-
-6 to VDD1 + 0.5
V
PD
72
mW
∆PD/∆Ta
-5.0
mW/
MCLK, MDAT
-0.5 to 6
V
Input power dissipation
Input power dissipation derating
(Ta ≥ 110.6)
Digital output voltage
Output power dissipation
PO
48
mW
∆PO/∆Ta
-5.0
mW/
Operating temperature
Topr
-40 to 105
Storage temperature
Tstg
-55 to 125
Output power dissipation derating
(Ta ≥ 115.4)
Lead soldering temperature
Isolation voltage
(10 s)
Tsol
(Note 1)
260
(AC, 60 s, R.H. ≤ 60 %)
BVS
(Note 2)
5000
Vrms
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note: Ceramic capacitors (0.1 µF) should be connected between 1 and 4 pins and between 5 and 8 pins to stabilize
the operation. Otherwise, this photocoupler may not switch properly. The bypass capacitors should be placed
as close as possible to each pin.
Note 1: ≥ 2 mm below seating plane.
Note 2: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
8. Recommended Operating Conditions (Note)
Characteristics
Symbol
Note
Min
Typ.
Max
Unit
Input side supply voltage
VDD1
4.5
5
5.5
V
Output side supply voltage
VDD2
3
5.5
V
-200
200
mV
-40
105
Analog input voltage
VIN+, VIN-
Ambient temperature
Ta
(Note 1), (Note 2)
Note:
The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this data sheet should also be considered.
Note 1: FSR = ±320 mV
Note 2: When either VIN+ or VIN- or both are equal to or greater than VDD1 - 2 V (e.g., if VDD1 = 5 V, when VIN+ and/or
VIN- are equal to or greater than 5 V - 2 V = 3 V), isolation amplifiers go into one of the test modes. Do not
raise either VIN+ or VIN- above this voltage to keep the device in functional mode.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
3
2020-06-25
Rev.9.0
TLP7830
9. Electrical Characteristics
9.1. DC Characteristics (Note) (Unless otherwise specified, Ta = -40 to 105 ,
VDD1 = 4.5 to 5.5 V, VDD2 = 3 to 5.5 V, VIN+ = -200 to 200 mV, VIN- = 0 V)
Characteristics
Symbol
Test Condition
Ta = -40 to 85
Min
Typ.
Max
Unit
-15
4
15
LSB
Integral non-linearity
INL
-25
4
25
Differential non-linearity
DNL
-0.9
0.5
0.9
Ta = 105
Input offset voltage
Input offset voltage drift vs ambient
temperature
Input offset voltage drift vs input side
supply voltage
LSB
VOS
-1.0
0.6
2.0
mV
|dVOS/dTa|
1.2
3
µV/
|dVOS/dVDD1|
150
µV/V
320
mV
-1
0.1
1
%
Internal reference voltage
Gain error
VREF
GE
Ta = 25
Ta = -40 to 105
Input common-mode rejection ratio
Signal-to-noise ratio
CMRRIN
SNR
VIN+ = 400 mVp-p,
1 kHz sine wave
-2
0.1
2
74
dB
68
80
dB
65
75
dB
Signal-to-(noise + distortion) ratio
SNDR
Effective number of bits
ENOB
12
bits
Total harmonic distortion
THD
-78
dB
Input side supply current (VDD1)
IDD1
VIN+ = 0 V
8.5
12
mA
Output side supply current (VDD2)
IDD2
VIN+ = 0 V, VDD2 = 3.3 V
4.6
7
mA
VIN+ = 0 V, VDD2 = 5 V
4.9
8
Low-level output voltage
VOL
IOUT = 200 µA
0.03
0.05
V
High-level output voltage
VOH
IOUT = -200 µA, VDD2 = 3.3 V
3.1
3.2
V
IOUT = -200 µA, VDD2 = 5 V
4.8
4.9
80
Equivalent input resistance
Note:
Note:
RIN
kΩ
Tested with a Sinc3 filter with a decimation ratio of 256 (with the decimation filter output configured to 16 bits).
All typical values are at VDD1 = 5 V, VDD2 = 5 V, Ta = 25 , unless otherwise noted.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
4
2020-06-25
Rev.9.0
TLP7830
10. AC Characteristics (Note) (Unless otherwise specified, Ta = -40 to 105 , VDD1 = 4.5
to 5.5 V, VDD2 = 3 to 5.5 V)
Characteristics
Symbol
Output clock frequency
fCLK
Access time after MCLK rising edge
ta
Hold time after MCLK rising edge
th
Common-mode transient immunity
CMTI
Note:
Test Condition
Min
Typ.
Max
Unit
8.5
10
11.5
MHz
33
45
ns
10
24
ns
15
20
kV/µs
Min
Typ.
Max
Unit
CL = 15 pF
VCM = 1 kV, Ta = 25
All typical values are at Ta = 25 .
CL is approximately 15 pF which includes probe and stray wiring capacitance.
11. Isolation Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Total capacitance (input to output)
CS
(Note 1) VS = 0 V, f = 1 MHz
1.0
pF
Isolation resistance
RS
(Note 1) VS = 500 V, R.H. ≤ 60 %
1012
1014
Ω
(Note 1) AC, 60 s
5000
Vrms
Isolation voltage
BVS
Note
Test Condition
Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
5
2020-06-25
Rev.9.0
TLP7830
12. Characteristics Curves (Note)
VIN- = 0 V. Tested with a Sinc3 filter with a decimation ratio of 256 (with the decimation filter output configured
to 16 bits)
Fig. 12.1 VOS - Ta
Fig. 12.2 VREF - Ta
Fig. 12.3 VIN+ - IIN+
Fig. 12.4 SNR - Ta
Fig. 12.5 SNDR - Ta
©2016-2020
Toshiba Electronic Devices & Storage Corporation
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2020-06-25
Rev.9.0
TLP7830
Fig. 12.6 IDD - VIN+
Fig. 12.7 IDD - Ta
Fig. 12.8 fCLK - Ta
Note:
The above characteristics curves are presented for reference only and not guaranteed by production test,
unless otherwise noted.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
7
2020-06-25
Rev.9.0
TLP7830
13. Soldering and Storage
13.1. Precautions for Soldering
The soldering temperature should be controlled as closely as possible to the conditions shown below, irrespective
of whether a soldering iron or a reflow soldering method is used.
•
When using soldering reflow.
The soldering temperature profile is based on the package surface temperature.
(See the figure shown below, which is based on the package surface temperature.)
Reflow soldering must be performed once or twice.
The mounting should be completed with the interval from the first to the last mountings being 2 weeks.
An Example of a Temperature Profile When Lead(Pb)-Free Solder Is Used
•
When using soldering flow
Preheat the device at a temperature of 150 (package surface temperature) for 60 to 120 seconds.
Mounting condition of 260 within 10 seconds is recommended.
Flow soldering must be performed once.
•
When using soldering Iron
Complete soldering within 10 seconds for lead temperature not exceeding 260 or within 3 seconds not
exceeding 350
Heating by soldering iron must be done only once per lead.
13.2. Precautions for General Storage
•
Avoid storage locations where devices may be exposed to moisture or direct sunlight.
•
Follow the precautions printed on the packing label of the device for transportation and storage.
•
Keep the storage location temperature and humidity within a range of 5 to 35 and 45 % to 75 %,
respectively.
•
Do not store the products in locations with poisonous gases (especially corrosive gases) or in dusty
conditions.
•
Store the products in locations with minimal temperature fluctuations. Rapid temperature changes during
storage can cause condensation, resulting in lead oxidation or corrosion, which will deteriorate the
solderability of the leads.
•
When restoring devices after removal from their packing, use anti-static containers.
•
Do not allow loads to be applied directly to devices while they are in storage.
•
If devices have been stored for more than two years under normal storage conditions, it is recommended
that you check the leads for ease of soldering prior to use.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
8
2020-06-25
Rev.9.0
TLP7830
14. Land Pattern Dimensions (for reference only)
Unit: mm
15. Marking
©2016-2020
Toshiba Electronic Devices & Storage Corporation
9
2020-06-25
Rev.9.0
TLP7830
16. EN 60747-5-5 Option (D4) Specification
•
Part number: TLP7830 (Note 1)
•
The following part naming conventions are used for the devices that have been qualified according to
option (D4) of EN 60747.
Example: TLP7830(D4-TP4,E
D4: EN 60747 option
TP4: Tape type
E: [[G]]/RoHS COMPATIBLE (Note 2)
Note 1: Use TOSHIBA standard type number for safety standard application.
e.g., TLP7830(D4-TP4,E → TLP7830
Note 2: Please contact your Toshiba sales representative for details on environmental information such as the product's
RoHS compatibility.
RoHS is the Directive 2011/65/EU of the European Parliament and of the Council of 8 June 2011 on the
restriction of the use of certain hazardous substances in electrical and electronic equipment.
Fig. 16.1 EN 60747 Insulation Characteristics
©2016-2020
Toshiba Electronic Devices & Storage Corporation
10
2020-06-25
Rev.9.0
TLP7830
Fig. 16.2 Insulation Related Specifications (Note)
Note:
This photocoupler is suitable for safe electrical isolation only within the safety limit data.
Maintenance of the safety data shall be ensured by means of protective circuits.
Fig. 16.3 Marking on Packing
Fig. 16.4 Marking Example (Note)
Note:
The above marking is applied to the photocouplers that have been qualified according to option (D4) of EN 60747.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
11
2020-06-25
Rev.9.0
TLP7830
Fig. 16.5 Measurement Procedure
©2016-2020
Toshiba Electronic Devices & Storage Corporation
12
2020-06-25
Rev.9.0
TLP7830
17. Ordering Information
When placing an order, please specify the part number, tape type and quantity as shown in the following example.
Example) TLP7830(TP4,E 1500 pcs
Part number: TLP7830
Tape type: TP4
[[G]]/RoHS COMPATIBLE: E (Note 1)
Quantity (must be a multiple of 1500): 1500 pcs
Note 1: Please contact your Toshiba sales representative for details on environmental information such as the product's
RoHS compatibility.
RoHS is the Directive 2011/65/EU of the European Parliament and of the Council of 8 June 2011 on the
restriction of the use of certain hazardous substances in electrical and electronic equipment.
©2016-2020
Toshiba Electronic Devices & Storage Corporation
13
2020-06-25
Rev.9.0
TLP7830
Package Dimensions
Unit: mm
Weight: 0.205 g (typ.)
Package Name(s)
TOSHIBA: 11-6B1A
©2016-2020
Toshiba Electronic Devices & Storage Corporation
14
2020-06-25
Rev.9.0
TLP7830
RESTRICTIONS ON PRODUCT USE
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for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
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2020-06-25
Rev.9.0