TLP7920(D4-LF1,F

TLP7920,TLP7920F Photocouplers Optically Isolation Amplifiers TLP7920,TLP7920F 1. Applications • Motor phase and rail current sensing • Power inverter current and voltage sensing 2. General The TLP7920 and TLP7920F of isolation amplifiers is designed for current sensing in electronic motor drives. In a typical implementation, motor currents flow through an external resistor and the resulting analog voltage drop is sensed by the TLP7920 or TLP7920F. 3. Features (1) Output side supply voltage: 3.0 to 5.5 V (2) Output side supply current: 6.2 mA (typ.) (3) Operating temperature range: -40 to 105  (4) Common-mode transient immunity: 15 kV/µs (min) (5) Safety standards UL-approved: UL1577, File No.E67349 cUL-approved: CSA Component Acceptance Service No.5A File No.E67349 VDE-approved: EN60747-5-5, EN60065 or EN60950-1 (Note 1) Note 1: When a VDE approved type is needed, please designate the Option (D4) (D4). Start of commercial production ©2016 Toshiba Corporation 1 2015-09 2016-05-23 Rev.2.0 TLP7920,TLP7920F 4. Packaging (Note) TLP7920 TLP7920(LF1,TP1) 11-10C401S 11-10C4S TLP7920F 11-10C405S TLP7920F(LF4,TP4) 11-10C402S Note: TLP7920(LF5,TP5) 11-10C404S Through-hole type: TLP7920, TLP7920F Lead forming option: (LF1),(LF4),(LF5) Taping option: (TP1),(TP4),(TP5) ©2016 Toshiba Corporation 2 2016-05-23 Rev.2.0 TLP7920,TLP7920F 5. Pin Assignment 5.1. Pin Functions Pin No. Symbol Description 1 VDD1 Input side supply voltage 2 VIN+ Positive input 3 VIN- Negative input 4 GND1 Input side ground 5 GND2 Output side ground 6 VOUT- Negative output 7 VOUT+ Positive output 8 VDD2 Output side supply voltage 6. Internal Circuit (Note) Note: A 0.1 µF bypass capacitor must be connected between 1 and 4 pins and between 5 and 8 pins. 7. Principle of Operation 7.1. Mechanical Parameters 7.62-mm Pitch TLP7920 10.16-mm Pitch TLP7920F Unit Creepage distances 7.0 (min) 8.0 (min) mm Clearance 7.0 (min) 8.0 (min) Internal isolation thickness 0.4 (min) 0.4 (min) Characteristics ©2016 Toshiba Corporation 3 2016-05-23 Rev.2.0 TLP7920,TLP7920F 8. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 ) Characteristics Symbol Supply Voltages Note Rating Unit V VDD1, VDD2 -0.5 to 6 Steady-state input voltages VIN+, VIN- -0.5 to VDD1 + 0.5 Two-second transient input voltages VIN+, VIN- Input power dissipation -0.5 to 6 PD Output voltages (Note 1) 72 VOUT+, VOUT- -0.5 to 6 V 60 mW Topr -40 to 105  Tstg -55 to 125  Output power dissipation PO Operating temperature Storage temperature Lead soldering temperature Isolation voltage mW (Note 1) (10 s) Tsol (Note 2) 260  AC, 60 s, R.H. ≤ 60 % BVS (Note 3) 5000 Vrms Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note: Ceramic capacitors (0.1 µF) should be connected between 1 and 4 pins and between 5 and 8 pins to stabilize the operation. Otherwise, this photocoupler may not switch properly. The bypass capacitors should be placed as close as possible to each pin. Note 1: Input power dissipation derating(Ta≥ 114.2 ): -6.7 mW/ Output power dissipation derating(Ta≥ 116.0 ): -6.7 mW/ Note 2: ≥ 2 mm below seating plane. Note 3: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7 and 8 are shorted together. 9. Recommended Operating Conditions (Note) Characteristics Symbol Note Min Typ. Max Unit V Input side supply voltage VDD1 4.5 5 5.5 Output side supply voltage VDD2 3.0  5.5 -200  200 mV -40  105  Analog input voltage VIN+, VIN- Ambient temperature Ta (Note 1), (Note 2) Note: The recommended operating conditions are given as a design guide necessary to obtain the intended performance of the device. Each parameter is an independent value. When creating a system design using this device, the electrical characteristics specified in this datasheet should also be considered. Note 1: FSR = ±300 mV Note 2: When either VIN+ or VIN- or both are equal to or greater than VDD1 - 2 V (e.g., if VDD1 = 5 V, when VIN+ and/or VIN- are equal to or greater than 5 V - 2 V = 3 V), isolation amplifiers go into one of the test modes. Do not raise either VIN+ or VIN- above this voltage to keep the device in functional mode. ©2016 Toshiba Corporation 4 2016-05-23 Rev.2.0 TLP7920,TLP7920F 10. Electrical Characteristics 10.1. DC Characteristics (Unless otherwise specified, Ta = -40 to 105 , VDD1 = 4.5 to 5.5 V, VDD2 = 3.0 to 5.5 V, VIN+ = -200 to 200 mV, VIN- = 0 V) Characteristics Input offset voltage Input offset voltage drift vs ambient temperature Symbol Note VOS Test Condition Ta = 25  Min Typ. Max Unit -0.7 0.73 2.1 mV  3 10 µV/  120  µV/V V/V |dVOS/dTa| Input offset voltage drift vs input side |dVOS/dVDD1| supply voltage Gain (Rank B) G0 (Note 1) Ta = 25     Gain (Rank A) G1 (Note 1) Ta = 25     Gain (None) G3 (Note 1) Ta = 25      0.00012  V/V/  0.02 0.13 %  0.00007  %/  0.01 0.06 % V Gain drift vs ambient temperature VOUT non-linearity (±200 mV) |dG/dTa| NL200 (Note 2) VIN+ = -200 to 200 mV, Ta = 25  VOUT non-linearity (±200 mV) drift vs |dNL200/dTa| ambient temperature VOUT non-linearity (±100 mV) High-level output voltage Low-level output voltage Input common-mode rejection ratio NL100 (Note 2) VIN+ = -100 to 100 mV, Ta = 25  VOH VIN+ = 400 mV, Ta = 25   2.497  VOL VIN+ = -400 mV, Ta = 25   0.0009   80  CMRRIN dB Input bias current IIN+ VIN+ = 0 V, Ta = 25  -1 -0.055  µA Input side supply current (VDD1) IDD1 VIN+ = 0 V  8.6 12 mA Output side supply current (VDD2) IDD2 VIN+ = 0 V  6.2 10 mA Equivalent input resistance RIN  80  kΩ Note 1: See Chapter 10.1.1 for gain rank values. Note 2: The slope of the optimum line is derived by the method of least squares between differential input voltage (VIN+ - VIN-) and differential output voltage (VOUT+ - VOUT-). Nonlinearity is defined as a fraction of the half of the peak-to-peak value of differential output voltage deviation divided by the full-scale differential output voltage (OVR). 10.1.1. Gain Rank (Note) (Unless otherwise specified, Ta = 25 ) Rank None (±3 %) Rank A (±1 %) Rank B (±0.5 %) Note: Note: (Min) Gain (Typ.) (Max) Blank, A, B 7.95 8.2 8.44 A, B 8.12 8.2 8.28 B 8.16 8.2 8.24 Gain Rank Marking Unit V/V The gain is defined as the slope of the optimum line derived by the method of least squares between differential input voltage (VIN+ - VIN-) and differential output voltage (VOUT+ - VOUT-) in the recommended voltage range. Specify both the part number and a rank in this format when ordering. Example: TLP7920(B,F(O For safety standard certification, however, specify the part number alone. Example: TLP7920(B,F(O → TLP7920 ©2016 Toshiba Corporation 5 2016-05-23 Rev.2.0 TLP7920,TLP7920F 10.2. AC Characteristics (Note) (Unless otherwise specified, Ta = -40 to 105 , VDD1 = 4.5 to 5.5 V, VDD2 = 3.0 to 5.5 V) Characteristics Symbol Test Condition Min Typ. Max Unit 140  230  kHz 1.9 2.3 µs VOUT bandwidth (-3 dB) f-3dB VIN+ = 400 mVp-p, sine wave VIN to VOUT propagation delay time (10 %-10 %) tpD10 VIN+ = 0 to 200 mV/µs step CL = 15 pF VIN to VOUT propagation delay time (50 %-50 %) tpD50  2.3 2.6 VIN to VOUT propagation delay time (90 %-90 %) tpD90  2.8 3.3 tr  1.7  VOUT rise time VOUT fall time tf Common-mode transient immunity Note: CMTI  1.7  15 20  kV/µs Min Typ. Max Unit  1.0  pF 1014  Ω 5000   Vrms AC, 1 s in oil  10000  DC, 60 s in oil  10000  VCM = 1 kV, Ta = 25  All typical values are at Ta = 25 . CL is approximately 15 pF which includes probe and stray wiring capacitance. 11. Isolation Characteristics (Unless otherwise specified, Ta = 25 ) Characteristics Symbol Total capacitance (input to output) CS Isolation resistance Isolation voltage RS BVS Note Test Condition (Note 1) VS = 0 V, f = 1 MHz (Note 1) VS = 500 V, R.H. ≤ 60 % (Note 1) AC, 60 s 1× 1012 Vdc Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7 and 8 are shorted together. ©2016 Toshiba Corporation 6 2016-05-23 Rev.2.0 TLP7920,TLP7920F 12. Characteristics Curves (Note) Fig. 12.1 VOS - VDD1 Fig. 12.2 VOS - VDD2 Fig. 12.3 VOS - Ta Fig. 12.4 G - VDD1 Fig. 12.5 G - VDD2 Fig. 12.6 G - Ta ©2016 Toshiba Corporation 7 2016-05-23 Rev.2.0 TLP7920,TLP7920F Fig. 12.7 NL - Ta Fig. 12.8 VOUT - VIN+ Fig. 12.9 IIN+ - VIN+ Fig. 12.10 RIN - Ta Fig. 12.11 G[dB] - f Fig. 12.12 Switching time - Ta ©2016 Toshiba Corporation 8 2016-05-23 Rev.2.0 TLP7920,TLP7920F Fig. 12.13 IDD - VIN+ Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. ©2016 Toshiba Corporation 9 2016-05-23 Rev.2.0 TLP7920,TLP7920F 13. Soldering and Storage 13.1. Precautions for Soldering The soldering temperature should be controlled as closely as possible to the conditions shown below, irrespective of whether a soldering iron or a reflow soldering method is used. • When using soldering reflow. The soldering temperature profile is based on the package surface temperature. (See the figure shown below, which is based on the package surface temperature.) Reflow soldering must be performed once or twice. The mounting should be completed with the interval from the first to the last mountings being 2 weeks. Fig. 13.1.1 An Example of a Temperature Profile When Lead(Pb)-Free Solder Is Used • When using soldering flow Preheat the device at a temperature of 150  (package surface temperature) for 60 to 120 seconds. Mounting condition of 260  within 10 seconds is recommended. Flow soldering must be performed once. • When using soldering Iron Complete soldering within 10 seconds for lead temperature not exceeding 260  or within 3 seconds not exceeding 350  Heating by soldering iron must be done only once per lead. 13.2. Precautions for General Storage • Avoid storage locations where devices may be exposed to moisture or direct sunlight. • Follow the precautions printed on the packing label of the device for transportation and storage. • Keep the storage location temperature and humidity within a range of 5  to 35  and 45 % to 75 %, respectively. • Do not store the products in locations with poisonous gases (especially corrosive gases) or in dusty conditions. • Store the products in locations with minimal temperature fluctuations. Rapid temperature changes during storage can cause condensation, resulting in lead oxidation or corrosion, which will deteriorate the solderability of the leads. • When restoring devices after removal from their packing, use anti-static containers. • Do not allow loads to be applied directly to devices while they are in storage. • If devices have been stored for more than two years under normal storage conditions, it is recommended that you check the leads for ease of soldering prior to use. ©2016 Toshiba Corporation 10 2016-05-23 Rev.2.0 TLP7920,TLP7920F 14. Land Pattern Dimensions (for reference only) Unit : mm TLP7920 TLP7920F Fig. 14.1 Lead forming and taping option (LF1), (TP1), (LF5), (TP5) Fig. 14.2 Lead forming and taping option (LF4), (TP4) 15. Marking TLP7920 Note: TLP7920F A different marking is used for photocouplers that have been qualified according to option (D4) of EN60747. See Fig.16.3 and Fig.16.4. ©2016 Toshiba Corporation 11 2016-05-23 Rev.2.0 TLP7920,TLP7920F 16. EN60747-5-5 Option (D4) Specification • Example: TLP7920 (Note 1) • The following part naming conventions are used for the devices that have been qualified according to option (D4) of EN60747. Example: TLP7920(D4ATP1,F(O D4: EN60747 option A: Gain Rank TP1: Tape type F: [[G]]/RoHS COMPATIBLE (Note 2) (O: Domestic ID (Country / Region of origin: Japan) Note 1: Use TOSHIBA standard type number for safety standard application. e.g., TLP7920(D4ATP1,F(O → TLP7920 Note 2: Please contact your Toshiba sales representative for details on environmental information such as the product's RoHS compatibility. RoHS is the Directive 2011/65/EU of the European Parliament and of the Council of 8 June 2011 on the restriction of the use of certain hazardous substances in electrical and electronics equipment. Fig. 16.1 EN60747 Insulation Characteristics ©2016 Toshiba Corporation 12 2016-05-23 Rev.2.0 TLP7920,TLP7920F Insulation Related Specifications (Note) Note: Note: If a printed circuit is incorporated, the creepage distance and clearance may be reduced below this value. (e.g., at a standard distance between soldering eye centers of 7.5 mm). If this is not permissible, the user shall take suitable measures. This photocoupler is suitable for safe electrical isolation only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Fig. 16.2 Marking on Packing for EN60747 TLP7920 TLP7920F Fig. 16.3 Marking Example (Note) Note: Fig. 16.4 Marking Example (Note) The above marking is applied to the photocouplers that have been qualified according to option (D4) of EN60747. ©2016 Toshiba Corporation 13 2016-05-23 Rev.2.0 TLP7920,TLP7920F Fig. 16.5 Measurement Procedure ©2016 Toshiba Corporation 14 2016-05-23 Rev.2.0 TLP7920,TLP7920F Package Dimensions Unit: mm TLP7920 Weight: 0.54 g (typ.) Package Name(s) TOSHIBA: 11-10C4S ©2016 Toshiba Corporation 15 2016-05-23 Rev.2.0 TLP7920,TLP7920F Package Dimensions Unit: mm TLP7920(LF1,TP1) Weight: 0.53 g (typ.) Package Name(s) TOSHIBA: 11-10C401S ©2016 Toshiba Corporation 16 2016-05-23 Rev.2.0 TLP7920,TLP7920F Package Dimensions Unit: mm TLP7920(LF5,TP5) Weight: 0.53 g (typ.) Package Name(s) TOSHIBA: 11-10C405S ©2016 Toshiba Corporation 17 2016-05-23 Rev.2.0 TLP7920,TLP7920F Package Dimensions Unit: mm TLP7920F Weight: 0.54 g (typ.) Package Name(s) TOSHIBA: 11-10C402S ©2016 Toshiba Corporation 18 2016-05-23 Rev.2.0 TLP7920,TLP7920F Package Dimensions Unit: mm TLP7920F(LF4,TP4) Weight: 0.53 g (typ.) Package Name(s) TOSHIBA: 11-10C404S ©2016 Toshiba Corporation 19 2016-05-23 Rev.2.0 TLP7920,TLP7920F RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. 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Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS. ©2016 Toshiba Corporation 20 2016-05-23 Rev.2.0